1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Copyright (C) 2013 Red Hat |
4 | * Author: Rob Clark <robdclark@gmail.com> |
5 | */ |
6 | |
7 | #include "hdmi.h" |
8 | |
9 | static void hdmi_phy_8x74_powerup(struct hdmi_phy *phy, |
10 | unsigned long int pixclock) |
11 | { |
12 | hdmi_phy_write(phy, REG_HDMI_8x74_ANA_CFG0, data: 0x1b); |
13 | hdmi_phy_write(phy, REG_HDMI_8x74_ANA_CFG1, data: 0xf2); |
14 | hdmi_phy_write(phy, REG_HDMI_8x74_BIST_CFG0, data: 0x0); |
15 | hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN0, data: 0x0); |
16 | hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN1, data: 0x0); |
17 | hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN2, data: 0x0); |
18 | hdmi_phy_write(phy, REG_HDMI_8x74_BIST_PATN3, data: 0x0); |
19 | hdmi_phy_write(phy, REG_HDMI_8x74_PD_CTRL1, data: 0x20); |
20 | } |
21 | |
22 | static void hdmi_phy_8x74_powerdown(struct hdmi_phy *phy) |
23 | { |
24 | hdmi_phy_write(phy, REG_HDMI_8x74_PD_CTRL0, data: 0x7f); |
25 | } |
26 | |
27 | static const char * const hdmi_phy_8x74_reg_names[] = { |
28 | "core-vdda" , |
29 | "vddio" , |
30 | }; |
31 | |
32 | static const char * const hdmi_phy_8x74_clk_names[] = { |
33 | "iface" , "alt_iface" |
34 | }; |
35 | |
36 | const struct hdmi_phy_cfg msm_hdmi_phy_8x74_cfg = { |
37 | .type = MSM_HDMI_PHY_8x74, |
38 | .powerup = hdmi_phy_8x74_powerup, |
39 | .powerdown = hdmi_phy_8x74_powerdown, |
40 | .reg_names = hdmi_phy_8x74_reg_names, |
41 | .num_regs = ARRAY_SIZE(hdmi_phy_8x74_reg_names), |
42 | .clk_names = hdmi_phy_8x74_clk_names, |
43 | .num_clks = ARRAY_SIZE(hdmi_phy_8x74_clk_names), |
44 | }; |
45 | |