1/*
2 * Copyright 2005-2006 Erik Waling
3 * Copyright 2006 Stephane Marchesin
4 * Copyright 2007-2009 Stuart Bennett
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
21 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25#include "nouveau_drv.h"
26#include "nouveau_reg.h"
27#include "dispnv04/hw.h"
28#include "nouveau_encoder.h"
29
30#include <subdev/gsp.h>
31
32#include <linux/io-mapping.h>
33#include <linux/firmware.h>
34
35/* these defines are made up */
36#define NV_CIO_CRE_44_HEADA 0x0
37#define NV_CIO_CRE_44_HEADB 0x3
38#define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */
39
40#define EDID1_LEN 128
41
42#define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
43#define LOG_OLD_VALUE(x)
44
45struct init_exec {
46 bool execute;
47 bool repeat;
48};
49
50static bool nv_cksum(const uint8_t *data, unsigned int length)
51{
52 /*
53 * There's a few checksums in the BIOS, so here's a generic checking
54 * function.
55 */
56 int i;
57 uint8_t sum = 0;
58
59 for (i = 0; i < length; i++)
60 sum += data[i];
61
62 if (sum)
63 return true;
64
65 return false;
66}
67
68static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)
69{
70 int compare_record_len, i = 0;
71 uint16_t compareclk, scriptptr = 0;
72
73 if (bios->major_version < 5) /* pre BIT */
74 compare_record_len = 3;
75 else
76 compare_record_len = 4;
77
78 do {
79 compareclk = ROM16(bios->data[clktable + compare_record_len * i]);
80 if (pxclk >= compareclk * 10) {
81 if (bios->major_version < 5) {
82 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
83 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);
84 } else
85 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);
86 break;
87 }
88 i++;
89 } while (compareclk);
90
91 return scriptptr;
92}
93
94static void
95run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,
96 struct dcb_output *dcbent, int head, bool dl)
97{
98 struct nouveau_drm *drm = nouveau_drm(dev);
99
100 NV_INFO(drm, "0x%04X: Parsing digital output script table\n",
101 scriptptr);
102 NVWriteVgaCrtc(dev, head: 0, NV_CIO_CRE_44, value: head ? NV_CIO_CRE_44_HEADB :
103 NV_CIO_CRE_44_HEADA);
104 nouveau_bios_run_init_table(dev, table: scriptptr, outp: dcbent, crtc: head);
105
106 nv04_dfp_bind_head(dev, dcbent, head, dl);
107}
108
109static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script)
110{
111 struct nouveau_drm *drm = nouveau_drm(dev);
112 struct nvbios *bios = &drm->vbios;
113 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);
114 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);
115#ifdef __powerpc__
116 struct pci_dev *pdev = to_pci_dev(dev->dev);
117#endif
118
119 if (!bios->fp.xlated_entry || !sub || !scriptofs)
120 return -EINVAL;
121
122 run_digital_op_script(dev, scriptptr: scriptofs, dcbent, head, dl: bios->fp.dual_link);
123
124 if (script == LVDS_PANEL_OFF) {
125 /* off-on delay in ms */
126 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7]));
127 }
128#ifdef __powerpc__
129 /* Powerbook specific quirks */
130 if (script == LVDS_RESET &&
131 (pdev->device == 0x0179 || pdev->device == 0x0189 ||
132 pdev->device == 0x0329))
133 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
134#endif
135
136 return 0;
137}
138
139static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
140{
141 /*
142 * The BIT LVDS table's header has the information to setup the
143 * necessary registers. Following the standard 4 byte header are:
144 * A bitmask byte and a dual-link transition pxclk value for use in
145 * selecting the init script when not using straps; 4 script pointers
146 * for panel power, selected by output and on/off; and 8 table pointers
147 * for panel init, the needed one determined by output, and bits in the
148 * conf byte. These tables are similar to the TMDS tables, consisting
149 * of a list of pxclks and script pointers.
150 */
151 struct nouveau_drm *drm = nouveau_drm(dev);
152 struct nvbios *bios = &drm->vbios;
153 unsigned int outputset = (dcbent->or == 4) ? 1 : 0;
154 uint16_t scriptptr = 0, clktable;
155
156 /*
157 * For now we assume version 3.0 table - g80 support will need some
158 * changes
159 */
160
161 switch (script) {
162 case LVDS_INIT:
163 return -ENOSYS;
164 case LVDS_BACKLIGHT_ON:
165 case LVDS_PANEL_ON:
166 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);
167 break;
168 case LVDS_BACKLIGHT_OFF:
169 case LVDS_PANEL_OFF:
170 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);
171 break;
172 case LVDS_RESET:
173 clktable = bios->fp.lvdsmanufacturerpointer + 15;
174 if (dcbent->or == 4)
175 clktable += 8;
176
177 if (dcbent->lvdsconf.use_straps_for_mode) {
178 if (bios->fp.dual_link)
179 clktable += 4;
180 if (bios->fp.if_is_24bit)
181 clktable += 2;
182 } else {
183 /* using EDID */
184 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1;
185
186 if (bios->fp.dual_link) {
187 clktable += 4;
188 cmpval_24bit <<= 1;
189 }
190
191 if (bios->fp.strapless_is_24bit & cmpval_24bit)
192 clktable += 2;
193 }
194
195 clktable = ROM16(bios->data[clktable]);
196 if (!clktable) {
197 NV_ERROR(drm, "Pixel clock comparison table not found\n");
198 return -ENOENT;
199 }
200 scriptptr = clkcmptable(bios, clktable, pxclk);
201 }
202
203 if (!scriptptr) {
204 NV_ERROR(drm, "LVDS output init script not found\n");
205 return -ENOENT;
206 }
207 run_digital_op_script(dev, scriptptr, dcbent, head, dl: bios->fp.dual_link);
208
209 return 0;
210}
211
212int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
213{
214 /*
215 * LVDS operations are multiplexed in an effort to present a single API
216 * which works with two vastly differing underlying structures.
217 * This acts as the demux
218 */
219
220 struct nouveau_drm *drm = nouveau_drm(dev);
221 struct nvif_object *device = &drm->client.device.object;
222 struct nvbios *bios = &drm->vbios;
223 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
224 uint32_t sel_clk_binding, sel_clk;
225 int ret;
226
227 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||
228 (lvds_ver >= 0x30 && script == LVDS_INIT))
229 return 0;
230
231 if (!bios->fp.lvds_init_run) {
232 bios->fp.lvds_init_run = true;
233 call_lvds_script(dev, dcbent, head, script: LVDS_INIT, pxclk);
234 }
235
236 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)
237 call_lvds_script(dev, dcbent, head, script: LVDS_RESET, pxclk);
238 if (script == LVDS_RESET && bios->fp.power_off_for_reset)
239 call_lvds_script(dev, dcbent, head, script: LVDS_PANEL_OFF, pxclk);
240
241 NV_INFO(drm, "Calling LVDS script %d:\n", script);
242
243 /* don't let script change pll->head binding */
244 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
245
246 if (lvds_ver < 0x30)
247 ret = call_lvds_manufacturer_script(dev, dcbent, head, script);
248 else
249 ret = run_lvds_table(dev, dcbent, head, script, pxclk);
250
251 bios->fp.last_script_invoc = (script << 1 | head);
252
253 sel_clk = NVReadRAMDAC(dev, head: 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
254 NVWriteRAMDAC(dev, head: 0, NV_PRAMDAC_SEL_CLK, val: sel_clk | sel_clk_binding);
255 /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */
256 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);
257
258 return ret;
259}
260
261struct lvdstableheader {
262 uint8_t lvds_ver, headerlen, recordlen;
263};
264
265static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)
266{
267 /*
268 * BMP version (0xa) LVDS table has a simple header of version and
269 * record length. The BIT LVDS table has the typical BIT table header:
270 * version byte, header length byte, record length byte, and a byte for
271 * the maximum number of records that can be held in the table.
272 */
273
274 struct nouveau_drm *drm = nouveau_drm(dev);
275 uint8_t lvds_ver, headerlen, recordlen;
276
277 memset(lth, 0, sizeof(struct lvdstableheader));
278
279 if (bios->fp.lvdsmanufacturerpointer == 0x0) {
280 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n");
281 return -EINVAL;
282 }
283
284 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
285
286 switch (lvds_ver) {
287 case 0x0a: /* pre NV40 */
288 headerlen = 2;
289 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
290 break;
291 case 0x30: /* NV4x */
292 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
293 if (headerlen < 0x1f) {
294 NV_ERROR(drm, "LVDS table header not understood\n");
295 return -EINVAL;
296 }
297 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
298 break;
299 case 0x40: /* G80/G90 */
300 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
301 if (headerlen < 0x7) {
302 NV_ERROR(drm, "LVDS table header not understood\n");
303 return -EINVAL;
304 }
305 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
306 break;
307 default:
308 NV_ERROR(drm,
309 "LVDS table revision %d.%d not currently supported\n",
310 lvds_ver >> 4, lvds_ver & 0xf);
311 return -ENOSYS;
312 }
313
314 lth->lvds_ver = lvds_ver;
315 lth->headerlen = headerlen;
316 lth->recordlen = recordlen;
317
318 return 0;
319}
320
321static int
322get_fp_strap(struct drm_device *dev, struct nvbios *bios)
323{
324 struct nouveau_drm *drm = nouveau_drm(dev);
325 struct nvif_object *device = &drm->client.device.object;
326
327 /*
328 * The fp strap is normally dictated by the "User Strap" in
329 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the
330 * Internal_Flags struct at 0x48 is set, the user strap gets overriden
331 * by the PCI subsystem ID during POST, but not before the previous user
332 * strap has been committed to CR58 for CR57=0xf on head A, which may be
333 * read and used instead
334 */
335
336 if (bios->major_version < 5 && bios->data[0x48] & 0x4)
337 return NVReadVgaCrtc5758(dev, head: 0, index: 0xf) & 0xf;
338
339 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL)
340 return nvif_rd32(device, 0x001800) & 0x0000000f;
341 else
342 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
343 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
344 else
345 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
346}
347
348static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)
349{
350 struct nouveau_drm *drm = nouveau_drm(dev);
351 uint8_t *fptable;
352 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
353 int ret, ofs, fpstrapping;
354 struct lvdstableheader lth;
355
356 if (bios->fp.fptablepointer == 0x0) {
357 /* Most laptop cards lack an fp table. They use DDC. */
358 NV_DEBUG(drm, "Pointer to flat panel table invalid\n");
359 bios->digital_min_front_porch = 0x4b;
360 return 0;
361 }
362
363 fptable = &bios->data[bios->fp.fptablepointer];
364 fptable_ver = fptable[0];
365
366 switch (fptable_ver) {
367 /*
368 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no
369 * version field, and miss one of the spread spectrum/PWM bytes.
370 * This could affect early GF2Go parts (not seen any appropriate ROMs
371 * though). Here we assume that a version of 0x05 matches this case
372 * (combining with a BMP version check would be better), as the
373 * common case for the panel type field is 0x0005, and that is in
374 * fact what we are reading the first byte of.
375 */
376 case 0x05: /* some NV10, 11, 15, 16 */
377 recordlen = 42;
378 ofs = -1;
379 break;
380 case 0x10: /* some NV15/16, and NV11+ */
381 recordlen = 44;
382 ofs = 0;
383 break;
384 case 0x20: /* NV40+ */
385 headerlen = fptable[1];
386 recordlen = fptable[2];
387 fpentries = fptable[3];
388 /*
389 * fptable[4] is the minimum
390 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap
391 */
392 bios->digital_min_front_porch = fptable[4];
393 ofs = -7;
394 break;
395 default:
396 NV_ERROR(drm,
397 "FP table revision %d.%d not currently supported\n",
398 fptable_ver >> 4, fptable_ver & 0xf);
399 return -ENOSYS;
400 }
401
402 if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */
403 return 0;
404
405 ret = parse_lvds_manufacturer_table_header(dev, bios, lth: &lth);
406 if (ret)
407 return ret;
408
409 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {
410 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +
411 lth.headerlen + 1;
412 bios->fp.xlatwidth = lth.recordlen;
413 }
414 if (bios->fp.fpxlatetableptr == 0x0) {
415 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n");
416 return -EINVAL;
417 }
418
419 fpstrapping = get_fp_strap(dev, bios);
420
421 fpindex = bios->data[bios->fp.fpxlatetableptr +
422 fpstrapping * bios->fp.xlatwidth];
423
424 if (fpindex > fpentries) {
425 NV_ERROR(drm, "Bad flat panel table index\n");
426 return -ENOENT;
427 }
428
429 /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */
430 if (lth.lvds_ver > 0x10)
431 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
432
433 /*
434 * If either the strap or xlated fpindex value are 0xf there is no
435 * panel using a strap-derived bios mode present. this condition
436 * includes, but is different from, the DDC panel indicator above
437 */
438 if (fpstrapping == 0xf || fpindex == 0xf)
439 return 0;
440
441 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +
442 recordlen * fpindex + ofs;
443
444 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",
445 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,
446 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,
447 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);
448
449 return 0;
450}
451
452bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)
453{
454 struct nouveau_drm *drm = nouveau_drm(dev);
455 struct nvbios *bios = &drm->vbios;
456 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
457
458 if (!mode) /* just checking whether we can produce a mode */
459 return bios->fp.mode_ptr;
460
461 memset(mode, 0, sizeof(struct drm_display_mode));
462 /*
463 * For version 1.0 (version in byte 0):
464 * bytes 1-2 are "panel type", including bits on whether Colour/mono,
465 * single/dual link, and type (TFT etc.)
466 * bytes 3-6 are bits per colour in RGBX
467 */
468 mode->clock = ROM16(mode_entry[7]) * 10;
469 /* bytes 9-10 is HActive */
470 mode->hdisplay = ROM16(mode_entry[11]) + 1;
471 /*
472 * bytes 13-14 is HValid Start
473 * bytes 15-16 is HValid End
474 */
475 mode->hsync_start = ROM16(mode_entry[17]) + 1;
476 mode->hsync_end = ROM16(mode_entry[19]) + 1;
477 mode->htotal = ROM16(mode_entry[21]) + 1;
478 /* bytes 23-24, 27-30 similarly, but vertical */
479 mode->vdisplay = ROM16(mode_entry[25]) + 1;
480 mode->vsync_start = ROM16(mode_entry[31]) + 1;
481 mode->vsync_end = ROM16(mode_entry[33]) + 1;
482 mode->vtotal = ROM16(mode_entry[35]) + 1;
483 mode->flags |= (mode_entry[37] & 0x10) ?
484 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
485 mode->flags |= (mode_entry[37] & 0x1) ?
486 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
487 /*
488 * bytes 38-39 relate to spread spectrum settings
489 * bytes 40-43 are something to do with PWM
490 */
491
492 mode->status = MODE_OK;
493 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
494 drm_mode_set_name(mode);
495 return bios->fp.mode_ptr;
496}
497
498int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)
499{
500 /*
501 * The LVDS table header is (mostly) described in
502 * parse_lvds_manufacturer_table_header(): the BIT header additionally
503 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if
504 * straps are not being used for the panel, this specifies the frequency
505 * at which modes should be set up in the dual link style.
506 *
507 * Following the header, the BMP (ver 0xa) table has several records,
508 * indexed by a separate xlat table, indexed in turn by the fp strap in
509 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script
510 * numbers for use by INIT_SUB which controlled panel init and power,
511 * and finally a dword of ms to sleep between power off and on
512 * operations.
513 *
514 * In the BIT versions, the table following the header serves as an
515 * integrated config and xlat table: the records in the table are
516 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has
517 * two bytes - the first as a config byte, the second for indexing the
518 * fp mode table pointed to by the BIT 'D' table
519 *
520 * DDC is not used until after card init, so selecting the correct table
521 * entry and setting the dual link flag for EDID equipped panels,
522 * requiring tests against the native-mode pixel clock, cannot be done
523 * until later, when this function should be called with non-zero pxclk
524 */
525 struct nouveau_drm *drm = nouveau_drm(dev);
526 struct nvbios *bios = &drm->vbios;
527 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;
528 struct lvdstableheader lth;
529 uint16_t lvdsofs;
530 int ret, chip_version = bios->chip_version;
531
532 ret = parse_lvds_manufacturer_table_header(dev, bios, lth: &lth);
533 if (ret)
534 return ret;
535
536 switch (lth.lvds_ver) {
537 case 0x0a: /* pre NV40 */
538 lvdsmanufacturerindex = bios->data[
539 bios->fp.fpxlatemanufacturertableptr +
540 fpstrapping];
541
542 /* we're done if this isn't the EDID panel case */
543 if (!pxclk)
544 break;
545
546 if (chip_version < 0x25) {
547 /* nv17 behaviour
548 *
549 * It seems the old style lvds script pointer is reused
550 * to select 18/24 bit colour depth for EDID panels.
551 */
552 lvdsmanufacturerindex =
553 (bios->legacy.lvds_single_a_script_ptr & 1) ?
554 2 : 0;
555 if (pxclk >= bios->fp.duallink_transition_clk)
556 lvdsmanufacturerindex++;
557 } else if (chip_version < 0x30) {
558 /* nv28 behaviour (off-chip encoder)
559 *
560 * nv28 does a complex dance of first using byte 121 of
561 * the EDID to choose the lvdsmanufacturerindex, then
562 * later attempting to match the EDID manufacturer and
563 * product IDs in a table (signature 'pidt' (panel id
564 * table?)), setting an lvdsmanufacturerindex of 0 and
565 * an fp strap of the match index (or 0xf if none)
566 */
567 lvdsmanufacturerindex = 0;
568 } else {
569 /* nv31, nv34 behaviour */
570 lvdsmanufacturerindex = 0;
571 if (pxclk >= bios->fp.duallink_transition_clk)
572 lvdsmanufacturerindex = 2;
573 if (pxclk >= 140000)
574 lvdsmanufacturerindex = 3;
575 }
576
577 /*
578 * nvidia set the high nibble of (cr57=f, cr58) to
579 * lvdsmanufacturerindex in this case; we don't
580 */
581 break;
582 case 0x30: /* NV4x */
583 case 0x40: /* G80/G90 */
584 lvdsmanufacturerindex = fpstrapping;
585 break;
586 default:
587 NV_ERROR(drm, "LVDS table revision not currently supported\n");
588 return -ENOSYS;
589 }
590
591 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;
592 switch (lth.lvds_ver) {
593 case 0x0a:
594 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;
595 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;
596 bios->fp.dual_link = bios->data[lvdsofs] & 4;
597 bios->fp.link_c_increment = bios->data[lvdsofs] & 8;
598 *if_is_24bit = bios->data[lvdsofs] & 16;
599 break;
600 case 0x30:
601 case 0x40:
602 /*
603 * No sign of the "power off for reset" or "reset for panel
604 * on" bits, but it's safer to assume we should
605 */
606 bios->fp.power_off_for_reset = true;
607 bios->fp.reset_after_pclk_change = true;
608
609 /*
610 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is
611 * over-written, and if_is_24bit isn't used
612 */
613 bios->fp.dual_link = bios->data[lvdsofs] & 1;
614 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;
615 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
616 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
617 break;
618 }
619
620 /* set dual_link flag for EDID case */
621 if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
622 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
623
624 *dl = bios->fp.dual_link;
625
626 return 0;
627}
628
629int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk)
630{
631 /*
632 * the pxclk parameter is in kHz
633 *
634 * This runs the TMDS regs setting code found on BIT bios cards
635 *
636 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and
637 * ffs(or) == 3, use the second.
638 */
639
640 struct nouveau_drm *drm = nouveau_drm(dev);
641 struct nvif_object *device = &drm->client.device.object;
642 struct nvbios *bios = &drm->vbios;
643 int cv = bios->chip_version;
644 uint16_t clktable = 0, scriptptr;
645 uint32_t sel_clk_binding, sel_clk;
646
647 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */
648 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&
649 dcbent->location != DCB_LOC_ON_CHIP)
650 return 0;
651
652 switch (ffs(dcbent->or)) {
653 case 1:
654 clktable = bios->tmds.output0_script_ptr;
655 break;
656 case 2:
657 case 3:
658 clktable = bios->tmds.output1_script_ptr;
659 break;
660 }
661
662 if (!clktable) {
663 NV_ERROR(drm, "Pixel clock comparison table not found\n");
664 return -EINVAL;
665 }
666
667 scriptptr = clkcmptable(bios, clktable, pxclk);
668
669 if (!scriptptr) {
670 NV_ERROR(drm, "TMDS output init script not found\n");
671 return -ENOENT;
672 }
673
674 /* don't let script change pll->head binding */
675 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
676 run_digital_op_script(dev, scriptptr, dcbent, head, dl: pxclk >= 165000);
677 sel_clk = NVReadRAMDAC(dev, head: 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
678 NVWriteRAMDAC(dev, head: 0, NV_PRAMDAC_SEL_CLK, val: sel_clk | sel_clk_binding);
679
680 return 0;
681}
682
683static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)
684{
685 /*
686 * Parses the init table segment for pointers used in script execution.
687 *
688 * offset + 0 (16 bits): init script tables pointer
689 * offset + 2 (16 bits): macro index table pointer
690 * offset + 4 (16 bits): macro table pointer
691 * offset + 6 (16 bits): condition table pointer
692 * offset + 8 (16 bits): io condition table pointer
693 * offset + 10 (16 bits): io flag condition table pointer
694 * offset + 12 (16 bits): init function table pointer
695 */
696
697 bios->init_script_tbls_ptr = ROM16(bios->data[offset]);
698}
699
700static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
701{
702 /*
703 * Parses the load detect values for g80 cards.
704 *
705 * offset + 0 (16 bits): loadval table pointer
706 */
707
708 struct nouveau_drm *drm = nouveau_drm(dev);
709 uint16_t load_table_ptr;
710 uint8_t version, headerlen, entrylen, num_entries;
711
712 if (bitentry->length != 3) {
713 NV_ERROR(drm, "Do not understand BIT A table\n");
714 return -EINVAL;
715 }
716
717 load_table_ptr = ROM16(bios->data[bitentry->offset]);
718
719 if (load_table_ptr == 0x0) {
720 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n");
721 return -EINVAL;
722 }
723
724 version = bios->data[load_table_ptr];
725
726 if (version != 0x10) {
727 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n",
728 version >> 4, version & 0xF);
729 return -ENOSYS;
730 }
731
732 headerlen = bios->data[load_table_ptr + 1];
733 entrylen = bios->data[load_table_ptr + 2];
734 num_entries = bios->data[load_table_ptr + 3];
735
736 if (headerlen != 4 || entrylen != 4 || num_entries != 2) {
737 NV_ERROR(drm, "Do not understand BIT loadval table\n");
738 return -EINVAL;
739 }
740
741 /* First entry is normal dac, 2nd tv-out perhaps? */
742 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;
743
744 return 0;
745}
746
747static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
748{
749 /*
750 * Parses the flat panel table segment that the bit entry points to.
751 * Starting at bitentry->offset:
752 *
753 * offset + 0 (16 bits): ??? table pointer - seems to have 18 byte
754 * records beginning with a freq.
755 * offset + 2 (16 bits): mode table pointer
756 */
757 struct nouveau_drm *drm = nouveau_drm(dev);
758
759 if (bitentry->length != 4) {
760 NV_ERROR(drm, "Do not understand BIT display table\n");
761 return -EINVAL;
762 }
763
764 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);
765
766 return 0;
767}
768
769static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
770{
771 /*
772 * Parses the init table segment that the bit entry points to.
773 *
774 * See parse_script_table_pointers for layout
775 */
776 struct nouveau_drm *drm = nouveau_drm(dev);
777
778 if (bitentry->length < 14) {
779 NV_ERROR(drm, "Do not understand init table\n");
780 return -EINVAL;
781 }
782
783 parse_script_table_pointers(bios, offset: bitentry->offset);
784 return 0;
785}
786
787static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
788{
789 /*
790 * BIT 'i' (info?) table
791 *
792 * offset + 0 (32 bits): BIOS version dword (as in B table)
793 * offset + 5 (8 bits): BIOS feature byte (same as for BMP?)
794 * offset + 13 (16 bits): pointer to table containing DAC load
795 * detection comparison values
796 *
797 * There's other things in the table, purpose unknown
798 */
799
800 struct nouveau_drm *drm = nouveau_drm(dev);
801 uint16_t daccmpoffset;
802 uint8_t dacver, dacheaderlen;
803
804 if (bitentry->length < 6) {
805 NV_ERROR(drm, "BIT i table too short for needed information\n");
806 return -EINVAL;
807 }
808
809 /*
810 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's
811 * Quadro identity crisis), other bits possibly as for BMP feature byte
812 */
813 bios->feature_byte = bios->data[bitentry->offset + 5];
814 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;
815
816 if (bitentry->length < 15) {
817 NV_WARN(drm, "BIT i table not long enough for DAC load "
818 "detection comparison table\n");
819 return -EINVAL;
820 }
821
822 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);
823
824 /* doesn't exist on g80 */
825 if (!daccmpoffset)
826 return 0;
827
828 /*
829 * The first value in the table, following the header, is the
830 * comparison value, the second entry is a comparison value for
831 * TV load detection.
832 */
833
834 dacver = bios->data[daccmpoffset];
835 dacheaderlen = bios->data[daccmpoffset + 1];
836
837 if (dacver != 0x00 && dacver != 0x10) {
838 NV_WARN(drm, "DAC load detection comparison table version "
839 "%d.%d not known\n", dacver >> 4, dacver & 0xf);
840 return -ENOSYS;
841 }
842
843 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);
844 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);
845
846 return 0;
847}
848
849static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
850{
851 /*
852 * Parses the LVDS table segment that the bit entry points to.
853 * Starting at bitentry->offset:
854 *
855 * offset + 0 (16 bits): LVDS strap xlate table pointer
856 */
857
858 struct nouveau_drm *drm = nouveau_drm(dev);
859
860 if (bitentry->length != 2) {
861 NV_ERROR(drm, "Do not understand BIT LVDS table\n");
862 return -EINVAL;
863 }
864
865 /*
866 * No idea if it's still called the LVDS manufacturer table, but
867 * the concept's close enough.
868 */
869 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);
870
871 return 0;
872}
873
874static int
875parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
876 struct bit_entry *bitentry)
877{
878 /*
879 * offset + 2 (8 bits): number of options in an
880 * INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set
881 * offset + 3 (16 bits): pointer to strap xlate table for RAM
882 * restrict option selection
883 *
884 * There's a bunch of bits in this table other than the RAM restrict
885 * stuff that we don't use - their use currently unknown
886 */
887
888 /*
889 * Older bios versions don't have a sufficiently long table for
890 * what we want
891 */
892 if (bitentry->length < 0x5)
893 return 0;
894
895 if (bitentry->version < 2) {
896 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
897 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
898 } else {
899 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
900 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
901 }
902
903 return 0;
904}
905
906static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
907{
908 /*
909 * Parses the pointer to the TMDS table
910 *
911 * Starting at bitentry->offset:
912 *
913 * offset + 0 (16 bits): TMDS table pointer
914 *
915 * The TMDS table is typically found just before the DCB table, with a
916 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being
917 * length?)
918 *
919 * At offset +7 is a pointer to a script, which I don't know how to
920 * run yet.
921 * At offset +9 is a pointer to another script, likewise
922 * Offset +11 has a pointer to a table where the first word is a pxclk
923 * frequency and the second word a pointer to a script, which should be
924 * run if the comparison pxclk frequency is less than the pxclk desired.
925 * This repeats for decreasing comparison frequencies
926 * Offset +13 has a pointer to a similar table
927 * The selection of table (and possibly +7/+9 script) is dictated by
928 * "or" from the DCB.
929 */
930
931 struct nouveau_drm *drm = nouveau_drm(dev);
932 uint16_t tmdstableptr, script1, script2;
933
934 if (bitentry->length != 2) {
935 NV_ERROR(drm, "Do not understand BIT TMDS table\n");
936 return -EINVAL;
937 }
938
939 tmdstableptr = ROM16(bios->data[bitentry->offset]);
940 if (!tmdstableptr) {
941 NV_INFO(drm, "Pointer to TMDS table not found\n");
942 return -EINVAL;
943 }
944
945 NV_INFO(drm, "TMDS table version %d.%d\n",
946 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);
947
948 /* nv50+ has v2.0, but we don't parse it atm */
949 if (bios->data[tmdstableptr] != 0x11)
950 return -ENOSYS;
951
952 /*
953 * These two scripts are odd: they don't seem to get run even when
954 * they are not stubbed.
955 */
956 script1 = ROM16(bios->data[tmdstableptr + 7]);
957 script2 = ROM16(bios->data[tmdstableptr + 9]);
958 if (bios->data[script1] != 'q' || bios->data[script2] != 'q')
959 NV_WARN(drm, "TMDS table script pointers not stubbed\n");
960
961 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);
962 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);
963
964 return 0;
965}
966
967struct bit_table {
968 const char id;
969 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);
970};
971
972#define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })
973
974int
975bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit)
976{
977 struct nouveau_drm *drm = nouveau_drm(dev);
978 struct nvbios *bios = &drm->vbios;
979 u8 entries, *entry;
980
981 if (bios->type != NVBIOS_BIT)
982 return -ENODEV;
983
984 entries = bios->data[bios->offset + 10];
985 entry = &bios->data[bios->offset + 12];
986 while (entries--) {
987 if (entry[0] == id) {
988 bit->id = entry[0];
989 bit->version = entry[1];
990 bit->length = ROM16(entry[2]);
991 bit->offset = ROM16(entry[4]);
992 bit->data = ROMPTR(dev, entry[4]);
993 return 0;
994 }
995
996 entry += bios->data[bios->offset + 9];
997 }
998
999 return -ENOENT;
1000}
1001
1002static int
1003parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,
1004 struct bit_table *table)
1005{
1006 struct drm_device *dev = bios->dev;
1007 struct nouveau_drm *drm = nouveau_drm(dev);
1008 struct bit_entry bitentry;
1009
1010 if (bit_table(dev, id: table->id, bit: &bitentry) == 0)
1011 return table->parse_fn(dev, bios, &bitentry);
1012
1013 NV_INFO(drm, "BIT table '%c' not found\n", table->id);
1014 return -ENOSYS;
1015}
1016
1017static int
1018parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)
1019{
1020 int ret;
1021
1022 /*
1023 * The only restriction on parsing order currently is having 'i' first
1024 * for use of bios->*_version or bios->feature_byte while parsing;
1025 * functions shouldn't be actually *doing* anything apart from pulling
1026 * data from the image into the bios struct, thus no interdependencies
1027 */
1028 ret = parse_bit_table(bios, bitoffset, table: &BIT_TABLE('i', i));
1029 if (ret) /* info? */
1030 return ret;
1031 if (bios->major_version >= 0x60) /* g80+ */
1032 parse_bit_table(bios, bitoffset, table: &BIT_TABLE('A', A));
1033 parse_bit_table(bios, bitoffset, table: &BIT_TABLE('D', display));
1034 ret = parse_bit_table(bios, bitoffset, table: &BIT_TABLE('I', init));
1035 if (ret)
1036 return ret;
1037 parse_bit_table(bios, bitoffset, table: &BIT_TABLE('M', M)); /* memory? */
1038 parse_bit_table(bios, bitoffset, table: &BIT_TABLE('L', lvds));
1039 parse_bit_table(bios, bitoffset, table: &BIT_TABLE('T', tmds));
1040
1041 return 0;
1042}
1043
1044static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)
1045{
1046 /*
1047 * Parses the BMP structure for useful things, but does not act on them
1048 *
1049 * offset + 5: BMP major version
1050 * offset + 6: BMP minor version
1051 * offset + 9: BMP feature byte
1052 * offset + 10: BCD encoded BIOS version
1053 *
1054 * offset + 18: init script table pointer (for bios versions < 5.10h)
1055 * offset + 20: extra init script table pointer (for bios
1056 * versions < 5.10h)
1057 *
1058 * offset + 24: memory init table pointer (used on early bios versions)
1059 * offset + 26: SDR memory sequencing setup data table
1060 * offset + 28: DDR memory sequencing setup data table
1061 *
1062 * offset + 54: index of I2C CRTC pair to use for CRT output
1063 * offset + 55: index of I2C CRTC pair to use for TV output
1064 * offset + 56: index of I2C CRTC pair to use for flat panel output
1065 * offset + 58: write CRTC index for I2C pair 0
1066 * offset + 59: read CRTC index for I2C pair 0
1067 * offset + 60: write CRTC index for I2C pair 1
1068 * offset + 61: read CRTC index for I2C pair 1
1069 *
1070 * offset + 67: maximum internal PLL frequency (single stage PLL)
1071 * offset + 71: minimum internal PLL frequency (single stage PLL)
1072 *
1073 * offset + 75: script table pointers, as described in
1074 * parse_script_table_pointers
1075 *
1076 * offset + 89: TMDS single link output A table pointer
1077 * offset + 91: TMDS single link output B table pointer
1078 * offset + 95: LVDS single link output A table pointer
1079 * offset + 105: flat panel timings table pointer
1080 * offset + 107: flat panel strapping translation table pointer
1081 * offset + 117: LVDS manufacturer panel config table pointer
1082 * offset + 119: LVDS manufacturer strapping translation table pointer
1083 *
1084 * offset + 142: PLL limits table pointer
1085 *
1086 * offset + 156: minimum pixel clock for LVDS dual link
1087 */
1088
1089 struct nouveau_drm *drm = nouveau_drm(dev);
1090 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
1091 uint16_t bmplength;
1092 uint16_t legacy_scripts_offset, legacy_i2c_offset;
1093
1094 /* load needed defaults in case we can't parse this info */
1095 bios->digital_min_front_porch = 0x4b;
1096 bios->fmaxvco = 256000;
1097 bios->fminvco = 128000;
1098 bios->fp.duallink_transition_clk = 90000;
1099
1100 bmp_version_major = bmp[5];
1101 bmp_version_minor = bmp[6];
1102
1103 NV_INFO(drm, "BMP version %d.%d\n",
1104 bmp_version_major, bmp_version_minor);
1105
1106 /*
1107 * Make sure that 0x36 is blank and can't be mistaken for a DCB
1108 * pointer on early versions
1109 */
1110 if (bmp_version_major < 5)
1111 *(uint16_t *)&bios->data[0x36] = 0;
1112
1113 /*
1114 * Seems that the minor version was 1 for all major versions prior
1115 * to 5. Version 6 could theoretically exist, but I suspect BIT
1116 * happened instead.
1117 */
1118 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {
1119 NV_ERROR(drm, "You have an unsupported BMP version. "
1120 "Please send in your bios\n");
1121 return -ENOSYS;
1122 }
1123
1124 if (bmp_version_major == 0)
1125 /* nothing that's currently useful in this version */
1126 return 0;
1127 else if (bmp_version_major == 1)
1128 bmplength = 44; /* exact for 1.01 */
1129 else if (bmp_version_major == 2)
1130 bmplength = 48; /* exact for 2.01 */
1131 else if (bmp_version_major == 3)
1132 bmplength = 54;
1133 /* guessed - mem init tables added in this version */
1134 else if (bmp_version_major == 4 || bmp_version_minor < 0x1)
1135 /* don't know if 5.0 exists... */
1136 bmplength = 62;
1137 /* guessed - BMP I2C indices added in version 4*/
1138 else if (bmp_version_minor < 0x6)
1139 bmplength = 67; /* exact for 5.01 */
1140 else if (bmp_version_minor < 0x10)
1141 bmplength = 75; /* exact for 5.06 */
1142 else if (bmp_version_minor == 0x10)
1143 bmplength = 89; /* exact for 5.10h */
1144 else if (bmp_version_minor < 0x14)
1145 bmplength = 118; /* exact for 5.11h */
1146 else if (bmp_version_minor < 0x24)
1147 /*
1148 * Not sure of version where pll limits came in;
1149 * certainly exist by 0x24 though.
1150 */
1151 /* length not exact: this is long enough to get lvds members */
1152 bmplength = 123;
1153 else if (bmp_version_minor < 0x27)
1154 /*
1155 * Length not exact: this is long enough to get pll limit
1156 * member
1157 */
1158 bmplength = 144;
1159 else
1160 /*
1161 * Length not exact: this is long enough to get dual link
1162 * transition clock.
1163 */
1164 bmplength = 158;
1165
1166 /* checksum */
1167 if (nv_cksum(data: bmp, length: 8)) {
1168 NV_ERROR(drm, "Bad BMP checksum\n");
1169 return -EINVAL;
1170 }
1171
1172 /*
1173 * Bit 4 seems to indicate either a mobile bios or a quadro card --
1174 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl
1175 * (not nv10gl), bit 5 that the flat panel tables are present, and
1176 * bit 6 a tv bios.
1177 */
1178 bios->feature_byte = bmp[9];
1179
1180 if (bmp_version_major < 5 || bmp_version_minor < 0x10)
1181 bios->old_style_init = true;
1182 legacy_scripts_offset = 18;
1183 if (bmp_version_major < 2)
1184 legacy_scripts_offset -= 4;
1185 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);
1186 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);
1187
1188 if (bmp_version_major > 2) { /* appears in BMP 3 */
1189 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);
1190 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);
1191 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);
1192 }
1193
1194 legacy_i2c_offset = 0x48; /* BMP version 2 & 3 */
1195 if (bmplength > 61)
1196 legacy_i2c_offset = offset + 54;
1197 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
1198 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
1199 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
1200
1201 if (bmplength > 74) {
1202 bios->fmaxvco = ROM32(bmp[67]);
1203 bios->fminvco = ROM32(bmp[71]);
1204 }
1205 if (bmplength > 88)
1206 parse_script_table_pointers(bios, offset: offset + 75);
1207 if (bmplength > 94) {
1208 bios->tmds.output0_script_ptr = ROM16(bmp[89]);
1209 bios->tmds.output1_script_ptr = ROM16(bmp[91]);
1210 /*
1211 * Never observed in use with lvds scripts, but is reused for
1212 * 18/24 bit panel interface default for EDID equipped panels
1213 * (if_is_24bit not set directly to avoid any oscillation).
1214 */
1215 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);
1216 }
1217 if (bmplength > 108) {
1218 bios->fp.fptablepointer = ROM16(bmp[105]);
1219 bios->fp.fpxlatetableptr = ROM16(bmp[107]);
1220 bios->fp.xlatwidth = 1;
1221 }
1222 if (bmplength > 120) {
1223 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);
1224 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);
1225 }
1226#if 0
1227 if (bmplength > 143)
1228 bios->pll_limit_tbl_ptr = ROM16(bmp[142]);
1229#endif
1230
1231 if (bmplength > 157)
1232 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;
1233
1234 return 0;
1235}
1236
1237static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
1238{
1239 int i, j;
1240
1241 for (i = 0; i <= (n - len); i++) {
1242 for (j = 0; j < len; j++)
1243 if (data[i + j] != str[j])
1244 break;
1245 if (j == len)
1246 return i;
1247 }
1248
1249 return 0;
1250}
1251
1252void *
1253olddcb_table(struct drm_device *dev)
1254{
1255 struct nouveau_drm *drm = nouveau_drm(dev);
1256 u8 *dcb = NULL;
1257
1258 if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT)
1259 dcb = ROMPTR(dev, drm->vbios.data[0x36]);
1260 if (!dcb) {
1261 NV_WARN(drm, "No DCB data found in VBIOS\n");
1262 return NULL;
1263 }
1264
1265 if (dcb[0] >= 0x42) {
1266 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]);
1267 return NULL;
1268 } else
1269 if (dcb[0] >= 0x30) {
1270 if (ROM32(dcb[6]) == 0x4edcbdcb)
1271 return dcb;
1272 } else
1273 if (dcb[0] >= 0x20) {
1274 if (ROM32(dcb[4]) == 0x4edcbdcb)
1275 return dcb;
1276 } else
1277 if (dcb[0] >= 0x15) {
1278 if (!memcmp(p: &dcb[-7], q: "DEV_REC", size: 7))
1279 return dcb;
1280 } else {
1281 /*
1282 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but
1283 * always has the same single (crt) entry, even when tv-out
1284 * present, so the conclusion is this version cannot really
1285 * be used.
1286 *
1287 * v1.2 tables (some NV6/10, and NV15+) normally have the
1288 * same 5 entries, which are not specific to the card and so
1289 * no use.
1290 *
1291 * v1.2 does have an I2C table that read_dcb_i2c_table can
1292 * handle, but cards exist (nv11 in #14821) with a bad i2c
1293 * table pointer, so use the indices parsed in
1294 * parse_bmp_structure.
1295 *
1296 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful
1297 */
1298 NV_WARN(drm, "No useful DCB data in VBIOS\n");
1299 return NULL;
1300 }
1301
1302 NV_WARN(drm, "DCB header validation failed\n");
1303 return NULL;
1304}
1305
1306void *
1307olddcb_outp(struct drm_device *dev, u8 idx)
1308{
1309 u8 *dcb = olddcb_table(dev);
1310 if (dcb && dcb[0] >= 0x30) {
1311 if (idx < dcb[2])
1312 return dcb + dcb[1] + (idx * dcb[3]);
1313 } else
1314 if (dcb && dcb[0] >= 0x20) {
1315 u8 *i2c = ROMPTR(dev, dcb[2]);
1316 u8 *ent = dcb + 8 + (idx * 8);
1317 if (i2c && ent < i2c)
1318 return ent;
1319 } else
1320 if (dcb && dcb[0] >= 0x15) {
1321 u8 *i2c = ROMPTR(dev, dcb[2]);
1322 u8 *ent = dcb + 4 + (idx * 10);
1323 if (i2c && ent < i2c)
1324 return ent;
1325 }
1326
1327 return NULL;
1328}
1329
1330int
1331olddcb_outp_foreach(struct drm_device *dev, void *data,
1332 int (*exec)(struct drm_device *, void *, int idx, u8 *outp))
1333{
1334 int ret, idx = -1;
1335 u8 *outp = NULL;
1336 while ((outp = olddcb_outp(dev, idx: ++idx))) {
1337 if (ROM32(outp[0]) == 0x00000000)
1338 break; /* seen on an NV11 with DCB v1.5 */
1339 if (ROM32(outp[0]) == 0xffffffff)
1340 break; /* seen on an NV17 with DCB v2.0 */
1341
1342 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED)
1343 continue;
1344 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL)
1345 break;
1346
1347 ret = exec(dev, data, idx, outp);
1348 if (ret)
1349 return ret;
1350 }
1351
1352 return 0;
1353}
1354
1355u8 *
1356olddcb_conntab(struct drm_device *dev)
1357{
1358 u8 *dcb = olddcb_table(dev);
1359 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) {
1360 u8 *conntab = ROMPTR(dev, dcb[0x14]);
1361 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40)
1362 return conntab;
1363 }
1364 return NULL;
1365}
1366
1367u8 *
1368olddcb_conn(struct drm_device *dev, u8 idx)
1369{
1370 u8 *conntab = olddcb_conntab(dev);
1371 if (conntab && idx < conntab[2])
1372 return conntab + conntab[1] + (idx * conntab[3]);
1373 return NULL;
1374}
1375
1376static struct dcb_output *new_dcb_entry(struct dcb_table *dcb)
1377{
1378 struct dcb_output *entry = &dcb->entry[dcb->entries];
1379
1380 memset(entry, 0, sizeof(struct dcb_output));
1381 entry->index = dcb->entries++;
1382
1383 return entry;
1384}
1385
1386static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c,
1387 int heads, int or)
1388{
1389 struct dcb_output *entry = new_dcb_entry(dcb);
1390
1391 entry->type = type;
1392 entry->i2c_index = i2c;
1393 entry->heads = heads;
1394 if (type != DCB_OUTPUT_ANALOG)
1395 entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */
1396 entry->or = or;
1397}
1398
1399static bool
1400parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,
1401 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1402{
1403 struct nouveau_drm *drm = nouveau_drm(dev);
1404 int link = 0;
1405
1406 entry->type = conn & 0xf;
1407 entry->i2c_index = (conn >> 4) & 0xf;
1408 entry->heads = (conn >> 8) & 0xf;
1409 entry->connector = (conn >> 12) & 0xf;
1410 entry->bus = (conn >> 16) & 0xf;
1411 entry->location = (conn >> 20) & 0x3;
1412 entry->or = (conn >> 24) & 0xf;
1413
1414 switch (entry->type) {
1415 case DCB_OUTPUT_ANALOG:
1416 /*
1417 * Although the rest of a CRT conf dword is usually
1418 * zeros, mac biosen have stuff there so we must mask
1419 */
1420 entry->crtconf.maxfreq = (dcb->version < 0x30) ?
1421 (conf & 0xffff) * 10 :
1422 (conf & 0xff) * 10000;
1423 break;
1424 case DCB_OUTPUT_LVDS:
1425 {
1426 uint32_t mask;
1427 if (conf & 0x1)
1428 entry->lvdsconf.use_straps_for_mode = true;
1429 if (dcb->version < 0x22) {
1430 mask = ~0xd;
1431 /*
1432 * The laptop in bug 14567 lies and claims to not use
1433 * straps when it does, so assume all DCB 2.0 laptops
1434 * use straps, until a broken EDID using one is produced
1435 */
1436 entry->lvdsconf.use_straps_for_mode = true;
1437 /*
1438 * Both 0x4 and 0x8 show up in v2.0 tables; assume they
1439 * mean the same thing (probably wrong, but might work)
1440 */
1441 if (conf & 0x4 || conf & 0x8)
1442 entry->lvdsconf.use_power_scripts = true;
1443 } else {
1444 mask = ~0x7;
1445 if (conf & 0x2)
1446 entry->lvdsconf.use_acpi_for_edid = true;
1447 if (conf & 0x4)
1448 entry->lvdsconf.use_power_scripts = true;
1449 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;
1450 link = entry->lvdsconf.sor.link;
1451 }
1452 if (conf & mask) {
1453 /*
1454 * Until we even try to use these on G8x, it's
1455 * useless reporting unknown bits. They all are.
1456 */
1457 if (dcb->version >= 0x40)
1458 break;
1459
1460 NV_ERROR(drm, "Unknown LVDS configuration bits, "
1461 "please report\n");
1462 }
1463 break;
1464 }
1465 case DCB_OUTPUT_TV:
1466 {
1467 if (dcb->version >= 0x30)
1468 entry->tvconf.has_component_output = conf & (0x8 << 4);
1469 else
1470 entry->tvconf.has_component_output = false;
1471
1472 break;
1473 }
1474 case DCB_OUTPUT_DP:
1475 entry->dpconf.sor.link = (conf & 0x00000030) >> 4;
1476 entry->extdev = (conf & 0x0000ff00) >> 8;
1477 switch ((conf & 0x00e00000) >> 21) {
1478 case 0:
1479 entry->dpconf.link_bw = 162000;
1480 break;
1481 case 1:
1482 entry->dpconf.link_bw = 270000;
1483 break;
1484 case 2:
1485 entry->dpconf.link_bw = 540000;
1486 break;
1487 case 3:
1488 default:
1489 entry->dpconf.link_bw = 810000;
1490 break;
1491 }
1492 switch ((conf & 0x0f000000) >> 24) {
1493 case 0xf:
1494 case 0x4:
1495 entry->dpconf.link_nr = 4;
1496 break;
1497 case 0x3:
1498 case 0x2:
1499 entry->dpconf.link_nr = 2;
1500 break;
1501 default:
1502 entry->dpconf.link_nr = 1;
1503 break;
1504 }
1505 link = entry->dpconf.sor.link;
1506 break;
1507 case DCB_OUTPUT_TMDS:
1508 if (dcb->version >= 0x40) {
1509 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;
1510 entry->extdev = (conf & 0x0000ff00) >> 8;
1511 link = entry->tmdsconf.sor.link;
1512 }
1513 else if (dcb->version >= 0x30)
1514 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8;
1515 else if (dcb->version >= 0x22)
1516 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4;
1517 break;
1518 case DCB_OUTPUT_EOL:
1519 /* weird g80 mobile type that "nv" treats as a terminator */
1520 dcb->entries--;
1521 return false;
1522 default:
1523 break;
1524 }
1525
1526 if (dcb->version < 0x40) {
1527 /* Normal entries consist of a single bit, but dual link has
1528 * the next most significant bit set too
1529 */
1530 entry->duallink_possible =
1531 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or);
1532 } else {
1533 entry->duallink_possible = (entry->sorconf.link == 3);
1534 }
1535
1536 /* unsure what DCB version introduces this, 3.0? */
1537 if (conf & 0x100000)
1538 entry->i2c_upper_default = true;
1539
1540 entry->hasht = (entry->extdev << 8) | (entry->location << 4) |
1541 entry->type;
1542 entry->hashm = (entry->heads << 8) | (link << 6) | entry->or;
1543 return true;
1544}
1545
1546static bool
1547parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,
1548 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1549{
1550 struct nouveau_drm *drm = nouveau_drm(dev);
1551
1552 switch (conn & 0x0000000f) {
1553 case 0:
1554 entry->type = DCB_OUTPUT_ANALOG;
1555 break;
1556 case 1:
1557 entry->type = DCB_OUTPUT_TV;
1558 break;
1559 case 2:
1560 case 4:
1561 if (conn & 0x10)
1562 entry->type = DCB_OUTPUT_LVDS;
1563 else
1564 entry->type = DCB_OUTPUT_TMDS;
1565 break;
1566 case 3:
1567 entry->type = DCB_OUTPUT_LVDS;
1568 break;
1569 default:
1570 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f);
1571 return false;
1572 }
1573
1574 entry->i2c_index = (conn & 0x0003c000) >> 14;
1575 entry->heads = ((conn & 0x001c0000) >> 18) + 1;
1576 entry->or = entry->heads; /* same as heads, hopefully safe enough */
1577 entry->location = (conn & 0x01e00000) >> 21;
1578 entry->bus = (conn & 0x0e000000) >> 25;
1579 entry->duallink_possible = false;
1580
1581 switch (entry->type) {
1582 case DCB_OUTPUT_ANALOG:
1583 entry->crtconf.maxfreq = (conf & 0xffff) * 10;
1584 break;
1585 case DCB_OUTPUT_TV:
1586 entry->tvconf.has_component_output = false;
1587 break;
1588 case DCB_OUTPUT_LVDS:
1589 if ((conn & 0x00003f00) >> 8 != 0x10)
1590 entry->lvdsconf.use_straps_for_mode = true;
1591 entry->lvdsconf.use_power_scripts = true;
1592 break;
1593 default:
1594 break;
1595 }
1596
1597 return true;
1598}
1599
1600static
1601void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
1602{
1603 /*
1604 * DCB v2.0 lists each output combination separately.
1605 * Here we merge compatible entries to have fewer outputs, with
1606 * more options
1607 */
1608
1609 struct nouveau_drm *drm = nouveau_drm(dev);
1610 int i, newentries = 0;
1611
1612 for (i = 0; i < dcb->entries; i++) {
1613 struct dcb_output *ient = &dcb->entry[i];
1614 int j;
1615
1616 for (j = i + 1; j < dcb->entries; j++) {
1617 struct dcb_output *jent = &dcb->entry[j];
1618
1619 if (jent->type == 100) /* already merged entry */
1620 continue;
1621
1622 /* merge heads field when all other fields the same */
1623 if (jent->i2c_index == ient->i2c_index &&
1624 jent->type == ient->type &&
1625 jent->location == ient->location &&
1626 jent->or == ient->or) {
1627 NV_INFO(drm, "Merging DCB entries %d and %d\n",
1628 i, j);
1629 ient->heads |= jent->heads;
1630 jent->type = 100; /* dummy value */
1631 }
1632 }
1633 }
1634
1635 /* Compact entries merged into others out of dcb */
1636 for (i = 0; i < dcb->entries; i++) {
1637 if (dcb->entry[i].type == 100)
1638 continue;
1639
1640 if (newentries != i) {
1641 dcb->entry[newentries] = dcb->entry[i];
1642 dcb->entry[newentries].index = newentries;
1643 }
1644 newentries++;
1645 }
1646
1647 dcb->entries = newentries;
1648}
1649
1650static bool
1651apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
1652{
1653 struct nouveau_drm *drm = nouveau_drm(dev);
1654 struct dcb_table *dcb = &drm->vbios.dcb;
1655
1656 /* Dell Precision M6300
1657 * DCB entry 2: 02025312 00000010
1658 * DCB entry 3: 02026312 00000020
1659 *
1660 * Identical, except apparently a different connector on a
1661 * different SOR link. Not a clue how we're supposed to know
1662 * which one is in use if it even shares an i2c line...
1663 *
1664 * Ignore the connector on the second SOR link to prevent
1665 * nasty problems until this is sorted (assuming it's not a
1666 * VBIOS bug).
1667 */
1668 if (nv_match_device(dev, device: 0x040d, sub_vendor: 0x1028, sub_device: 0x019b)) {
1669 if (*conn == 0x02026312 && *conf == 0x00000020)
1670 return false;
1671 }
1672
1673 /* GeForce3 Ti 200
1674 *
1675 * DCB reports an LVDS output that should be TMDS:
1676 * DCB entry 1: f2005014 ffffffff
1677 */
1678 if (nv_match_device(dev, device: 0x0201, sub_vendor: 0x1462, sub_device: 0x8851)) {
1679 if (*conn == 0xf2005014 && *conf == 0xffffffff) {
1680 fabricate_dcb_output(dcb, type: DCB_OUTPUT_TMDS, i2c: 1, heads: 1, or: 1);
1681 return false;
1682 }
1683 }
1684
1685 /* XFX GT-240X-YA
1686 *
1687 * So many things wrong here, replace the entire encoder table..
1688 */
1689 if (nv_match_device(dev, device: 0x0ca3, sub_vendor: 0x1682, sub_device: 0x3003)) {
1690 if (idx == 0) {
1691 *conn = 0x02001300; /* VGA, connector 1 */
1692 *conf = 0x00000028;
1693 } else
1694 if (idx == 1) {
1695 *conn = 0x01010312; /* DVI, connector 0 */
1696 *conf = 0x00020030;
1697 } else
1698 if (idx == 2) {
1699 *conn = 0x01010310; /* VGA, connector 0 */
1700 *conf = 0x00000028;
1701 } else
1702 if (idx == 3) {
1703 *conn = 0x02022362; /* HDMI, connector 2 */
1704 *conf = 0x00020010;
1705 } else {
1706 *conn = 0x0000000e; /* EOL */
1707 *conf = 0x00000000;
1708 }
1709 }
1710
1711 /* Some other twisted XFX board (rhbz#694914)
1712 *
1713 * The DVI/VGA encoder combo that's supposed to represent the
1714 * DVI-I connector actually point at two different ones, and
1715 * the HDMI connector ends up paired with the VGA instead.
1716 *
1717 * Connector table is missing anything for VGA at all, pointing it
1718 * an invalid conntab entry 2 so we figure it out ourself.
1719 */
1720 if (nv_match_device(dev, device: 0x0615, sub_vendor: 0x1682, sub_device: 0x2605)) {
1721 if (idx == 0) {
1722 *conn = 0x02002300; /* VGA, connector 2 */
1723 *conf = 0x00000028;
1724 } else
1725 if (idx == 1) {
1726 *conn = 0x01010312; /* DVI, connector 0 */
1727 *conf = 0x00020030;
1728 } else
1729 if (idx == 2) {
1730 *conn = 0x04020310; /* VGA, connector 0 */
1731 *conf = 0x00000028;
1732 } else
1733 if (idx == 3) {
1734 *conn = 0x02021322; /* HDMI, connector 1 */
1735 *conf = 0x00020010;
1736 } else {
1737 *conn = 0x0000000e; /* EOL */
1738 *conf = 0x00000000;
1739 }
1740 }
1741
1742 /* fdo#50830: connector indices for VGA and DVI-I are backwards */
1743 if (nv_match_device(dev, device: 0x0421, sub_vendor: 0x3842, sub_device: 0xc793)) {
1744 if (idx == 0 && *conn == 0x02000300)
1745 *conn = 0x02011300;
1746 else
1747 if (idx == 1 && *conn == 0x04011310)
1748 *conn = 0x04000310;
1749 else
1750 if (idx == 2 && *conn == 0x02011312)
1751 *conn = 0x02000312;
1752 }
1753
1754 return true;
1755}
1756
1757static void
1758fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios)
1759{
1760 struct dcb_table *dcb = &bios->dcb;
1761 int all_heads = (nv_two_heads(dev) ? 3 : 1);
1762
1763#ifdef __powerpc__
1764 /* Apple iMac G4 NV17 */
1765 if (of_machine_is_compatible("PowerMac4,5")) {
1766 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1);
1767 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2);
1768 return;
1769 }
1770#endif
1771
1772 /* Make up some sane defaults */
1773 fabricate_dcb_output(dcb, type: DCB_OUTPUT_ANALOG,
1774 i2c: bios->legacy.i2c_indices.crt, heads: 1, or: 1);
1775
1776 if (nv04_tv_identify(dev, i2c_index: bios->legacy.i2c_indices.tv) >= 0)
1777 fabricate_dcb_output(dcb, type: DCB_OUTPUT_TV,
1778 i2c: bios->legacy.i2c_indices.tv,
1779 heads: all_heads, or: 0);
1780
1781 else if (bios->tmds.output0_script_ptr ||
1782 bios->tmds.output1_script_ptr)
1783 fabricate_dcb_output(dcb, type: DCB_OUTPUT_TMDS,
1784 i2c: bios->legacy.i2c_indices.panel,
1785 heads: all_heads, or: 1);
1786}
1787
1788static int
1789parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp)
1790{
1791 struct nouveau_drm *drm = nouveau_drm(dev);
1792 struct dcb_table *dcb = &drm->vbios.dcb;
1793 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]);
1794 u32 conn = ROM32(outp[0]);
1795 bool ret;
1796
1797 if (apply_dcb_encoder_quirks(dev, idx, conn: &conn, conf: &conf)) {
1798 struct dcb_output *entry = new_dcb_entry(dcb);
1799
1800 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf);
1801
1802 if (dcb->version >= 0x20)
1803 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry);
1804 else
1805 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry);
1806 entry->id = idx;
1807
1808 if (!ret)
1809 return 1; /* stop parsing */
1810
1811 /* Ignore the I2C index for on-chip TV-out, as there
1812 * are cards with bogus values (nv31m in bug 23212),
1813 * and it's otherwise useless.
1814 */
1815 if (entry->type == DCB_OUTPUT_TV &&
1816 entry->location == DCB_LOC_ON_CHIP)
1817 entry->i2c_index = 0x0f;
1818 }
1819
1820 return 0;
1821}
1822
1823static void
1824dcb_fake_connectors(struct nvbios *bios)
1825{
1826 struct dcb_table *dcbt = &bios->dcb;
1827 u8 map[16] = { };
1828 int i, idx = 0;
1829
1830 /* heuristic: if we ever get a non-zero connector field, assume
1831 * that all the indices are valid and we don't need fake them.
1832 *
1833 * and, as usual, a blacklist of boards with bad bios data..
1834 */
1835 if (!nv_match_device(dev: bios->dev, device: 0x0392, sub_vendor: 0x107d, sub_device: 0x20a2)) {
1836 for (i = 0; i < dcbt->entries; i++) {
1837 if (dcbt->entry[i].connector)
1838 return;
1839 }
1840 }
1841
1842 /* no useful connector info available, we need to make it up
1843 * ourselves. the rule here is: anything on the same i2c bus
1844 * is considered to be on the same connector. any output
1845 * without an associated i2c bus is assigned its own unique
1846 * connector index.
1847 */
1848 for (i = 0; i < dcbt->entries; i++) {
1849 u8 i2c = dcbt->entry[i].i2c_index;
1850 if (i2c == 0x0f) {
1851 dcbt->entry[i].connector = idx++;
1852 } else {
1853 if (!map[i2c])
1854 map[i2c] = ++idx;
1855 dcbt->entry[i].connector = map[i2c] - 1;
1856 }
1857 }
1858
1859 /* if we created more than one connector, destroy the connector
1860 * table - just in case it has random, rather than stub, entries.
1861 */
1862 if (i > 1) {
1863 u8 *conntab = olddcb_conntab(dev: bios->dev);
1864 if (conntab)
1865 conntab[0] = 0x00;
1866 }
1867}
1868
1869static int
1870parse_dcb_table(struct drm_device *dev, struct nvbios *bios)
1871{
1872 struct nouveau_drm *drm = nouveau_drm(dev);
1873 struct dcb_table *dcb = &bios->dcb;
1874 u8 *dcbt, *conn;
1875 int idx;
1876
1877 dcbt = olddcb_table(dev);
1878 if (!dcbt) {
1879 /* handle pre-DCB boards */
1880 if (bios->type == NVBIOS_BMP) {
1881 fabricate_dcb_encoder_table(dev, bios);
1882 return 0;
1883 }
1884
1885 return -EINVAL;
1886 }
1887
1888 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf);
1889
1890 dcb->version = dcbt[0];
1891 olddcb_outp_foreach(dev, NULL, exec: parse_dcb_entry);
1892
1893 /*
1894 * apart for v2.1+ not being known for requiring merging, this
1895 * guarantees dcbent->index is the index of the entry in the rom image
1896 */
1897 if (dcb->version < 0x21)
1898 merge_like_dcb_entries(dev, dcb);
1899
1900 /* dump connector table entries to log, if any exist */
1901 idx = -1;
1902 while ((conn = olddcb_conn(dev, idx: ++idx))) {
1903 if (conn[0] != 0xff) {
1904 if (olddcb_conntab(dev)[3] < 4)
1905 NV_INFO(drm, "DCB conn %02d: %04x\n",
1906 idx, ROM16(conn[0]));
1907 else
1908 NV_INFO(drm, "DCB conn %02d: %08x\n",
1909 idx, ROM32(conn[0]));
1910 }
1911 }
1912 dcb_fake_connectors(bios);
1913 return 0;
1914}
1915
1916static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)
1917{
1918 /*
1919 * The header following the "HWSQ" signature has the number of entries,
1920 * and the entry size
1921 *
1922 * An entry consists of a dword to write to the sequencer control reg
1923 * (0x00001304), followed by the ucode bytes, written sequentially,
1924 * starting at reg 0x00001400
1925 */
1926
1927 struct nouveau_drm *drm = nouveau_drm(dev);
1928 struct nvif_object *device = &drm->client.device.object;
1929 uint8_t bytes_to_write;
1930 uint16_t hwsq_entry_offset;
1931 int i;
1932
1933 if (bios->data[hwsq_offset] <= entry) {
1934 NV_ERROR(drm, "Too few entries in HW sequencer table for "
1935 "requested entry\n");
1936 return -ENOENT;
1937 }
1938
1939 bytes_to_write = bios->data[hwsq_offset + 1];
1940
1941 if (bytes_to_write != 36) {
1942 NV_ERROR(drm, "Unknown HW sequencer entry size\n");
1943 return -EINVAL;
1944 }
1945
1946 NV_INFO(drm, "Loading NV17 power sequencing microcode\n");
1947
1948 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;
1949
1950 /* set sequencer control */
1951 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
1952 bytes_to_write -= 4;
1953
1954 /* write ucode */
1955 for (i = 0; i < bytes_to_write; i += 4)
1956 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
1957
1958 /* twiddle NV_PBUS_DEBUG_4 */
1959 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18);
1960
1961 return 0;
1962}
1963
1964static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
1965 struct nvbios *bios)
1966{
1967 /*
1968 * BMP based cards, from NV17, need a microcode loading to correctly
1969 * control the GPIO etc for LVDS panels
1970 *
1971 * BIT based cards seem to do this directly in the init scripts
1972 *
1973 * The microcode entries are found by the "HWSQ" signature.
1974 */
1975
1976 static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
1977 const int sz = sizeof(hwsq_signature);
1978 int hwsq_offset;
1979
1980 hwsq_offset = findstr(data: bios->data, n: bios->length, str: hwsq_signature, len: sz);
1981 if (!hwsq_offset)
1982 return 0;
1983
1984 /* always use entry 0? */
1985 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset: hwsq_offset + sz, entry: 0);
1986}
1987
1988uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
1989{
1990 struct nouveau_drm *drm = nouveau_drm(dev);
1991 struct nvbios *bios = &drm->vbios;
1992 static const uint8_t edid_sig[] = {
1993 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
1994 uint16_t offset = 0;
1995 uint16_t newoffset;
1996 int searchlen = NV_PROM_SIZE;
1997
1998 if (bios->fp.edid)
1999 return bios->fp.edid;
2000
2001 while (searchlen) {
2002 newoffset = findstr(data: &bios->data[offset], n: searchlen,
2003 str: edid_sig, len: 8);
2004 if (!newoffset)
2005 return NULL;
2006 offset += newoffset;
2007 if (!nv_cksum(data: &bios->data[offset], EDID1_LEN))
2008 break;
2009
2010 searchlen -= offset;
2011 offset++;
2012 }
2013
2014 NV_INFO(drm, "Found EDID in BIOS\n");
2015
2016 return bios->fp.edid = &bios->data[offset];
2017}
2018
2019static bool NVInitVBIOS(struct drm_device *dev)
2020{
2021 struct nouveau_drm *drm = nouveau_drm(dev);
2022 struct nvkm_bios *bios = nvxx_bios(&drm->client.device);
2023 struct nvbios *legacy = &drm->vbios;
2024
2025 memset(legacy, 0, sizeof(struct nvbios));
2026 spin_lock_init(&legacy->lock);
2027 legacy->dev = dev;
2028
2029 legacy->data = bios->data;
2030 legacy->length = bios->size;
2031 legacy->major_version = bios->version.major;
2032 legacy->chip_version = bios->version.chip;
2033 if (bios->bit_offset) {
2034 legacy->type = NVBIOS_BIT;
2035 legacy->offset = bios->bit_offset;
2036 return !parse_bit_structure(bios: legacy, bitoffset: legacy->offset + 6);
2037 } else
2038 if (bios->bmp_offset) {
2039 legacy->type = NVBIOS_BMP;
2040 legacy->offset = bios->bmp_offset;
2041 return !parse_bmp_structure(dev, bios: legacy, offset: legacy->offset);
2042 }
2043
2044 return false;
2045}
2046
2047int
2048nouveau_run_vbios_init(struct drm_device *dev)
2049{
2050 struct nouveau_drm *drm = nouveau_drm(dev);
2051 struct nvbios *bios = &drm->vbios;
2052
2053 /* Reset the BIOS head to 0. */
2054 bios->state.crtchead = 0;
2055
2056 if (bios->major_version < 5) /* BMP only */
2057 load_nv17_hw_sequencer_ucode(dev, bios);
2058
2059 if (bios->execute) {
2060 bios->fp.last_script_invoc = 0;
2061 bios->fp.lvds_init_run = false;
2062 }
2063
2064 return 0;
2065}
2066
2067static bool
2068nouveau_bios_posted(struct drm_device *dev)
2069{
2070 struct nouveau_drm *drm = nouveau_drm(dev);
2071 unsigned htotal;
2072
2073 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
2074 return true;
2075
2076 htotal = NVReadVgaCrtc(dev, head: 0, index: 0x06);
2077 htotal |= (NVReadVgaCrtc(dev, head: 0, index: 0x07) & 0x01) << 8;
2078 htotal |= (NVReadVgaCrtc(dev, head: 0, index: 0x07) & 0x20) << 4;
2079 htotal |= (NVReadVgaCrtc(dev, head: 0, index: 0x25) & 0x01) << 10;
2080 htotal |= (NVReadVgaCrtc(dev, head: 0, index: 0x41) & 0x01) << 11;
2081 return (htotal != 0);
2082}
2083
2084int
2085nouveau_bios_init(struct drm_device *dev)
2086{
2087 struct nouveau_drm *drm = nouveau_drm(dev);
2088 struct nvbios *bios = &drm->vbios;
2089 int ret;
2090
2091 /* only relevant for PCI devices */
2092 if (!dev_is_pci(dev->dev) ||
2093 nvkm_gsp_rm(nvxx_device(&drm->client.device)->gsp))
2094 return 0;
2095
2096 if (!NVInitVBIOS(dev))
2097 return -ENODEV;
2098
2099 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
2100 ret = parse_dcb_table(dev, bios);
2101 if (ret)
2102 return ret;
2103 }
2104
2105 if (!bios->major_version) /* we don't run version 0 bios */
2106 return 0;
2107
2108 /* init script execution disabled */
2109 bios->execute = false;
2110
2111 /* ... unless card isn't POSTed already */
2112 if (!nouveau_bios_posted(dev)) {
2113 NV_INFO(drm, "Adaptor not initialised, "
2114 "running VBIOS init tables.\n");
2115 bios->execute = true;
2116 }
2117
2118 ret = nouveau_run_vbios_init(dev);
2119 if (ret)
2120 return ret;
2121
2122 /* feature_byte on BMP is poor, but init always sets CR4B */
2123 if (bios->major_version < 5)
2124 bios->is_mobile = NVReadVgaCrtc(dev, head: 0, NV_CIO_CRE_4B) & 0x40;
2125
2126 /* all BIT systems need p_f_m_t for digital_min_front_porch */
2127 if (bios->is_mobile || bios->major_version >= 5)
2128 ret = parse_fp_mode_table(dev, bios);
2129
2130 /* allow subsequent scripts to execute */
2131 bios->execute = true;
2132
2133 return 0;
2134}
2135
2136void
2137nouveau_bios_takedown(struct drm_device *dev)
2138{
2139}
2140

source code of linux/drivers/gpu/drm/nouveau/nouveau_bios.c