| 1 | /* SPDX-License-Identifier: MIT */ |
|---|---|
| 2 | |
| 3 | /* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */ |
| 4 | |
| 5 | #ifndef __NVRM_OFA_H__ |
| 6 | #define __NVRM_OFA_H__ |
| 7 | #include <nvrm/nvtypes.h> |
| 8 | |
| 9 | /* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/570.144 */ |
| 10 | |
| 11 | typedef struct |
| 12 | { |
| 13 | NvU32 size; |
| 14 | NvU32 prohibitMultipleInstances; // Prohibit multiple allocations of OFA? |
| 15 | NvU32 engineInstance; |
| 16 | } NV_OFA_ALLOCATION_PARAMETERS; |
| 17 | #endif |
| 18 |