1 | /* |
2 | * Copyright (C) 2015 Red Hat, Inc. |
3 | * All Rights Reserved. |
4 | * |
5 | * Permission is hereby granted, free of charge, to any person obtaining |
6 | * a copy of this software and associated documentation files (the |
7 | * "Software"), to deal in the Software without restriction, including |
8 | * without limitation the rights to use, copy, modify, merge, publish, |
9 | * distribute, sublicense, and/or sell copies of the Software, and to |
10 | * permit persons to whom the Software is furnished to do so, subject to |
11 | * the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice (including the |
14 | * next paragraph) shall be included in all copies or substantial |
15 | * portions of the Software. |
16 | * |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
24 | */ |
25 | |
26 | #include <trace/events/dma_fence.h> |
27 | |
28 | #include "virtgpu_drv.h" |
29 | |
30 | #define to_virtio_gpu_fence(x) \ |
31 | container_of(x, struct virtio_gpu_fence, f) |
32 | |
33 | static const char *virtio_gpu_get_driver_name(struct dma_fence *f) |
34 | { |
35 | return "virtio_gpu" ; |
36 | } |
37 | |
38 | static const char *virtio_gpu_get_timeline_name(struct dma_fence *f) |
39 | { |
40 | return "controlq" ; |
41 | } |
42 | |
43 | static bool virtio_gpu_fence_signaled(struct dma_fence *f) |
44 | { |
45 | /* leaked fence outside driver before completing |
46 | * initialization with virtio_gpu_fence_emit. |
47 | */ |
48 | WARN_ON_ONCE(f->seqno == 0); |
49 | return false; |
50 | } |
51 | |
52 | static void virtio_gpu_fence_value_str(struct dma_fence *f, char *str, int size) |
53 | { |
54 | snprintf(buf: str, size, fmt: "[%llu, %llu]" , f->context, f->seqno); |
55 | } |
56 | |
57 | static void virtio_gpu_timeline_value_str(struct dma_fence *f, char *str, |
58 | int size) |
59 | { |
60 | struct virtio_gpu_fence *fence = to_virtio_gpu_fence(f); |
61 | |
62 | snprintf(buf: str, size, fmt: "%llu" , |
63 | (u64)atomic64_read(v: &fence->drv->last_fence_id)); |
64 | } |
65 | |
66 | static const struct dma_fence_ops virtio_gpu_fence_ops = { |
67 | .get_driver_name = virtio_gpu_get_driver_name, |
68 | .get_timeline_name = virtio_gpu_get_timeline_name, |
69 | .signaled = virtio_gpu_fence_signaled, |
70 | .fence_value_str = virtio_gpu_fence_value_str, |
71 | .timeline_value_str = virtio_gpu_timeline_value_str, |
72 | }; |
73 | |
74 | struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev, |
75 | uint64_t base_fence_ctx, |
76 | uint32_t ring_idx) |
77 | { |
78 | uint64_t fence_context = base_fence_ctx + ring_idx; |
79 | struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; |
80 | struct virtio_gpu_fence *fence = kzalloc(size: sizeof(struct virtio_gpu_fence), |
81 | GFP_KERNEL); |
82 | |
83 | if (!fence) |
84 | return fence; |
85 | |
86 | fence->drv = drv; |
87 | fence->ring_idx = ring_idx; |
88 | fence->emit_fence_info = !(base_fence_ctx == drv->context); |
89 | |
90 | /* This only partially initializes the fence because the seqno is |
91 | * unknown yet. The fence must not be used outside of the driver |
92 | * until virtio_gpu_fence_emit is called. |
93 | */ |
94 | |
95 | dma_fence_init(fence: &fence->f, ops: &virtio_gpu_fence_ops, lock: &drv->lock, |
96 | context: fence_context, seqno: 0); |
97 | |
98 | return fence; |
99 | } |
100 | |
101 | void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, |
102 | struct virtio_gpu_ctrl_hdr *cmd_hdr, |
103 | struct virtio_gpu_fence *fence) |
104 | { |
105 | struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; |
106 | unsigned long irq_flags; |
107 | |
108 | spin_lock_irqsave(&drv->lock, irq_flags); |
109 | fence->fence_id = fence->f.seqno = ++drv->current_fence_id; |
110 | dma_fence_get(fence: &fence->f); |
111 | list_add_tail(new: &fence->node, head: &drv->fences); |
112 | spin_unlock_irqrestore(lock: &drv->lock, flags: irq_flags); |
113 | |
114 | trace_dma_fence_emit(fence: &fence->f); |
115 | |
116 | cmd_hdr->flags |= cpu_to_le32(VIRTIO_GPU_FLAG_FENCE); |
117 | cmd_hdr->fence_id = cpu_to_le64(fence->fence_id); |
118 | |
119 | /* Only currently defined fence param. */ |
120 | if (fence->emit_fence_info) { |
121 | cmd_hdr->flags |= |
122 | cpu_to_le32(VIRTIO_GPU_FLAG_INFO_RING_IDX); |
123 | cmd_hdr->ring_idx = (u8)fence->ring_idx; |
124 | } |
125 | } |
126 | |
127 | void virtio_gpu_fence_event_process(struct virtio_gpu_device *vgdev, |
128 | u64 fence_id) |
129 | { |
130 | struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; |
131 | struct virtio_gpu_fence *signaled, *curr, *tmp; |
132 | unsigned long irq_flags; |
133 | |
134 | spin_lock_irqsave(&drv->lock, irq_flags); |
135 | atomic64_set(v: &vgdev->fence_drv.last_fence_id, i: fence_id); |
136 | list_for_each_entry_safe(curr, tmp, &drv->fences, node) { |
137 | if (fence_id != curr->fence_id) |
138 | continue; |
139 | |
140 | signaled = curr; |
141 | |
142 | /* |
143 | * Signal any fences with a strictly smaller sequence number |
144 | * than the current signaled fence. |
145 | */ |
146 | list_for_each_entry_safe(curr, tmp, &drv->fences, node) { |
147 | /* dma-fence contexts must match */ |
148 | if (signaled->f.context != curr->f.context) |
149 | continue; |
150 | |
151 | if (!dma_fence_is_later(f1: &signaled->f, f2: &curr->f)) |
152 | continue; |
153 | |
154 | dma_fence_signal_locked(fence: &curr->f); |
155 | if (curr->e) { |
156 | drm_send_event(dev: vgdev->ddev, e: &curr->e->base); |
157 | curr->e = NULL; |
158 | } |
159 | |
160 | list_del(entry: &curr->node); |
161 | dma_fence_put(fence: &curr->f); |
162 | } |
163 | |
164 | dma_fence_signal_locked(fence: &signaled->f); |
165 | if (signaled->e) { |
166 | drm_send_event(dev: vgdev->ddev, e: &signaled->e->base); |
167 | signaled->e = NULL; |
168 | } |
169 | |
170 | list_del(entry: &signaled->node); |
171 | dma_fence_put(fence: &signaled->f); |
172 | break; |
173 | } |
174 | spin_unlock_irqrestore(lock: &drv->lock, flags: irq_flags); |
175 | } |
176 | |