| 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | |
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| 3 | // Required to retain the original register names used by OpenRM, which are all capital snake case |
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| 4 | // but are mapped to types. |
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| 5 | #![allow(non_camel_case_types)] |
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| 6 | |
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| 7 | #[macro_use] |
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| 8 | mod macros; |
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| 9 | |
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| 10 | use crate::gpu::{Architecture, Chipset}; |
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| 11 | use kernel::prelude::*; |
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| 12 | |
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| 13 | /* PMC */ |
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| 14 | |
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| 15 | register!(NV_PMC_BOOT_0 @ 0x00000000, "Basic revision information about the GPU" { |
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| 16 | 3:0 minor_revision as u8, "Minor revision of the chip" ; |
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| 17 | 7:4 major_revision as u8, "Major revision of the chip" ; |
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| 18 | 8:8 architecture_1 as u8, "MSB of the architecture" ; |
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| 19 | 23:20 implementation as u8, "Implementation version of the architecture" ; |
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| 20 | 28:24 architecture_0 as u8, "Lower bits of the architecture" ; |
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| 21 | }); |
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| 22 | |
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| 23 | impl NV_PMC_BOOT_0 { |
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| 24 | /// Combines `architecture_0` and `architecture_1` to obtain the architecture of the chip. |
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| 25 | pub(crate) fn architecture(self) -> Result<Architecture> { |
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| 26 | Architecture::try_from( |
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| 27 | self.architecture_0() | (self.architecture_1() << Self::ARCHITECTURE_0.len()), |
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| 28 | ) |
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| 29 | } |
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| 30 | |
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| 31 | /// Combines `architecture` and `implementation` to obtain a code unique to the chipset. |
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| 32 | pub(crate) fn chipset(self) -> Result<Chipset> { |
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| 33 | self.architecture() |
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| 34 | .map(|arch| { |
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| 35 | ((arch as u32) << Self::IMPLEMENTATION.len()) | self.implementation() as u32 |
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| 36 | }) |
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| 37 | .and_then(Chipset::try_from) |
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| 38 | } |
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| 39 | } |
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| 40 | |
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