1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for Texas Instruments INA219, INA226 power monitor chips
4 *
5 * INA219:
6 * Zero Drift Bi-Directional Current/Power Monitor with I2C Interface
7 * Datasheet: https://www.ti.com/product/ina219
8 *
9 * INA220:
10 * Bi-Directional Current/Power Monitor with I2C Interface
11 * Datasheet: https://www.ti.com/product/ina220
12 *
13 * INA226:
14 * Bi-Directional Current/Power Monitor with I2C Interface
15 * Datasheet: https://www.ti.com/product/ina226
16 *
17 * INA230:
18 * Bi-directional Current/Power Monitor with I2C Interface
19 * Datasheet: https://www.ti.com/product/ina230
20 *
21 * Copyright (C) 2012 Lothar Felten <lothar.felten@gmail.com>
22 * Thanks to Jan Volkering
23 */
24
25#include <linux/bitfield.h>
26#include <linux/bits.h>
27#include <linux/delay.h>
28#include <linux/device.h>
29#include <linux/err.h>
30#include <linux/hwmon.h>
31#include <linux/i2c.h>
32#include <linux/init.h>
33#include <linux/kernel.h>
34#include <linux/module.h>
35#include <linux/property.h>
36#include <linux/regmap.h>
37#include <linux/slab.h>
38#include <linux/sysfs.h>
39#include <linux/util_macros.h>
40
41/* common register definitions */
42#define INA2XX_CONFIG 0x00
43#define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */
44#define INA2XX_BUS_VOLTAGE 0x02 /* readonly */
45#define INA2XX_POWER 0x03 /* readonly */
46#define INA2XX_CURRENT 0x04 /* readonly */
47#define INA2XX_CALIBRATION 0x05
48
49/* INA226 register definitions */
50#define INA226_MASK_ENABLE 0x06
51#define INA226_ALERT_LIMIT 0x07
52#define INA226_DIE_ID 0xFF
53
54/* SY24655 register definitions */
55#define SY24655_EIN 0x0A
56#define SY24655_ACCUM_CONFIG 0x0D
57#define INA2XX_MAX_REGISTERS 0x0D
58
59/* settings - depend on use case */
60#define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */
61#define INA226_CONFIG_DEFAULT 0x4527 /* averages=16 */
62#define INA260_CONFIG_DEFAULT 0x6527 /* averages=16 */
63#define SY24655_CONFIG_DEFAULT 0x4527 /* averages=16 */
64
65/* (only for sy24655) */
66#define SY24655_ACCUM_CONFIG_DEFAULT 0x044C /* continuous mode, clear after read*/
67
68/* worst case is 68.10 ms (~14.6Hz, ina219) */
69#define INA2XX_CONVERSION_RATE 15
70#define INA2XX_MAX_DELAY 69 /* worst case delay in ms */
71
72#define INA2XX_RSHUNT_DEFAULT 10000
73#define INA260_RSHUNT 2000
74
75/* bit mask for reading the averaging setting in the configuration register */
76#define INA226_AVG_RD_MASK GENMASK(11, 9)
77
78#define INA226_READ_AVG(reg) FIELD_GET(INA226_AVG_RD_MASK, reg)
79
80#define INA226_ALERT_LATCH_ENABLE BIT(0)
81#define INA226_ALERT_POLARITY BIT(1)
82
83/* bit number of alert functions in Mask/Enable Register */
84#define INA226_SHUNT_OVER_VOLTAGE_MASK BIT(15)
85#define INA226_SHUNT_UNDER_VOLTAGE_MASK BIT(14)
86#define INA226_BUS_OVER_VOLTAGE_MASK BIT(13)
87#define INA226_BUS_UNDER_VOLTAGE_MASK BIT(12)
88#define INA226_POWER_OVER_LIMIT_MASK BIT(11)
89
90/* bit mask for alert config bits of Mask/Enable Register */
91#define INA226_ALERT_CONFIG_MASK GENMASK(15, 10)
92#define INA226_ALERT_FUNCTION_FLAG BIT(4)
93
94/*
95 * Both bus voltage and shunt voltage conversion times for ina226 are set
96 * to 0b0100 on POR, which translates to 2200 microseconds in total.
97 */
98#define INA226_TOTAL_CONV_TIME_DEFAULT 2200
99
100static bool ina2xx_writeable_reg(struct device *dev, unsigned int reg)
101{
102 switch (reg) {
103 case INA2XX_CONFIG:
104 case INA2XX_CALIBRATION:
105 case INA226_MASK_ENABLE:
106 case INA226_ALERT_LIMIT:
107 case SY24655_ACCUM_CONFIG:
108 return true;
109 default:
110 return false;
111 }
112}
113
114static bool ina2xx_volatile_reg(struct device *dev, unsigned int reg)
115{
116 switch (reg) {
117 case INA2XX_SHUNT_VOLTAGE:
118 case INA2XX_BUS_VOLTAGE:
119 case INA2XX_POWER:
120 case INA2XX_CURRENT:
121 return true;
122 default:
123 return false;
124 }
125}
126
127static const struct regmap_config ina2xx_regmap_config = {
128 .reg_bits = 8,
129 .val_bits = 16,
130 .use_single_write = true,
131 .use_single_read = true,
132 .max_register = INA2XX_MAX_REGISTERS,
133 .cache_type = REGCACHE_MAPLE,
134 .volatile_reg = ina2xx_volatile_reg,
135 .writeable_reg = ina2xx_writeable_reg,
136};
137
138enum ina2xx_ids { ina219, ina226, ina260, sy24655 };
139
140struct ina2xx_config {
141 u16 config_default;
142 bool has_alerts; /* chip supports alerts and limits */
143 bool has_ishunt; /* chip has internal shunt resistor */
144 bool has_power_average; /* chip has internal shunt resistor */
145 int calibration_value;
146 int shunt_div;
147 int bus_voltage_shift;
148 int bus_voltage_lsb; /* uV */
149 int power_lsb_factor;
150};
151
152struct ina2xx_data {
153 const struct ina2xx_config *config;
154 enum ina2xx_ids chip;
155
156 long rshunt;
157 long current_lsb_uA;
158 long power_lsb_uW;
159 struct regmap *regmap;
160 struct i2c_client *client;
161};
162
163static const struct ina2xx_config ina2xx_config[] = {
164 [ina219] = {
165 .config_default = INA219_CONFIG_DEFAULT,
166 .calibration_value = 4096,
167 .shunt_div = 100,
168 .bus_voltage_shift = 3,
169 .bus_voltage_lsb = 4000,
170 .power_lsb_factor = 20,
171 .has_alerts = false,
172 .has_ishunt = false,
173 .has_power_average = false,
174 },
175 [ina226] = {
176 .config_default = INA226_CONFIG_DEFAULT,
177 .calibration_value = 2048,
178 .shunt_div = 400,
179 .bus_voltage_shift = 0,
180 .bus_voltage_lsb = 1250,
181 .power_lsb_factor = 25,
182 .has_alerts = true,
183 .has_ishunt = false,
184 .has_power_average = false,
185 },
186 [ina260] = {
187 .config_default = INA260_CONFIG_DEFAULT,
188 .shunt_div = 400,
189 .bus_voltage_shift = 0,
190 .bus_voltage_lsb = 1250,
191 .power_lsb_factor = 8,
192 .has_alerts = true,
193 .has_ishunt = true,
194 .has_power_average = false,
195 },
196 [sy24655] = {
197 .config_default = SY24655_CONFIG_DEFAULT,
198 .calibration_value = 4096,
199 .shunt_div = 400,
200 .bus_voltage_shift = 0,
201 .bus_voltage_lsb = 1250,
202 .power_lsb_factor = 25,
203 .has_alerts = true,
204 .has_ishunt = false,
205 .has_power_average = true,
206 },
207};
208
209/*
210 * Available averaging rates for ina226. The indices correspond with
211 * the bit values expected by the chip (according to the ina226 datasheet,
212 * table 3 AVG bit settings, found at
213 * https://www.ti.com/lit/ds/symlink/ina226.pdf.
214 */
215static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
216
217static int ina226_reg_to_interval(u16 config)
218{
219 int avg = ina226_avg_tab[INA226_READ_AVG(config)];
220
221 /*
222 * Multiply the total conversion time by the number of averages.
223 * Return the result in milliseconds.
224 */
225 return DIV_ROUND_CLOSEST(avg * INA226_TOTAL_CONV_TIME_DEFAULT, 1000);
226}
227
228/*
229 * Return the new, shifted AVG field value of CONFIG register,
230 * to use with regmap_update_bits
231 */
232static u16 ina226_interval_to_reg(long interval)
233{
234 int avg, avg_bits;
235
236 /*
237 * The maximum supported interval is 1,024 * (2 * 8.244ms) ~= 16.8s.
238 * Clamp to 32 seconds before calculations to avoid overflows.
239 */
240 interval = clamp_val(interval, 0, 32000);
241
242 avg = DIV_ROUND_CLOSEST(interval * 1000,
243 INA226_TOTAL_CONV_TIME_DEFAULT);
244 avg_bits = find_closest(avg, ina226_avg_tab,
245 ARRAY_SIZE(ina226_avg_tab));
246
247 return FIELD_PREP(INA226_AVG_RD_MASK, avg_bits);
248}
249
250static int ina2xx_get_value(struct ina2xx_data *data, u8 reg,
251 unsigned int regval)
252{
253 int val;
254
255 switch (reg) {
256 case INA2XX_SHUNT_VOLTAGE:
257 /* signed register */
258 val = DIV_ROUND_CLOSEST((s16)regval, data->config->shunt_div);
259 break;
260 case INA2XX_BUS_VOLTAGE:
261 val = (regval >> data->config->bus_voltage_shift) *
262 data->config->bus_voltage_lsb;
263 val = DIV_ROUND_CLOSEST(val, 1000);
264 break;
265 case INA2XX_POWER:
266 val = regval * data->power_lsb_uW;
267 break;
268 case INA2XX_CURRENT:
269 /* signed register, result in mA */
270 val = (s16)regval * data->current_lsb_uA;
271 val = DIV_ROUND_CLOSEST(val, 1000);
272 break;
273 case INA2XX_CALIBRATION:
274 val = regval;
275 break;
276 default:
277 /* programmer goofed */
278 WARN_ON_ONCE(1);
279 val = 0;
280 break;
281 }
282
283 return val;
284}
285
286/*
287 * Read and convert register value from chip. If the register value is 0,
288 * check if the chip has been power cycled or reset. If so, re-initialize it.
289 */
290static int ina2xx_read_init(struct device *dev, int reg, long *val)
291{
292 struct ina2xx_data *data = dev_get_drvdata(dev);
293 struct regmap *regmap = data->regmap;
294 unsigned int regval;
295 int ret, retry;
296
297 if (data->config->has_ishunt) {
298 /* No calibration needed */
299 ret = regmap_read(map: regmap, reg, val: &regval);
300 if (ret < 0)
301 return ret;
302 *val = ina2xx_get_value(data, reg, regval);
303 return 0;
304 }
305
306 for (retry = 5; retry; retry--) {
307 ret = regmap_read(map: regmap, reg, val: &regval);
308 if (ret < 0)
309 return ret;
310
311 /*
312 * If the current value in the calibration register is 0, the
313 * power and current registers will also remain at 0. In case
314 * the chip has been reset let's check the calibration
315 * register and reinitialize if needed.
316 * We do that extra read of the calibration register if there
317 * is some hint of a chip reset.
318 */
319 if (regval == 0) {
320 unsigned int cal;
321
322 ret = regmap_read_bypassed(map: regmap, INA2XX_CALIBRATION, val: &cal);
323 if (ret < 0)
324 return ret;
325
326 if (cal == 0) {
327 dev_warn(dev, "chip not calibrated, reinitializing\n");
328
329 regcache_mark_dirty(map: regmap);
330 regcache_sync(map: regmap);
331
332 /*
333 * Let's make sure the power and current
334 * registers have been updated before trying
335 * again.
336 */
337 msleep(INA2XX_MAX_DELAY);
338 continue;
339 }
340 }
341 *val = ina2xx_get_value(data, reg, regval);
342 return 0;
343 }
344
345 /*
346 * If we're here then although all write operations succeeded, the
347 * chip still returns 0 in the calibration register. Nothing more we
348 * can do here.
349 */
350 dev_err(dev, "unable to reinitialize the chip\n");
351 return -ENODEV;
352}
353
354/*
355 * Turns alert limit values into register values.
356 * Opposite of the formula in ina2xx_get_value().
357 */
358static u16 ina226_alert_to_reg(struct ina2xx_data *data, int reg, long val)
359{
360 switch (reg) {
361 case INA2XX_SHUNT_VOLTAGE:
362 val = clamp_val(val, 0, SHRT_MAX * data->config->shunt_div);
363 val *= data->config->shunt_div;
364 return clamp_val(val, 0, SHRT_MAX);
365 case INA2XX_BUS_VOLTAGE:
366 val = clamp_val(val, 0, 200000);
367 val = (val * 1000) << data->config->bus_voltage_shift;
368 val = DIV_ROUND_CLOSEST(val, data->config->bus_voltage_lsb);
369 return clamp_val(val, 0, USHRT_MAX);
370 case INA2XX_POWER:
371 val = clamp_val(val, 0, UINT_MAX - data->power_lsb_uW);
372 val = DIV_ROUND_CLOSEST(val, data->power_lsb_uW);
373 return clamp_val(val, 0, USHRT_MAX);
374 case INA2XX_CURRENT:
375 val = clamp_val(val, INT_MIN / 1000, INT_MAX / 1000);
376 /* signed register, result in mA */
377 val = DIV_ROUND_CLOSEST(val * 1000, data->current_lsb_uA);
378 return clamp_val(val, SHRT_MIN, SHRT_MAX);
379 default:
380 /* programmer goofed */
381 WARN_ON_ONCE(1);
382 return 0;
383 }
384}
385
386static int ina226_alert_limit_read(struct ina2xx_data *data, u32 mask, int reg, long *val)
387{
388 struct regmap *regmap = data->regmap;
389 int regval;
390 int ret;
391
392 ret = regmap_read(map: regmap, INA226_MASK_ENABLE, val: &regval);
393 if (ret)
394 return ret;
395
396 if (regval & mask) {
397 ret = regmap_read(map: regmap, INA226_ALERT_LIMIT, val: &regval);
398 if (ret)
399 return ret;
400 *val = ina2xx_get_value(data, reg, regval);
401 } else {
402 *val = 0;
403 }
404 return 0;
405}
406
407static int ina226_alert_limit_write(struct ina2xx_data *data, u32 mask, int reg, long val)
408{
409 struct regmap *regmap = data->regmap;
410 int ret;
411
412 if (val < 0)
413 return -EINVAL;
414
415 /*
416 * Clear all alerts first to avoid accidentally triggering ALERT pin
417 * due to register write sequence. Then, only enable the alert
418 * if the value is non-zero.
419 */
420 ret = regmap_update_bits(map: regmap, INA226_MASK_ENABLE,
421 INA226_ALERT_CONFIG_MASK, val: 0);
422 if (ret < 0)
423 return ret;
424
425 ret = regmap_write(map: regmap, INA226_ALERT_LIMIT,
426 val: ina226_alert_to_reg(data, reg, val));
427 if (ret < 0)
428 return ret;
429
430 if (val)
431 return regmap_update_bits(map: regmap, INA226_MASK_ENABLE,
432 INA226_ALERT_CONFIG_MASK, val: mask);
433 return 0;
434}
435
436static int ina2xx_chip_read(struct device *dev, u32 attr, long *val)
437{
438 struct ina2xx_data *data = dev_get_drvdata(dev);
439 u32 regval;
440 int ret;
441
442 switch (attr) {
443 case hwmon_chip_update_interval:
444 ret = regmap_read(map: data->regmap, INA2XX_CONFIG, val: &regval);
445 if (ret)
446 return ret;
447
448 *val = ina226_reg_to_interval(config: regval);
449 break;
450 default:
451 return -EOPNOTSUPP;
452 }
453 return 0;
454}
455
456static int ina226_alert_read(struct regmap *regmap, u32 mask, long *val)
457{
458 unsigned int regval;
459 int ret;
460
461 ret = regmap_read_bypassed(map: regmap, INA226_MASK_ENABLE, val: &regval);
462 if (ret)
463 return ret;
464
465 *val = (regval & mask) && (regval & INA226_ALERT_FUNCTION_FLAG);
466
467 return 0;
468}
469
470static int ina2xx_in_read(struct device *dev, u32 attr, int channel, long *val)
471{
472 int voltage_reg = channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE;
473 u32 under_voltage_mask = channel ? INA226_BUS_UNDER_VOLTAGE_MASK
474 : INA226_SHUNT_UNDER_VOLTAGE_MASK;
475 u32 over_voltage_mask = channel ? INA226_BUS_OVER_VOLTAGE_MASK
476 : INA226_SHUNT_OVER_VOLTAGE_MASK;
477 struct ina2xx_data *data = dev_get_drvdata(dev);
478 struct regmap *regmap = data->regmap;
479 unsigned int regval;
480 int ret;
481
482 switch (attr) {
483 case hwmon_in_input:
484 ret = regmap_read(map: regmap, reg: voltage_reg, val: &regval);
485 if (ret)
486 return ret;
487 *val = ina2xx_get_value(data, reg: voltage_reg, regval);
488 break;
489 case hwmon_in_lcrit:
490 return ina226_alert_limit_read(data, mask: under_voltage_mask,
491 reg: voltage_reg, val);
492 case hwmon_in_crit:
493 return ina226_alert_limit_read(data, mask: over_voltage_mask,
494 reg: voltage_reg, val);
495 case hwmon_in_lcrit_alarm:
496 return ina226_alert_read(regmap, mask: under_voltage_mask, val);
497 case hwmon_in_crit_alarm:
498 return ina226_alert_read(regmap, mask: over_voltage_mask, val);
499 default:
500 return -EOPNOTSUPP;
501 }
502 return 0;
503}
504
505/*
506 * Configuring the READ_EIN (bit 10) of the ACCUM_CONFIG register to 1
507 * can clear accumulator and sample_count after reading the EIN register.
508 * This way, the average power between the last read and the current
509 * read can be obtained. By combining with accurate time data from
510 * outside, the energy consumption during that period can be calculated.
511 */
512static int sy24655_average_power_read(struct ina2xx_data *data, u8 reg, long *val)
513{
514 u8 template[6];
515 int ret;
516 long accumulator_24, sample_count;
517
518 /* 48-bit register read */
519 ret = i2c_smbus_read_i2c_block_data(client: data->client, command: reg, length: 6, values: template);
520 if (ret < 0)
521 return ret;
522 if (ret != 6)
523 return -EIO;
524 accumulator_24 = ((template[3] << 16) |
525 (template[4] << 8) |
526 template[5]);
527 sample_count = ((template[0] << 16) |
528 (template[1] << 8) |
529 template[2]);
530 if (sample_count <= 0) {
531 *val = 0;
532 return 0;
533 }
534
535 *val = DIV_ROUND_CLOSEST(accumulator_24, sample_count) * data->power_lsb_uW;
536
537 return 0;
538}
539
540static int ina2xx_power_read(struct device *dev, u32 attr, long *val)
541{
542 struct ina2xx_data *data = dev_get_drvdata(dev);
543
544 switch (attr) {
545 case hwmon_power_input:
546 return ina2xx_read_init(dev, INA2XX_POWER, val);
547 case hwmon_power_average:
548 return sy24655_average_power_read(data, SY24655_EIN, val);
549 case hwmon_power_crit:
550 return ina226_alert_limit_read(data, INA226_POWER_OVER_LIMIT_MASK,
551 INA2XX_POWER, val);
552 case hwmon_power_crit_alarm:
553 return ina226_alert_read(regmap: data->regmap, INA226_POWER_OVER_LIMIT_MASK, val);
554 default:
555 return -EOPNOTSUPP;
556 }
557}
558
559static int ina2xx_curr_read(struct device *dev, u32 attr, long *val)
560{
561 struct ina2xx_data *data = dev_get_drvdata(dev);
562 struct regmap *regmap = data->regmap;
563 unsigned int regval;
564 int ret;
565
566 /*
567 * While the chips supported by this driver do not directly support
568 * current limits, they do support setting shunt voltage limits.
569 * The shunt voltage divided by the shunt resistor value is the current.
570 * On top of that, calibration values are set such that in the shunt
571 * voltage register and the current register report the same values.
572 * That means we can report and configure current limits based on shunt
573 * voltage limits.
574 */
575 switch (attr) {
576 case hwmon_curr_input:
577 /*
578 * Since the shunt voltage and the current register report the
579 * same values when the chip is calibrated, we can calculate
580 * the current directly from the shunt voltage without relying
581 * on chip calibration.
582 */
583 ret = regmap_read(map: regmap, INA2XX_SHUNT_VOLTAGE, val: &regval);
584 if (ret)
585 return ret;
586 *val = ina2xx_get_value(data, INA2XX_CURRENT, regval);
587 return 0;
588 case hwmon_curr_lcrit:
589 return ina226_alert_limit_read(data, INA226_SHUNT_UNDER_VOLTAGE_MASK,
590 INA2XX_CURRENT, val);
591 case hwmon_curr_crit:
592 return ina226_alert_limit_read(data, INA226_SHUNT_OVER_VOLTAGE_MASK,
593 INA2XX_CURRENT, val);
594 case hwmon_curr_lcrit_alarm:
595 return ina226_alert_read(regmap, INA226_SHUNT_UNDER_VOLTAGE_MASK, val);
596 case hwmon_curr_crit_alarm:
597 return ina226_alert_read(regmap, INA226_SHUNT_OVER_VOLTAGE_MASK, val);
598 default:
599 return -EOPNOTSUPP;
600 }
601}
602
603static int ina2xx_read(struct device *dev, enum hwmon_sensor_types type,
604 u32 attr, int channel, long *val)
605{
606 switch (type) {
607 case hwmon_chip:
608 return ina2xx_chip_read(dev, attr, val);
609 case hwmon_in:
610 return ina2xx_in_read(dev, attr, channel, val);
611 case hwmon_power:
612 return ina2xx_power_read(dev, attr, val);
613 case hwmon_curr:
614 return ina2xx_curr_read(dev, attr, val);
615 default:
616 return -EOPNOTSUPP;
617 }
618}
619
620static int ina2xx_chip_write(struct device *dev, u32 attr, long val)
621{
622 struct ina2xx_data *data = dev_get_drvdata(dev);
623
624 switch (attr) {
625 case hwmon_chip_update_interval:
626 return regmap_update_bits(map: data->regmap, INA2XX_CONFIG,
627 INA226_AVG_RD_MASK,
628 val: ina226_interval_to_reg(interval: val));
629 default:
630 return -EOPNOTSUPP;
631 }
632}
633
634static int ina2xx_in_write(struct device *dev, u32 attr, int channel, long val)
635{
636 struct ina2xx_data *data = dev_get_drvdata(dev);
637
638 switch (attr) {
639 case hwmon_in_lcrit:
640 return ina226_alert_limit_write(data,
641 mask: channel ? INA226_BUS_UNDER_VOLTAGE_MASK : INA226_SHUNT_UNDER_VOLTAGE_MASK,
642 reg: channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE,
643 val);
644 case hwmon_in_crit:
645 return ina226_alert_limit_write(data,
646 mask: channel ? INA226_BUS_OVER_VOLTAGE_MASK : INA226_SHUNT_OVER_VOLTAGE_MASK,
647 reg: channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE,
648 val);
649 default:
650 return -EOPNOTSUPP;
651 }
652 return 0;
653}
654
655static int ina2xx_power_write(struct device *dev, u32 attr, long val)
656{
657 struct ina2xx_data *data = dev_get_drvdata(dev);
658
659 switch (attr) {
660 case hwmon_power_crit:
661 return ina226_alert_limit_write(data, INA226_POWER_OVER_LIMIT_MASK,
662 INA2XX_POWER, val);
663 default:
664 return -EOPNOTSUPP;
665 }
666 return 0;
667}
668
669static int ina2xx_curr_write(struct device *dev, u32 attr, long val)
670{
671 struct ina2xx_data *data = dev_get_drvdata(dev);
672
673 switch (attr) {
674 case hwmon_curr_lcrit:
675 return ina226_alert_limit_write(data, INA226_SHUNT_UNDER_VOLTAGE_MASK,
676 INA2XX_CURRENT, val);
677 case hwmon_curr_crit:
678 return ina226_alert_limit_write(data, INA226_SHUNT_OVER_VOLTAGE_MASK,
679 INA2XX_CURRENT, val);
680 default:
681 return -EOPNOTSUPP;
682 }
683 return 0;
684}
685
686static int ina2xx_write(struct device *dev, enum hwmon_sensor_types type,
687 u32 attr, int channel, long val)
688{
689 switch (type) {
690 case hwmon_chip:
691 return ina2xx_chip_write(dev, attr, val);
692 case hwmon_in:
693 return ina2xx_in_write(dev, attr, channel, val);
694 case hwmon_power:
695 return ina2xx_power_write(dev, attr, val);
696 case hwmon_curr:
697 return ina2xx_curr_write(dev, attr, val);
698 default:
699 return -EOPNOTSUPP;
700 }
701}
702
703static umode_t ina2xx_is_visible(const void *_data, enum hwmon_sensor_types type,
704 u32 attr, int channel)
705{
706 const struct ina2xx_data *data = _data;
707 bool has_alerts = data->config->has_alerts;
708 bool has_power_average = data->config->has_power_average;
709 enum ina2xx_ids chip = data->chip;
710
711 switch (type) {
712 case hwmon_in:
713 switch (attr) {
714 case hwmon_in_input:
715 return 0444;
716 case hwmon_in_lcrit:
717 case hwmon_in_crit:
718 if (has_alerts)
719 return 0644;
720 break;
721 case hwmon_in_lcrit_alarm:
722 case hwmon_in_crit_alarm:
723 if (has_alerts)
724 return 0444;
725 break;
726 default:
727 break;
728 }
729 break;
730 case hwmon_curr:
731 switch (attr) {
732 case hwmon_curr_input:
733 return 0444;
734 case hwmon_curr_lcrit:
735 case hwmon_curr_crit:
736 if (has_alerts)
737 return 0644;
738 break;
739 case hwmon_curr_lcrit_alarm:
740 case hwmon_curr_crit_alarm:
741 if (has_alerts)
742 return 0444;
743 break;
744 default:
745 break;
746 }
747 break;
748 case hwmon_power:
749 switch (attr) {
750 case hwmon_power_input:
751 return 0444;
752 case hwmon_power_crit:
753 if (has_alerts)
754 return 0644;
755 break;
756 case hwmon_power_crit_alarm:
757 if (has_alerts)
758 return 0444;
759 break;
760 case hwmon_power_average:
761 if (has_power_average)
762 return 0444;
763 break;
764 default:
765 break;
766 }
767 break;
768 case hwmon_chip:
769 switch (attr) {
770 case hwmon_chip_update_interval:
771 if (chip == ina226 || chip == ina260)
772 return 0644;
773 break;
774 default:
775 break;
776 }
777 break;
778 default:
779 break;
780 }
781 return 0;
782}
783
784static const struct hwmon_channel_info * const ina2xx_info[] = {
785 HWMON_CHANNEL_INFO(chip,
786 HWMON_C_UPDATE_INTERVAL),
787 HWMON_CHANNEL_INFO(in,
788 HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM |
789 HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM,
790 HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM |
791 HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM
792 ),
793 HWMON_CHANNEL_INFO(curr, HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM |
794 HWMON_C_LCRIT | HWMON_C_LCRIT_ALARM),
795 HWMON_CHANNEL_INFO(power,
796 HWMON_P_INPUT | HWMON_P_CRIT | HWMON_P_CRIT_ALARM |
797 HWMON_P_AVERAGE),
798 NULL
799};
800
801static const struct hwmon_ops ina2xx_hwmon_ops = {
802 .is_visible = ina2xx_is_visible,
803 .read = ina2xx_read,
804 .write = ina2xx_write,
805};
806
807static const struct hwmon_chip_info ina2xx_chip_info = {
808 .ops = &ina2xx_hwmon_ops,
809 .info = ina2xx_info,
810};
811
812/* shunt resistance */
813
814/*
815 * In order to keep calibration register value fixed, the product
816 * of current_lsb and shunt_resistor should also be fixed and equal
817 * to shunt_voltage_lsb = 1 / shunt_div multiplied by 10^9 in order
818 * to keep the scale.
819 */
820static int ina2xx_set_shunt(struct ina2xx_data *data, unsigned long val)
821{
822 unsigned int dividend = DIV_ROUND_CLOSEST(1000000000,
823 data->config->shunt_div);
824 if (!val || val > dividend)
825 return -EINVAL;
826
827 data->rshunt = val;
828 data->current_lsb_uA = DIV_ROUND_CLOSEST(dividend, val);
829 data->power_lsb_uW = data->config->power_lsb_factor *
830 data->current_lsb_uA;
831
832 return 0;
833}
834
835static ssize_t shunt_resistor_show(struct device *dev,
836 struct device_attribute *da, char *buf)
837{
838 struct ina2xx_data *data = dev_get_drvdata(dev);
839
840 return sysfs_emit(buf, fmt: "%li\n", data->rshunt);
841}
842
843static ssize_t shunt_resistor_store(struct device *dev,
844 struct device_attribute *da,
845 const char *buf, size_t count)
846{
847 struct ina2xx_data *data = dev_get_drvdata(dev);
848 unsigned long val;
849 int status;
850
851 status = kstrtoul(s: buf, base: 10, res: &val);
852 if (status < 0)
853 return status;
854
855 hwmon_lock(dev);
856 status = ina2xx_set_shunt(data, val);
857 hwmon_unlock(dev);
858 if (status < 0)
859 return status;
860 return count;
861}
862
863static DEVICE_ATTR_RW(shunt_resistor);
864
865/* pointers to created device attributes */
866static struct attribute *ina2xx_attrs[] = {
867 &dev_attr_shunt_resistor.attr,
868 NULL,
869};
870ATTRIBUTE_GROUPS(ina2xx);
871
872/*
873 * Initialize chip
874 */
875static int ina2xx_init(struct device *dev, struct ina2xx_data *data)
876{
877 struct regmap *regmap = data->regmap;
878 u32 shunt;
879 int ret;
880
881 if (data->config->has_ishunt)
882 shunt = INA260_RSHUNT;
883 else if (device_property_read_u32(dev, propname: "shunt-resistor", val: &shunt) < 0)
884 shunt = INA2XX_RSHUNT_DEFAULT;
885
886 ret = ina2xx_set_shunt(data, val: shunt);
887 if (ret < 0)
888 return ret;
889
890 ret = regmap_write(map: regmap, INA2XX_CONFIG, val: data->config->config_default);
891 if (ret < 0)
892 return ret;
893
894 if (data->config->has_alerts) {
895 bool active_high = device_property_read_bool(dev, propname: "ti,alert-polarity-active-high");
896
897 regmap_update_bits(map: regmap, INA226_MASK_ENABLE,
898 INA226_ALERT_LATCH_ENABLE | INA226_ALERT_POLARITY,
899 INA226_ALERT_LATCH_ENABLE |
900 FIELD_PREP(INA226_ALERT_POLARITY, active_high));
901 }
902 if (data->config->has_power_average) {
903 if (data->chip == sy24655) {
904 /*
905 * Initialize the power accumulation method to continuous
906 * mode and clear the EIN register after each read of the
907 * EIN register
908 */
909 ret = regmap_write(map: regmap, SY24655_ACCUM_CONFIG,
910 SY24655_ACCUM_CONFIG_DEFAULT);
911 if (ret < 0)
912 return ret;
913 }
914 }
915
916 if (data->config->has_ishunt)
917 return 0;
918
919 /*
920 * Calibration register is set to the best value, which eliminates
921 * truncation errors on calculating current register in hardware.
922 * According to datasheet (eq. 3) the best values are 2048 for
923 * ina226 and 4096 for ina219. They are hardcoded as calibration_value.
924 */
925 return regmap_write(map: regmap, INA2XX_CALIBRATION,
926 val: data->config->calibration_value);
927}
928
929static int ina2xx_probe(struct i2c_client *client)
930{
931 struct device *dev = &client->dev;
932 struct ina2xx_data *data;
933 struct device *hwmon_dev;
934 enum ina2xx_ids chip;
935 int ret;
936
937 chip = (uintptr_t)i2c_get_match_data(client);
938
939 data = devm_kzalloc(dev, size: sizeof(*data), GFP_KERNEL);
940 if (!data)
941 return -ENOMEM;
942
943 /* set the device type */
944 data->client = client;
945 data->config = &ina2xx_config[chip];
946 data->chip = chip;
947
948 data->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
949 if (IS_ERR(ptr: data->regmap)) {
950 dev_err(dev, "failed to allocate register map\n");
951 return PTR_ERR(ptr: data->regmap);
952 }
953
954 /*
955 * Regulator core returns -ENODEV if the 'vs' is not available.
956 * Hence the check for -ENODEV return code is necessary.
957 */
958 ret = devm_regulator_get_enable_optional(dev, id: "vs");
959 if (ret < 0 && ret != -ENODEV)
960 return dev_err_probe(dev, err: ret, fmt: "failed to enable vs regulator\n");
961
962 ret = ina2xx_init(dev, data);
963 if (ret < 0)
964 return dev_err_probe(dev, err: ret, fmt: "failed to configure device\n");
965
966 hwmon_dev = devm_hwmon_device_register_with_info(dev, name: client->name,
967 drvdata: data, info: &ina2xx_chip_info,
968 extra_groups: data->config->has_ishunt ?
969 NULL : ina2xx_groups);
970 if (IS_ERR(ptr: hwmon_dev))
971 return PTR_ERR(ptr: hwmon_dev);
972
973 dev_info(dev, "power monitor %s (Rshunt = %li uOhm)\n",
974 client->name, data->rshunt);
975
976 return 0;
977}
978
979static const struct i2c_device_id ina2xx_id[] = {
980 { "ina219", ina219 },
981 { "ina220", ina219 },
982 { "ina226", ina226 },
983 { "ina230", ina226 },
984 { "ina231", ina226 },
985 { "ina260", ina260 },
986 { "sy24655", sy24655 },
987 { }
988};
989MODULE_DEVICE_TABLE(i2c, ina2xx_id);
990
991static const struct of_device_id __maybe_unused ina2xx_of_match[] = {
992 {
993 .compatible = "silergy,sy24655",
994 .data = (void *)sy24655
995 },
996 {
997 .compatible = "ti,ina219",
998 .data = (void *)ina219
999 },
1000 {
1001 .compatible = "ti,ina220",
1002 .data = (void *)ina219
1003 },
1004 {
1005 .compatible = "ti,ina226",
1006 .data = (void *)ina226
1007 },
1008 {
1009 .compatible = "ti,ina230",
1010 .data = (void *)ina226
1011 },
1012 {
1013 .compatible = "ti,ina231",
1014 .data = (void *)ina226
1015 },
1016 {
1017 .compatible = "ti,ina260",
1018 .data = (void *)ina260
1019 },
1020 { }
1021};
1022MODULE_DEVICE_TABLE(of, ina2xx_of_match);
1023
1024static struct i2c_driver ina2xx_driver = {
1025 .driver = {
1026 .name = "ina2xx",
1027 .of_match_table = of_match_ptr(ina2xx_of_match),
1028 },
1029 .probe = ina2xx_probe,
1030 .id_table = ina2xx_id,
1031};
1032
1033module_i2c_driver(ina2xx_driver);
1034
1035MODULE_AUTHOR("Lothar Felten <l-felten@ti.com>");
1036MODULE_DESCRIPTION("ina2xx driver");
1037MODULE_LICENSE("GPL");
1038

source code of linux/drivers/hwmon/ina2xx.c