1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* Copyright (C) 2018 Cadence Design Systems Inc.
4	*
5	* Author: Boris Brezillon <boris.brezillon@bootlin.com>
6	*/
7
8	#include <linux/atomic.h>
9	#include <linux/bug.h>
10	#include <linux/device.h>
11	#include <linux/err.h>
12	#include <linux/export.h>
13	#include <linux/kernel.h>
14	#include <linux/list.h>
15	#include <linux/of.h>
16	#include <linux/pm_runtime.h>
17	#include <linux/slab.h>
18	#include <linux/spinlock.h>
19	#include <linux/workqueue.h>
20
21	#include "internals.h"
22
23	static DEFINE_IDR(i3c_bus_idr);
24	static DEFINE_MUTEX(i3c_core_lock);
25	static int __i3c_first_dynamic_bus_num;
26	static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
27
28	/**
29	* i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
30	* @bus: I3C bus to take the lock on
31	*
32	* This function takes the bus lock so that no other operations can occur on
33	* the bus. This is needed for all kind of bus maintenance operation, like
34	* - enabling/disabling slave events
35	* - re-triggering DAA
36	* - changing the dynamic address of a device
37	* - relinquishing mastership
38	* - ...
39	*
40	* The reason for this kind of locking is that we don't want drivers and core
41	* logic to rely on I3C device information that could be changed behind their
42	* back.
43	*/
44	static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
45	{
46	down_write(sem: &bus->lock);
47	}
48
49	/**
50	* i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
51	* operation
52	* @bus: I3C bus to release the lock on
53	*
54	* Should be called when the bus maintenance operation is done. See
55	* i3c_bus_maintenance_lock() for more details on what these maintenance
56	* operations are.
57	*/
58	static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
59	{
60	up_write(sem: &bus->lock);
61	}
62
63	/**
64	* i3c_bus_normaluse_lock - Lock the bus for a normal operation
65	* @bus: I3C bus to take the lock on
66	*
67	* This function takes the bus lock for any operation that is not a maintenance
68	* operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
69	* maintenance operations). Basically all communications with I3C devices are
70	* normal operations (HDR, SDR transfers or CCC commands that do not change bus
71	* state or I3C dynamic address).
72	*
73	* Note that this lock is not guaranteeing serialization of normal operations.
74	* In other words, transfer requests passed to the I3C master can be submitted
75	* in parallel and I3C master drivers have to use their own locking to make
76	* sure two different communications are not inter-mixed, or access to the
77	* output/input queue is not done while the engine is busy.
78	*/
79	void i3c_bus_normaluse_lock(struct i3c_bus *bus)
80	{
81	down_read(sem: &bus->lock);
82	}
83
84	/**
85	* i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
86	* @bus: I3C bus to release the lock on
87	*
88	* Should be called when a normal operation is done. See
89	* i3c_bus_normaluse_lock() for more details on what these normal operations
90	* are.
91	*/
92	void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
93	{
94	up_read(sem: &bus->lock);
95	}
96
97	static struct i3c_master_controller *
98	i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
99	{
100	return container_of(i3cbus, struct i3c_master_controller, bus);
101	}
102
103	static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
104	{
105	return container_of(dev, struct i3c_master_controller, dev);
106	}
107
108	static const struct device_type i3c_device_type;
109
110	static struct i3c_bus *dev_to_i3cbus(struct device *dev)
111	{
112	struct i3c_master_controller *master;
113
114	if (dev->type == &i3c_device_type)
115	return dev_to_i3cdev(dev)->bus;
116
117	master = dev_to_i3cmaster(dev);
118
119	return &master->bus;
120	}
121
122	static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
123	{
124	struct i3c_master_controller *master;
125
126	if (dev->type == &i3c_device_type)
127	return dev_to_i3cdev(dev)->desc;
128
129	master = dev_to_i3cmaster(dev);
130
131	return master->this;
132	}
133
134	static ssize_t bcr_show(struct device *dev,
135	struct device_attribute *da,
136	char *buf)
137	{
138	struct i3c_bus *bus = dev_to_i3cbus(dev);
139	struct i3c_dev_desc *desc;
140	ssize_t ret;
141
142	i3c_bus_normaluse_lock(bus);
143	desc = dev_to_i3cdesc(dev);
144	ret = sprintf(buf, fmt: "%x\n", desc->info.bcr);
145	i3c_bus_normaluse_unlock(bus);
146
147	return ret;
148	}
149	static DEVICE_ATTR_RO(bcr);
150
151	static ssize_t dcr_show(struct device *dev,
152	struct device_attribute *da,
153	char *buf)
154	{
155	struct i3c_bus *bus = dev_to_i3cbus(dev);
156	struct i3c_dev_desc *desc;
157	ssize_t ret;
158
159	i3c_bus_normaluse_lock(bus);
160	desc = dev_to_i3cdesc(dev);
161	ret = sprintf(buf, fmt: "%x\n", desc->info.dcr);
162	i3c_bus_normaluse_unlock(bus);
163
164	return ret;
165	}
166	static DEVICE_ATTR_RO(dcr);
167
168	static ssize_t pid_show(struct device *dev,
169	struct device_attribute *da,
170	char *buf)
171	{
172	struct i3c_bus *bus = dev_to_i3cbus(dev);
173	struct i3c_dev_desc *desc;
174	ssize_t ret;
175
176	i3c_bus_normaluse_lock(bus);
177	desc = dev_to_i3cdesc(dev);
178	ret = sprintf(buf, fmt: "%llx\n", desc->info.pid);
179	i3c_bus_normaluse_unlock(bus);
180
181	return ret;
182	}
183	static DEVICE_ATTR_RO(pid);
184
185	static ssize_t dynamic_address_show(struct device *dev,
186	struct device_attribute *da,
187	char *buf)
188	{
189	struct i3c_bus *bus = dev_to_i3cbus(dev);
190	struct i3c_dev_desc *desc;
191	ssize_t ret;
192
193	i3c_bus_normaluse_lock(bus);
194	desc = dev_to_i3cdesc(dev);
195	ret = sprintf(buf, fmt: "%02x\n", desc->info.dyn_addr);
196	i3c_bus_normaluse_unlock(bus);
197
198	return ret;
199	}
200	static DEVICE_ATTR_RO(dynamic_address);
201
202	static const char * const hdrcap_strings[] = {
203	"hdr-ddr", "hdr-tsp", "hdr-tsl",
204	};
205
206	static ssize_t hdrcap_show(struct device *dev,
207	struct device_attribute *da,
208	char *buf)
209	{
210	struct i3c_bus *bus = dev_to_i3cbus(dev);
211	struct i3c_dev_desc *desc;
212	ssize_t offset = 0, ret;
213	unsigned long caps;
214	int mode;
215
216	i3c_bus_normaluse_lock(bus);
217	desc = dev_to_i3cdesc(dev);
218	caps = desc->info.hdr_cap;
219	for_each_set_bit(mode, &caps, 8) {
220	if (mode >= ARRAY_SIZE(hdrcap_strings))
221	break;
222
223	if (!hdrcap_strings[mode])
224	continue;
225
226	ret = sprintf(buf: buf + offset, fmt: offset ? " %s" : "%s",
227	hdrcap_strings[mode]);
228	if (ret < 0)
229	goto out;
230
231	offset += ret;
232	}
233
234	ret = sprintf(buf: buf + offset, fmt: "\n");
235	if (ret < 0)
236	goto out;
237
238	ret = offset + ret;
239
240	out:
241	i3c_bus_normaluse_unlock(bus);
242
243	return ret;
244	}
245	static DEVICE_ATTR_RO(hdrcap);
246
247	static ssize_t modalias_show(struct device *dev,
248	struct device_attribute *da, char *buf)
249	{
250	struct i3c_device *i3c = dev_to_i3cdev(dev);
251	struct i3c_device_info devinfo;
252	u16 manuf, part, ext;
253
254	i3c_device_get_info(dev: i3c, info: &devinfo);
255	manuf = I3C_PID_MANUF_ID(devinfo.pid);
256	part = I3C_PID_PART_ID(devinfo.pid);
257	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
258
259	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
260	return sprintf(buf, fmt: "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
261	manuf);
262
263	return sprintf(buf, fmt: "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
264	devinfo.dcr, manuf, part, ext);
265	}
266	static DEVICE_ATTR_RO(modalias);
267
268	static struct attribute *i3c_device_attrs[] = {
269	&dev_attr_bcr.attr,
270	&dev_attr_dcr.attr,
271	&dev_attr_pid.attr,
272	&dev_attr_dynamic_address.attr,
273	&dev_attr_hdrcap.attr,
274	&dev_attr_modalias.attr,
275	NULL,
276	};
277	ATTRIBUTE_GROUPS(i3c_device);
278
279	static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
280	{
281	const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
282	struct i3c_device_info devinfo;
283	u16 manuf, part, ext;
284
285	if (i3cdev->desc)
286	devinfo = i3cdev->desc->info;
287	manuf = I3C_PID_MANUF_ID(devinfo.pid);
288	part = I3C_PID_PART_ID(devinfo.pid);
289	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
290
291	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
292	return add_uevent_var(env, format: "MODALIAS=i3c:dcr%02Xmanuf%04X",
293	devinfo.dcr, manuf);
294
295	return add_uevent_var(env,
296	format: "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
297	devinfo.dcr, manuf, part, ext);
298	}
299
300	static const struct device_type i3c_device_type = {
301	.groups = i3c_device_groups,
302	.uevent = i3c_device_uevent,
303	};
304
305	static int i3c_device_match(struct device *dev, const struct device_driver *drv)
306	{
307	struct i3c_device *i3cdev;
308	const struct i3c_driver *i3cdrv;
309
310	if (dev->type != &i3c_device_type)
311	return 0;
312
313	i3cdev = dev_to_i3cdev(dev);
314	i3cdrv = drv_to_i3cdrv(drv);
315	if (i3c_device_match_id(i3cdev, id_table: i3cdrv->id_table))
316	return 1;
317
318	return 0;
319	}
320
321	static int i3c_device_probe(struct device *dev)
322	{
323	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
324	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
325
326	return driver->probe(i3cdev);
327	}
328
329	static void i3c_device_remove(struct device *dev)
330	{
331	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
332	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
333
334	if (driver->remove)
335	driver->remove(i3cdev);
336
337	i3c_device_free_ibi(dev: i3cdev);
338	}
339
340	const struct bus_type i3c_bus_type = {
341	.name = "i3c",
342	.match = i3c_device_match,
343	.probe = i3c_device_probe,
344	.remove = i3c_device_remove,
345	};
346	EXPORT_SYMBOL_GPL(i3c_bus_type);
347
348	static enum i3c_addr_slot_status
349	i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask)
350	{
351	unsigned long status;
352	int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
353
354	if (addr > I2C_MAX_ADDR)
355	return I3C_ADDR_SLOT_RSVD;
356
357	status = bus->addrslots[bitpos / BITS_PER_LONG];
358	status >>= bitpos % BITS_PER_LONG;
359
360	return status & mask;
361	}
362
363	static enum i3c_addr_slot_status
364	i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
365	{
366	return i3c_bus_get_addr_slot_status_mask(bus, addr, mask: I3C_ADDR_SLOT_STATUS_MASK);
367	}
368
369	static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr,
370	enum i3c_addr_slot_status status, u32 mask)
371	{
372	int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
373	unsigned long *ptr;
374
375	if (addr > I2C_MAX_ADDR)
376	return;
377
378	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
379	*ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG));
380	*ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG);
381	}
382
383	static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
384	enum i3c_addr_slot_status status)
385	{
386	i3c_bus_set_addr_slot_status_mask(bus, addr, status, mask: I3C_ADDR_SLOT_STATUS_MASK);
387	}
388
389	static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
390	{
391	enum i3c_addr_slot_status status;
392
393	status = i3c_bus_get_addr_slot_status(bus, addr);
394
395	return status == I3C_ADDR_SLOT_FREE;
396	}
397
398	/*
399	* ┌────┬─────────────┬───┬─────────┬───┐
400	* │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐
401	* └────┴─────────────┴───┴─────────┴───┘ │
402	* ┌─────────────────────────────────────────┘
403	* │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐
404	* └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│
405	* └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘
406	* Some master controllers (such as HCI) need to prepare the entire above transaction before
407	* sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated
408	* before knowing the target device's UID information.
409	*
410	* However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is
411	* typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI
412	* priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is
413	* not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with
414	* the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise,
415	* if the "init_dyn_addr" is already in use by another I3C device, the target device will not be
416	* able to switch to its desired address.
417	*
418	* If the previous step fails, fallback returning one of the remaining unassigned address,
419	* regardless of its state in the desired list.
420	*/
421	static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
422	{
423	enum i3c_addr_slot_status status;
424	u8 addr;
425
426	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
427	status = i3c_bus_get_addr_slot_status_mask(bus, addr,
428	mask: I3C_ADDR_SLOT_EXT_STATUS_MASK);
429	if (status == I3C_ADDR_SLOT_FREE)
430	return addr;
431	}
432
433	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
434	status = i3c_bus_get_addr_slot_status_mask(bus, addr,
435	mask: I3C_ADDR_SLOT_STATUS_MASK);
436	if (status == I3C_ADDR_SLOT_FREE)
437	return addr;
438	}
439
440	return -ENOMEM;
441	}
442
443	static void i3c_bus_init_addrslots(struct i3c_bus *bus)
444	{
445	int i;
446
447	/* Addresses 0 to 7 are reserved. */
448	for (i = 0; i < 8; i++)
449	i3c_bus_set_addr_slot_status(bus, addr: i, status: I3C_ADDR_SLOT_RSVD);
450
451	/*
452	* Reserve broadcast address and all addresses that might collide
453	* with the broadcast address when facing a single bit error.
454	*/
455	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
456	status: I3C_ADDR_SLOT_RSVD);
457	for (i = 0; i < 7; i++)
458	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
459	status: I3C_ADDR_SLOT_RSVD);
460	}
461
462	static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
463	{
464	mutex_lock(&i3c_core_lock);
465	idr_remove(&i3c_bus_idr, id: i3cbus->id);
466	mutex_unlock(lock: &i3c_core_lock);
467	}
468
469	static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
470	{
471	int ret, start, end, id = -1;
472
473	init_rwsem(&i3cbus->lock);
474	INIT_LIST_HEAD(list: &i3cbus->devs.i2c);
475	INIT_LIST_HEAD(list: &i3cbus->devs.i3c);
476	i3c_bus_init_addrslots(bus: i3cbus);
477	i3cbus->mode = I3C_BUS_MODE_PURE;
478
479	if (np)
480	id = of_alias_get_id(np, stem: "i3c");
481
482	mutex_lock(&i3c_core_lock);
483	if (id >= 0) {
484	start = id;
485	end = start + 1;
486	} else {
487	start = __i3c_first_dynamic_bus_num;
488	end = 0;
489	}
490
491	ret = idr_alloc(&i3c_bus_idr, ptr: i3cbus, start, end, GFP_KERNEL);
492	mutex_unlock(lock: &i3c_core_lock);
493
494	if (ret < 0)
495	return ret;
496
497	i3cbus->id = ret;
498
499	return 0;
500	}
501
502	void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
503	void *data)
504	{
505	struct i3c_bus *bus;
506	int id;
507
508	mutex_lock(&i3c_core_lock);
509	idr_for_each_entry(&i3c_bus_idr, bus, id)
510	fn(bus, data);
511	mutex_unlock(lock: &i3c_core_lock);
512	}
513	EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
514
515	int i3c_register_notifier(struct notifier_block *nb)
516	{
517	return blocking_notifier_chain_register(nh: &i3c_bus_notifier, nb);
518	}
519	EXPORT_SYMBOL_GPL(i3c_register_notifier);
520
521	int i3c_unregister_notifier(struct notifier_block *nb)
522	{
523	return blocking_notifier_chain_unregister(nh: &i3c_bus_notifier, nb);
524	}
525	EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
526
527	static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
528	{
529	blocking_notifier_call_chain(nh: &i3c_bus_notifier, val: action, v: bus);
530	}
531
532	static const char * const i3c_bus_mode_strings[] = {
533	[I3C_BUS_MODE_PURE] = "pure",
534	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
535	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
536	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
537	};
538
539	static ssize_t mode_show(struct device *dev,
540	struct device_attribute *da,
541	char *buf)
542	{
543	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
544	ssize_t ret;
545
546	i3c_bus_normaluse_lock(bus: i3cbus);
547	if (i3cbus->mode < 0 ||
548	i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
549	!i3c_bus_mode_strings[i3cbus->mode])
550	ret = sprintf(buf, fmt: "unknown\n");
551	else
552	ret = sprintf(buf, fmt: "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
553	i3c_bus_normaluse_unlock(bus: i3cbus);
554
555	return ret;
556	}
557	static DEVICE_ATTR_RO(mode);
558
559	static ssize_t current_master_show(struct device *dev,
560	struct device_attribute *da,
561	char *buf)
562	{
563	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
564	ssize_t ret;
565
566	i3c_bus_normaluse_lock(bus: i3cbus);
567	ret = sprintf(buf, fmt: "%d-%llx\n", i3cbus->id,
568	i3cbus->cur_master->info.pid);
569	i3c_bus_normaluse_unlock(bus: i3cbus);
570
571	return ret;
572	}
573	static DEVICE_ATTR_RO(current_master);
574
575	static ssize_t i3c_scl_frequency_show(struct device *dev,
576	struct device_attribute *da,
577	char *buf)
578	{
579	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
580	ssize_t ret;
581
582	i3c_bus_normaluse_lock(bus: i3cbus);
583	ret = sprintf(buf, fmt: "%ld\n", i3cbus->scl_rate.i3c);
584	i3c_bus_normaluse_unlock(bus: i3cbus);
585
586	return ret;
587	}
588	static DEVICE_ATTR_RO(i3c_scl_frequency);
589
590	static ssize_t i2c_scl_frequency_show(struct device *dev,
591	struct device_attribute *da,
592	char *buf)
593	{
594	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
595	ssize_t ret;
596
597	i3c_bus_normaluse_lock(bus: i3cbus);
598	ret = sprintf(buf, fmt: "%ld\n", i3cbus->scl_rate.i2c);
599	i3c_bus_normaluse_unlock(bus: i3cbus);
600
601	return ret;
602	}
603	static DEVICE_ATTR_RO(i2c_scl_frequency);
604
605	static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
606	{
607	int ret;
608
609	if (!master || !master->ops)
610	return -EINVAL;
611
612	if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
613	return -EINVAL;
614
615	i3c_bus_normaluse_lock(bus: &master->bus);
616
617	if (enable)
618	ret = master->ops->enable_hotjoin(master);
619	else
620	ret = master->ops->disable_hotjoin(master);
621
622	master->hotjoin = enable;
623
624	i3c_bus_normaluse_unlock(bus: &master->bus);
625
626	return ret;
627	}
628
629	static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
630	const char *buf, size_t count)
631	{
632	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
633	int ret;
634	bool res;
635
636	if (!i3cbus->cur_master)
637	return -EINVAL;
638
639	if (kstrtobool(s: buf, res: &res))
640	return -EINVAL;
641
642	ret = i3c_set_hotjoin(master: i3cbus->cur_master->common.master, enable: res);
643	if (ret)
644	return ret;
645
646	return count;
647	}
648
649	/*
650	* i3c_master_enable_hotjoin - Enable hotjoin
651	* @master: I3C master object
652	*
653	* Return: a 0 in case of success, an negative error code otherwise.
654	*/
655	int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
656	{
657	return i3c_set_hotjoin(master, enable: true);
658	}
659	EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
660
661	/*
662	* i3c_master_disable_hotjoin - Disable hotjoin
663	* @master: I3C master object
664	*
665	* Return: a 0 in case of success, an negative error code otherwise.
666	*/
667	int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
668	{
669	return i3c_set_hotjoin(master, enable: false);
670	}
671	EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
672
673	static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
674	{
675	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
676	ssize_t ret;
677
678	i3c_bus_normaluse_lock(bus: i3cbus);
679	ret = sysfs_emit(buf, fmt: "%d\n", i3cbus->cur_master->common.master->hotjoin);
680	i3c_bus_normaluse_unlock(bus: i3cbus);
681
682	return ret;
683	}
684
685	static DEVICE_ATTR_RW(hotjoin);
686
687	static struct attribute *i3c_masterdev_attrs[] = {
688	&dev_attr_mode.attr,
689	&dev_attr_current_master.attr,
690	&dev_attr_i3c_scl_frequency.attr,
691	&dev_attr_i2c_scl_frequency.attr,
692	&dev_attr_bcr.attr,
693	&dev_attr_dcr.attr,
694	&dev_attr_pid.attr,
695	&dev_attr_dynamic_address.attr,
696	&dev_attr_hdrcap.attr,
697	&dev_attr_hotjoin.attr,
698	NULL,
699	};
700	ATTRIBUTE_GROUPS(i3c_masterdev);
701
702	static void i3c_masterdev_release(struct device *dev)
703	{
704	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
705	struct i3c_bus *bus = dev_to_i3cbus(dev);
706
707	if (master->wq)
708	destroy_workqueue(wq: master->wq);
709
710	WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
711	i3c_bus_cleanup(i3cbus: bus);
712
713	of_node_put(node: dev->of_node);
714	}
715
716	static const struct device_type i3c_masterdev_type = {
717	.groups = i3c_masterdev_groups,
718	};
719
720	static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
721	unsigned long max_i2c_scl_rate)
722	{
723	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
724
725	i3cbus->mode = mode;
726
727	switch (i3cbus->mode) {
728	case I3C_BUS_MODE_PURE:
729	if (!i3cbus->scl_rate.i3c)
730	i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
731	break;
732	case I3C_BUS_MODE_MIXED_FAST:
733	case I3C_BUS_MODE_MIXED_LIMITED:
734	if (!i3cbus->scl_rate.i3c)
735	i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
736	if (!i3cbus->scl_rate.i2c)
737	i3cbus->scl_rate.i2c = max_i2c_scl_rate;
738	break;
739	case I3C_BUS_MODE_MIXED_SLOW:
740	if (!i3cbus->scl_rate.i2c)
741	i3cbus->scl_rate.i2c = max_i2c_scl_rate;
742	if (!i3cbus->scl_rate.i3c ||
743	i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
744	i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
745	break;
746	default:
747	return -EINVAL;
748	}
749
750	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
751	i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
752
753	/*
754	* I3C/I2C frequency may have been overridden, check that user-provided
755	* values are not exceeding max possible frequency.
756	*/
757	if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
758	i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
759	return -EINVAL;
760
761	return 0;
762	}
763
764	static struct i3c_master_controller *
765	i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
766	{
767	return container_of(adap, struct i3c_master_controller, i2c);
768	}
769
770	static struct i2c_adapter *
771	i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
772	{
773	return &master->i2c;
774	}
775
776	static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
777	{
778	kfree(objp: dev);
779	}
780
781	static struct i2c_dev_desc *
782	i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
783	u16 addr, u8 lvr)
784	{
785	struct i2c_dev_desc *dev;
786
787	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
788	if (!dev)
789	return ERR_PTR(error: -ENOMEM);
790
791	dev->common.master = master;
792	dev->addr = addr;
793	dev->lvr = lvr;
794
795	return dev;
796	}
797
798	static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
799	u16 payloadlen)
800	{
801	dest->addr = addr;
802	dest->payload.len = payloadlen;
803	if (payloadlen)
804	dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
805	else
806	dest->payload.data = NULL;
807
808	return dest->payload.data;
809	}
810
811	static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
812	{
813	kfree(objp: dest->payload.data);
814	}
815
816	static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
817	struct i3c_ccc_cmd_dest *dests,
818	unsigned int ndests)
819	{
820	cmd->rnw = rnw ? 1 : 0;
821	cmd->id = id;
822	cmd->dests = dests;
823	cmd->ndests = ndests;
824	cmd->err = I3C_ERROR_UNKNOWN;
825	}
826
827	static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
828	struct i3c_ccc_cmd *cmd)
829	{
830	int ret;
831
832	if (!cmd || !master)
833	return -EINVAL;
834
835	if (WARN_ON(master->init_done &&
836	!rwsem_is_locked(&master->bus.lock)))
837	return -EINVAL;
838
839	if (!master->ops->send_ccc_cmd)
840	return -ENOTSUPP;
841
842	if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
843	return -EINVAL;
844
845	if (master->ops->supports_ccc_cmd &&
846	!master->ops->supports_ccc_cmd(master, cmd))
847	return -ENOTSUPP;
848
849	ret = master->ops->send_ccc_cmd(master, cmd);
850	if (ret) {
851	if (cmd->err != I3C_ERROR_UNKNOWN)
852	return cmd->err;
853
854	return ret;
855	}
856
857	return 0;
858	}
859
860	static struct i2c_dev_desc *
861	i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
862	u16 addr)
863	{
864	struct i2c_dev_desc *dev;
865
866	i3c_bus_for_each_i2cdev(&master->bus, dev) {
867	if (dev->addr == addr)
868	return dev;
869	}
870
871	return NULL;
872	}
873
874	/**
875	* i3c_master_get_free_addr() - get a free address on the bus
876	* @master: I3C master object
877	* @start_addr: where to start searching
878	*
879	* This function must be called with the bus lock held in write mode.
880	*
881	* Return: the first free address starting at @start_addr (included) or -ENOMEM
882	* if there's no more address available.
883	*/
884	int i3c_master_get_free_addr(struct i3c_master_controller *master,
885	u8 start_addr)
886	{
887	return i3c_bus_get_free_addr(bus: &master->bus, start_addr);
888	}
889	EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
890
891	static void i3c_device_release(struct device *dev)
892	{
893	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
894
895	WARN_ON(i3cdev->desc);
896
897	of_node_put(node: i3cdev->dev.of_node);
898	kfree(objp: i3cdev);
899	}
900
901	static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
902	{
903	kfree(objp: dev);
904	}
905
906	static struct i3c_dev_desc *
907	i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
908	const struct i3c_device_info *info)
909	{
910	struct i3c_dev_desc *dev;
911
912	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
913	if (!dev)
914	return ERR_PTR(error: -ENOMEM);
915
916	dev->common.master = master;
917	dev->info = *info;
918	mutex_init(&dev->ibi_lock);
919
920	return dev;
921	}
922
923	static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
924	u8 addr)
925	{
926	enum i3c_addr_slot_status addrstat;
927	struct i3c_ccc_cmd_dest dest;
928	struct i3c_ccc_cmd cmd;
929	int ret;
930
931	if (!master)
932	return -EINVAL;
933
934	addrstat = i3c_bus_get_addr_slot_status(bus: &master->bus, addr);
935	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
936	return -EINVAL;
937
938	i3c_ccc_cmd_dest_init(dest: &dest, addr, payloadlen: 0);
939	i3c_ccc_cmd_init(cmd: &cmd, rnw: false,
940	I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
941	dests: &dest, ndests: 1);
942	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
943	i3c_ccc_cmd_dest_cleanup(dest: &dest);
944
945	return ret;
946	}
947
948	/**
949	* i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
950	* procedure
951	* @master: master used to send frames on the bus
952	*
953	* Send a ENTDAA CCC command to start a DAA procedure.
954	*
955	* Note that this function only sends the ENTDAA CCC command, all the logic
956	* behind dynamic address assignment has to be handled in the I3C master
957	* driver.
958	*
959	* This function must be called with the bus lock held in write mode.
960	*
961	* Return: 0 in case of success, a positive I3C error code if the error is
962	* one of the official Mx error codes, and a negative error code otherwise.
963	*/
964	int i3c_master_entdaa_locked(struct i3c_master_controller *master)
965	{
966	struct i3c_ccc_cmd_dest dest;
967	struct i3c_ccc_cmd cmd;
968	int ret;
969
970	i3c_ccc_cmd_dest_init(dest: &dest, I3C_BROADCAST_ADDR, payloadlen: 0);
971	i3c_ccc_cmd_init(cmd: &cmd, rnw: false, I3C_CCC_ENTDAA, dests: &dest, ndests: 1);
972	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
973	i3c_ccc_cmd_dest_cleanup(dest: &dest);
974
975	return ret;
976	}
977	EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
978
979	static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
980	u8 addr, bool enable, u8 evts)
981	{
982	struct i3c_ccc_events *events;
983	struct i3c_ccc_cmd_dest dest;
984	struct i3c_ccc_cmd cmd;
985	int ret;
986
987	events = i3c_ccc_cmd_dest_init(dest: &dest, addr, payloadlen: sizeof(*events));
988	if (!events)
989	return -ENOMEM;
990
991	events->events = evts;
992	i3c_ccc_cmd_init(cmd: &cmd, rnw: false,
993	id: enable ?
994	I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
995	I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
996	dests: &dest, ndests: 1);
997	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
998	i3c_ccc_cmd_dest_cleanup(dest: &dest);
999
1000	return ret;
1001	}
1002
1003	/**
1004	* i3c_master_disec_locked() - send a DISEC CCC command
1005	* @master: master used to send frames on the bus
1006	* @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1007	* @evts: events to disable
1008	*
1009	* Send a DISEC CCC command to disable some or all events coming from a
1010	* specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1011	*
1012	* This function must be called with the bus lock held in write mode.
1013	*
1014	* Return: 0 in case of success, a positive I3C error code if the error is
1015	* one of the official Mx error codes, and a negative error code otherwise.
1016	*/
1017	int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
1018	u8 evts)
1019	{
1020	return i3c_master_enec_disec_locked(master, addr, enable: false, evts);
1021	}
1022	EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
1023
1024	/**
1025	* i3c_master_enec_locked() - send an ENEC CCC command
1026	* @master: master used to send frames on the bus
1027	* @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1028	* @evts: events to disable
1029	*
1030	* Sends an ENEC CCC command to enable some or all events coming from a
1031	* specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1032	*
1033	* This function must be called with the bus lock held in write mode.
1034	*
1035	* Return: 0 in case of success, a positive I3C error code if the error is
1036	* one of the official Mx error codes, and a negative error code otherwise.
1037	*/
1038	int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
1039	u8 evts)
1040	{
1041	return i3c_master_enec_disec_locked(master, addr, enable: true, evts);
1042	}
1043	EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
1044
1045	/**
1046	* i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1047	* @master: master used to send frames on the bus
1048	*
1049	* Send a DEFSLVS CCC command containing all the devices known to the @master.
1050	* This is useful when you have secondary masters on the bus to propagate
1051	* device information.
1052	*
1053	* This should be called after all I3C devices have been discovered (in other
1054	* words, after the DAA procedure has finished) and instantiated in
1055	* &i3c_master_controller_ops->bus_init().
1056	* It should also be called if a master ACKed an Hot-Join request and assigned
1057	* a dynamic address to the device joining the bus.
1058	*
1059	* This function must be called with the bus lock held in write mode.
1060	*
1061	* Return: 0 in case of success, a positive I3C error code if the error is
1062	* one of the official Mx error codes, and a negative error code otherwise.
1063	*/
1064	int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1065	{
1066	struct i3c_ccc_defslvs *defslvs;
1067	struct i3c_ccc_dev_desc *desc;
1068	struct i3c_ccc_cmd_dest dest;
1069	struct i3c_dev_desc *i3cdev;
1070	struct i2c_dev_desc *i2cdev;
1071	struct i3c_ccc_cmd cmd;
1072	struct i3c_bus *bus;
1073	bool send = false;
1074	int ndevs = 0, ret;
1075
1076	if (!master)
1077	return -EINVAL;
1078
1079	bus = i3c_master_get_bus(master);
1080	i3c_bus_for_each_i3cdev(bus, i3cdev) {
1081	ndevs++;
1082
1083	if (i3cdev == master->this)
1084	continue;
1085
1086	if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1087	I3C_BCR_I3C_MASTER)
1088	send = true;
1089	}
1090
1091	/* No other master on the bus, skip DEFSLVS. */
1092	if (!send)
1093	return 0;
1094
1095	i3c_bus_for_each_i2cdev(bus, i2cdev)
1096	ndevs++;
1097
1098	defslvs = i3c_ccc_cmd_dest_init(dest: &dest, I3C_BROADCAST_ADDR,
1099	struct_size(defslvs, slaves,
1100	ndevs - 1));
1101	if (!defslvs)
1102	return -ENOMEM;
1103
1104	defslvs->count = ndevs;
1105	defslvs->master.bcr = master->this->info.bcr;
1106	defslvs->master.dcr = master->this->info.dcr;
1107	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1108	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1109
1110	desc = defslvs->slaves;
1111	i3c_bus_for_each_i2cdev(bus, i2cdev) {
1112	desc->lvr = i2cdev->lvr;
1113	desc->static_addr = i2cdev->addr << 1;
1114	desc++;
1115	}
1116
1117	i3c_bus_for_each_i3cdev(bus, i3cdev) {
1118	/* Skip the I3C dev representing this master. */
1119	if (i3cdev == master->this)
1120	continue;
1121
1122	desc->bcr = i3cdev->info.bcr;
1123	desc->dcr = i3cdev->info.dcr;
1124	desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1125	desc->static_addr = i3cdev->info.static_addr << 1;
1126	desc++;
1127	}
1128
1129	i3c_ccc_cmd_init(cmd: &cmd, rnw: false, I3C_CCC_DEFSLVS, dests: &dest, ndests: 1);
1130	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1131	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1132
1133	return ret;
1134	}
1135	EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1136
1137	static int i3c_master_setda_locked(struct i3c_master_controller *master,
1138	u8 oldaddr, u8 newaddr, bool setdasa)
1139	{
1140	struct i3c_ccc_cmd_dest dest;
1141	struct i3c_ccc_setda *setda;
1142	struct i3c_ccc_cmd cmd;
1143	int ret;
1144
1145	if (!oldaddr || !newaddr)
1146	return -EINVAL;
1147
1148	setda = i3c_ccc_cmd_dest_init(dest: &dest, addr: oldaddr, payloadlen: sizeof(*setda));
1149	if (!setda)
1150	return -ENOMEM;
1151
1152	setda->addr = newaddr << 1;
1153	i3c_ccc_cmd_init(cmd: &cmd, rnw: false,
1154	id: setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1155	dests: &dest, ndests: 1);
1156	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1157	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1158
1159	return ret;
1160	}
1161
1162	static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1163	u8 static_addr, u8 dyn_addr)
1164	{
1165	return i3c_master_setda_locked(master, oldaddr: static_addr, newaddr: dyn_addr, setdasa: true);
1166	}
1167
1168	static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1169	u8 oldaddr, u8 newaddr)
1170	{
1171	return i3c_master_setda_locked(master, oldaddr, newaddr, setdasa: false);
1172	}
1173
1174	static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1175	struct i3c_device_info *info)
1176	{
1177	struct i3c_ccc_cmd_dest dest;
1178	struct i3c_ccc_mrl *mrl;
1179	struct i3c_ccc_cmd cmd;
1180	int ret;
1181
1182	mrl = i3c_ccc_cmd_dest_init(dest: &dest, addr: info->dyn_addr, payloadlen: sizeof(*mrl));
1183	if (!mrl)
1184	return -ENOMEM;
1185
1186	/*
1187	* When the device does not have IBI payload GETMRL only returns 2
1188	* bytes of data.
1189	*/
1190	if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1191	dest.payload.len -= 1;
1192
1193	i3c_ccc_cmd_init(cmd: &cmd, rnw: true, I3C_CCC_GETMRL, dests: &dest, ndests: 1);
1194	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1195	if (ret)
1196	goto out;
1197
1198	switch (dest.payload.len) {
1199	case 3:
1200	info->max_ibi_len = mrl->ibi_len;
1201	fallthrough;
1202	case 2:
1203	info->max_read_len = be16_to_cpu(mrl->read_len);
1204	break;
1205	default:
1206	ret = -EIO;
1207	goto out;
1208	}
1209
1210	out:
1211	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1212
1213	return ret;
1214	}
1215
1216	static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1217	struct i3c_device_info *info)
1218	{
1219	struct i3c_ccc_cmd_dest dest;
1220	struct i3c_ccc_mwl *mwl;
1221	struct i3c_ccc_cmd cmd;
1222	int ret;
1223
1224	mwl = i3c_ccc_cmd_dest_init(dest: &dest, addr: info->dyn_addr, payloadlen: sizeof(*mwl));
1225	if (!mwl)
1226	return -ENOMEM;
1227
1228	i3c_ccc_cmd_init(cmd: &cmd, rnw: true, I3C_CCC_GETMWL, dests: &dest, ndests: 1);
1229	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1230	if (ret)
1231	goto out;
1232
1233	if (dest.payload.len != sizeof(*mwl)) {
1234	ret = -EIO;
1235	goto out;
1236	}
1237
1238	info->max_write_len = be16_to_cpu(mwl->len);
1239
1240	out:
1241	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1242
1243	return ret;
1244	}
1245
1246	static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1247	struct i3c_device_info *info)
1248	{
1249	struct i3c_ccc_getmxds *getmaxds;
1250	struct i3c_ccc_cmd_dest dest;
1251	struct i3c_ccc_cmd cmd;
1252	int ret;
1253
1254	getmaxds = i3c_ccc_cmd_dest_init(dest: &dest, addr: info->dyn_addr,
1255	payloadlen: sizeof(*getmaxds));
1256	if (!getmaxds)
1257	return -ENOMEM;
1258
1259	i3c_ccc_cmd_init(cmd: &cmd, rnw: true, I3C_CCC_GETMXDS, dests: &dest, ndests: 1);
1260	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1261	if (ret) {
1262	/*
1263	* Retry when the device does not support max read turnaround
1264	* while expecting shorter length from this CCC command.
1265	*/
1266	dest.payload.len -= 3;
1267	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1268	if (ret)
1269	goto out;
1270	}
1271
1272	if (dest.payload.len != 2 && dest.payload.len != 5) {
1273	ret = -EIO;
1274	goto out;
1275	}
1276
1277	info->max_read_ds = getmaxds->maxrd;
1278	info->max_write_ds = getmaxds->maxwr;
1279	if (dest.payload.len == 5)
1280	info->max_read_turnaround = getmaxds->maxrdturn[0] |
1281	((u32)getmaxds->maxrdturn[1] << 8) |
1282	((u32)getmaxds->maxrdturn[2] << 16);
1283
1284	out:
1285	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1286
1287	return ret;
1288	}
1289
1290	static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1291	struct i3c_device_info *info)
1292	{
1293	struct i3c_ccc_gethdrcap *gethdrcap;
1294	struct i3c_ccc_cmd_dest dest;
1295	struct i3c_ccc_cmd cmd;
1296	int ret;
1297
1298	gethdrcap = i3c_ccc_cmd_dest_init(dest: &dest, addr: info->dyn_addr,
1299	payloadlen: sizeof(*gethdrcap));
1300	if (!gethdrcap)
1301	return -ENOMEM;
1302
1303	i3c_ccc_cmd_init(cmd: &cmd, rnw: true, I3C_CCC_GETHDRCAP, dests: &dest, ndests: 1);
1304	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1305	if (ret)
1306	goto out;
1307
1308	if (dest.payload.len != 1) {
1309	ret = -EIO;
1310	goto out;
1311	}
1312
1313	info->hdr_cap = gethdrcap->modes;
1314
1315	out:
1316	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1317
1318	return ret;
1319	}
1320
1321	static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1322	struct i3c_device_info *info)
1323	{
1324	struct i3c_ccc_getpid *getpid;
1325	struct i3c_ccc_cmd_dest dest;
1326	struct i3c_ccc_cmd cmd;
1327	int ret, i;
1328
1329	getpid = i3c_ccc_cmd_dest_init(dest: &dest, addr: info->dyn_addr, payloadlen: sizeof(*getpid));
1330	if (!getpid)
1331	return -ENOMEM;
1332
1333	i3c_ccc_cmd_init(cmd: &cmd, rnw: true, I3C_CCC_GETPID, dests: &dest, ndests: 1);
1334	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1335	if (ret)
1336	goto out;
1337
1338	info->pid = 0;
1339	for (i = 0; i < sizeof(getpid->pid); i++) {
1340	int sft = (sizeof(getpid->pid) - i - 1) * 8;
1341
1342	info->pid |= (u64)getpid->pid[i] << sft;
1343	}
1344
1345	out:
1346	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1347
1348	return ret;
1349	}
1350
1351	static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1352	struct i3c_device_info *info)
1353	{
1354	struct i3c_ccc_getbcr *getbcr;
1355	struct i3c_ccc_cmd_dest dest;
1356	struct i3c_ccc_cmd cmd;
1357	int ret;
1358
1359	getbcr = i3c_ccc_cmd_dest_init(dest: &dest, addr: info->dyn_addr, payloadlen: sizeof(*getbcr));
1360	if (!getbcr)
1361	return -ENOMEM;
1362
1363	i3c_ccc_cmd_init(cmd: &cmd, rnw: true, I3C_CCC_GETBCR, dests: &dest, ndests: 1);
1364	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1365	if (ret)
1366	goto out;
1367
1368	info->bcr = getbcr->bcr;
1369
1370	out:
1371	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1372
1373	return ret;
1374	}
1375
1376	static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1377	struct i3c_device_info *info)
1378	{
1379	struct i3c_ccc_getdcr *getdcr;
1380	struct i3c_ccc_cmd_dest dest;
1381	struct i3c_ccc_cmd cmd;
1382	int ret;
1383
1384	getdcr = i3c_ccc_cmd_dest_init(dest: &dest, addr: info->dyn_addr, payloadlen: sizeof(*getdcr));
1385	if (!getdcr)
1386	return -ENOMEM;
1387
1388	i3c_ccc_cmd_init(cmd: &cmd, rnw: true, I3C_CCC_GETDCR, dests: &dest, ndests: 1);
1389	ret = i3c_master_send_ccc_cmd_locked(master, cmd: &cmd);
1390	if (ret)
1391	goto out;
1392
1393	info->dcr = getdcr->dcr;
1394
1395	out:
1396	i3c_ccc_cmd_dest_cleanup(dest: &dest);
1397
1398	return ret;
1399	}
1400
1401	static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1402	{
1403	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1404	enum i3c_addr_slot_status slot_status;
1405	int ret;
1406
1407	if (!dev->info.dyn_addr)
1408	return -EINVAL;
1409
1410	slot_status = i3c_bus_get_addr_slot_status(bus: &master->bus,
1411	addr: dev->info.dyn_addr);
1412	if (slot_status == I3C_ADDR_SLOT_RSVD ||
1413	slot_status == I3C_ADDR_SLOT_I2C_DEV)
1414	return -EINVAL;
1415
1416	ret = i3c_master_getpid_locked(master, info: &dev->info);
1417	if (ret)
1418	return ret;
1419
1420	ret = i3c_master_getbcr_locked(master, info: &dev->info);
1421	if (ret)
1422	return ret;
1423
1424	ret = i3c_master_getdcr_locked(master, info: &dev->info);
1425	if (ret)
1426	return ret;
1427
1428	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1429	ret = i3c_master_getmxds_locked(master, info: &dev->info);
1430	if (ret)
1431	return ret;
1432	}
1433
1434	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1435	dev->info.max_ibi_len = 1;
1436
1437	i3c_master_getmrl_locked(master, info: &dev->info);
1438	i3c_master_getmwl_locked(master, info: &dev->info);
1439
1440	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1441	ret = i3c_master_gethdrcap_locked(master, info: &dev->info);
1442	if (ret)
1443	return ret;
1444	}
1445
1446	return 0;
1447	}
1448
1449	static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1450	{
1451	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1452
1453	if (dev->info.static_addr)
1454	i3c_bus_set_addr_slot_status(bus: &master->bus,
1455	addr: dev->info.static_addr,
1456	status: I3C_ADDR_SLOT_FREE);
1457
1458	if (dev->info.dyn_addr)
1459	i3c_bus_set_addr_slot_status(bus: &master->bus, addr: dev->info.dyn_addr,
1460	status: I3C_ADDR_SLOT_FREE);
1461
1462	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1463	i3c_bus_set_addr_slot_status(bus: &master->bus, addr: dev->boardinfo->init_dyn_addr,
1464	status: I3C_ADDR_SLOT_FREE);
1465	}
1466
1467	static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1468	{
1469	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1470	enum i3c_addr_slot_status status;
1471
1472	if (!dev->info.static_addr && !dev->info.dyn_addr)
1473	return 0;
1474
1475	if (dev->info.static_addr) {
1476	status = i3c_bus_get_addr_slot_status(bus: &master->bus,
1477	addr: dev->info.static_addr);
1478	/* Since static address and assigned dynamic address can be
1479	* equal, allow this case to pass.
1480	*/
1481	if (status != I3C_ADDR_SLOT_FREE &&
1482	dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1483	return -EBUSY;
1484
1485	i3c_bus_set_addr_slot_status(bus: &master->bus,
1486	addr: dev->info.static_addr,
1487	status: I3C_ADDR_SLOT_I3C_DEV);
1488	}
1489
1490	/*
1491	* ->init_dyn_addr should have been reserved before that, so, if we're
1492	* trying to apply a pre-reserved dynamic address, we should not try
1493	* to reserve the address slot a second time.
1494	*/
1495	if (dev->info.dyn_addr &&
1496	(!dev->boardinfo ||
1497	dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1498	status = i3c_bus_get_addr_slot_status(bus: &master->bus,
1499	addr: dev->info.dyn_addr);
1500	if (status != I3C_ADDR_SLOT_FREE)
1501	goto err_release_static_addr;
1502
1503	i3c_bus_set_addr_slot_status(bus: &master->bus, addr: dev->info.dyn_addr,
1504	status: I3C_ADDR_SLOT_I3C_DEV);
1505	}
1506
1507	return 0;
1508
1509	err_release_static_addr:
1510	if (dev->info.static_addr)
1511	i3c_bus_set_addr_slot_status(bus: &master->bus,
1512	addr: dev->info.static_addr,
1513	status: I3C_ADDR_SLOT_FREE);
1514
1515	return -EBUSY;
1516	}
1517
1518	static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1519	struct i3c_dev_desc *dev)
1520	{
1521	int ret;
1522
1523	/*
1524	* We don't attach devices to the controller until they are
1525	* addressable on the bus.
1526	*/
1527	if (!dev->info.static_addr && !dev->info.dyn_addr)
1528	return 0;
1529
1530	ret = i3c_master_get_i3c_addrs(dev);
1531	if (ret)
1532	return ret;
1533
1534	/* Do not attach the master device itself. */
1535	if (master->this != dev && master->ops->attach_i3c_dev) {
1536	ret = master->ops->attach_i3c_dev(dev);
1537	if (ret) {
1538	i3c_master_put_i3c_addrs(dev);
1539	return ret;
1540	}
1541	}
1542
1543	list_add_tail(new: &dev->common.node, head: &master->bus.devs.i3c);
1544
1545	return 0;
1546	}
1547
1548	static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1549	u8 old_dyn_addr)
1550	{
1551	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1552	int ret;
1553
1554	if (dev->info.dyn_addr != old_dyn_addr) {
1555	i3c_bus_set_addr_slot_status(bus: &master->bus,
1556	addr: dev->info.dyn_addr,
1557	status: I3C_ADDR_SLOT_I3C_DEV);
1558	if (old_dyn_addr)
1559	i3c_bus_set_addr_slot_status(bus: &master->bus, addr: old_dyn_addr,
1560	status: I3C_ADDR_SLOT_FREE);
1561	}
1562
1563	if (master->ops->reattach_i3c_dev) {
1564	ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1565	if (ret) {
1566	i3c_master_put_i3c_addrs(dev);
1567	return ret;
1568	}
1569	}
1570
1571	return 0;
1572	}
1573
1574	static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1575	{
1576	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1577
1578	/* Do not detach the master device itself. */
1579	if (master->this != dev && master->ops->detach_i3c_dev)
1580	master->ops->detach_i3c_dev(dev);
1581
1582	i3c_master_put_i3c_addrs(dev);
1583	list_del(entry: &dev->common.node);
1584	}
1585
1586	static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1587	struct i2c_dev_desc *dev)
1588	{
1589	int ret;
1590
1591	if (master->ops->attach_i2c_dev) {
1592	ret = master->ops->attach_i2c_dev(dev);
1593	if (ret)
1594	return ret;
1595	}
1596
1597	list_add_tail(new: &dev->common.node, head: &master->bus.devs.i2c);
1598
1599	return 0;
1600	}
1601
1602	static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1603	{
1604	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1605
1606	list_del(entry: &dev->common.node);
1607
1608	if (master->ops->detach_i2c_dev)
1609	master->ops->detach_i2c_dev(dev);
1610	}
1611
1612	static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1613	struct i3c_dev_boardinfo *boardinfo)
1614	{
1615	struct i3c_device_info info = {
1616	.static_addr = boardinfo->static_addr,
1617	.pid = boardinfo->pid,
1618	};
1619	struct i3c_dev_desc *i3cdev;
1620	int ret;
1621
1622	i3cdev = i3c_master_alloc_i3c_dev(master, info: &info);
1623	if (IS_ERR(ptr: i3cdev))
1624	return -ENOMEM;
1625
1626	i3cdev->boardinfo = boardinfo;
1627
1628	ret = i3c_master_attach_i3c_dev(master, dev: i3cdev);
1629	if (ret)
1630	goto err_free_dev;
1631
1632	ret = i3c_master_setdasa_locked(master, static_addr: i3cdev->info.static_addr,
1633	dyn_addr: i3cdev->boardinfo->init_dyn_addr);
1634	if (ret)
1635	goto err_detach_dev;
1636
1637	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1638	ret = i3c_master_reattach_i3c_dev(dev: i3cdev, old_dyn_addr: 0);
1639	if (ret)
1640	goto err_rstdaa;
1641
1642	ret = i3c_master_retrieve_dev_info(dev: i3cdev);
1643	if (ret)
1644	goto err_rstdaa;
1645
1646	return 0;
1647
1648	err_rstdaa:
1649	i3c_master_rstdaa_locked(master, addr: i3cdev->boardinfo->init_dyn_addr);
1650	err_detach_dev:
1651	i3c_master_detach_i3c_dev(dev: i3cdev);
1652	err_free_dev:
1653	i3c_master_free_i3c_dev(dev: i3cdev);
1654
1655	return ret;
1656	}
1657
1658	static void
1659	i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1660	{
1661	struct i3c_dev_desc *desc;
1662	int ret;
1663
1664	if (!master->init_done)
1665	return;
1666
1667	i3c_bus_for_each_i3cdev(&master->bus, desc) {
1668	if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1669	continue;
1670
1671	desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1672	if (!desc->dev)
1673	continue;
1674
1675	desc->dev->bus = &master->bus;
1676	desc->dev->desc = desc;
1677	desc->dev->dev.parent = &master->dev;
1678	desc->dev->dev.type = &i3c_device_type;
1679	desc->dev->dev.bus = &i3c_bus_type;
1680	desc->dev->dev.release = i3c_device_release;
1681	dev_set_name(dev: &desc->dev->dev, name: "%d-%llx", master->bus.id,
1682	desc->info.pid);
1683
1684	if (desc->boardinfo)
1685	desc->dev->dev.of_node = desc->boardinfo->of_node;
1686
1687	ret = device_register(dev: &desc->dev->dev);
1688	if (ret) {
1689	dev_err(&master->dev,
1690	"Failed to add I3C device (err = %d)\n", ret);
1691	put_device(dev: &desc->dev->dev);
1692	}
1693	}
1694	}
1695
1696	/**
1697	* i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1698	* @master: master doing the DAA
1699	*
1700	* This function is instantiating an I3C device object and adding it to the
1701	* I3C device list. All device information are automatically retrieved using
1702	* standard CCC commands.
1703	*
1704	* The I3C device object is returned in case the master wants to attach
1705	* private data to it using i3c_dev_set_master_data().
1706	*
1707	* This function must be called with the bus lock held in write mode.
1708	*
1709	* Return: a 0 in case of success, an negative error code otherwise.
1710	*/
1711	int i3c_master_do_daa(struct i3c_master_controller *master)
1712	{
1713	int ret;
1714
1715	i3c_bus_maintenance_lock(bus: &master->bus);
1716	ret = master->ops->do_daa(master);
1717	i3c_bus_maintenance_unlock(bus: &master->bus);
1718
1719	if (ret)
1720	return ret;
1721
1722	i3c_bus_normaluse_lock(bus: &master->bus);
1723	i3c_master_register_new_i3c_devs(master);
1724	i3c_bus_normaluse_unlock(bus: &master->bus);
1725
1726	return 0;
1727	}
1728	EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1729
1730	/**
1731	* i3c_master_set_info() - set master device information
1732	* @master: master used to send frames on the bus
1733	* @info: I3C device information
1734	*
1735	* Set master device info. This should be called from
1736	* &i3c_master_controller_ops->bus_init().
1737	*
1738	* Not all &i3c_device_info fields are meaningful for a master device.
1739	* Here is a list of fields that should be properly filled:
1740	*
1741	* - &i3c_device_info->dyn_addr
1742	* - &i3c_device_info->bcr
1743	* - &i3c_device_info->dcr
1744	* - &i3c_device_info->pid
1745	* - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1746	* &i3c_device_info->bcr
1747	*
1748	* This function must be called with the bus lock held in maintenance mode.
1749	*
1750	* Return: 0 if @info contains valid information (not every piece of
1751	* information can be checked, but we can at least make sure @info->dyn_addr
1752	* and @info->bcr are correct), -EINVAL otherwise.
1753	*/
1754	int i3c_master_set_info(struct i3c_master_controller *master,
1755	const struct i3c_device_info *info)
1756	{
1757	struct i3c_dev_desc *i3cdev;
1758	int ret;
1759
1760	if (!i3c_bus_dev_addr_is_avail(bus: &master->bus, addr: info->dyn_addr))
1761	return -EINVAL;
1762
1763	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1764	master->secondary)
1765	return -EINVAL;
1766
1767	if (master->this)
1768	return -EINVAL;
1769
1770	i3cdev = i3c_master_alloc_i3c_dev(master, info);
1771	if (IS_ERR(ptr: i3cdev))
1772	return PTR_ERR(ptr: i3cdev);
1773
1774	master->this = i3cdev;
1775	master->bus.cur_master = master->this;
1776
1777	ret = i3c_master_attach_i3c_dev(master, dev: i3cdev);
1778	if (ret)
1779	goto err_free_dev;
1780
1781	return 0;
1782
1783	err_free_dev:
1784	i3c_master_free_i3c_dev(dev: i3cdev);
1785
1786	return ret;
1787	}
1788	EXPORT_SYMBOL_GPL(i3c_master_set_info);
1789
1790	static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1791	{
1792	struct i3c_dev_desc *i3cdev, *i3ctmp;
1793	struct i2c_dev_desc *i2cdev, *i2ctmp;
1794
1795	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1796	common.node) {
1797	i3c_master_detach_i3c_dev(dev: i3cdev);
1798
1799	if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1800	i3c_bus_set_addr_slot_status(bus: &master->bus,
1801	addr: i3cdev->boardinfo->init_dyn_addr,
1802	status: I3C_ADDR_SLOT_FREE);
1803
1804	i3c_master_free_i3c_dev(dev: i3cdev);
1805	}
1806
1807	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1808	common.node) {
1809	i3c_master_detach_i2c_dev(dev: i2cdev);
1810	i3c_bus_set_addr_slot_status(bus: &master->bus,
1811	addr: i2cdev->addr,
1812	status: I3C_ADDR_SLOT_FREE);
1813	i3c_master_free_i2c_dev(dev: i2cdev);
1814	}
1815	}
1816
1817	/**
1818	* i3c_master_bus_init() - initialize an I3C bus
1819	* @master: main master initializing the bus
1820	*
1821	* This function is following all initialisation steps described in the I3C
1822	* specification:
1823	*
1824	* 1. Attach I2C devs to the master so that the master can fill its internal
1825	* device table appropriately
1826	*
1827	* 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1828	* the master controller. That's usually where the bus mode is selected
1829	* (pure bus or mixed fast/slow bus)
1830	*
1831	* 3. Instruct all devices on the bus to drop their dynamic address. This is
1832	* particularly important when the bus was previously configured by someone
1833	* else (for example the bootloader)
1834	*
1835	* 4. Disable all slave events.
1836	*
1837	* 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1838	* also have static_addr, try to pre-assign dynamic addresses requested by
1839	* the FW with SETDASA and attach corresponding statically defined I3C
1840	* devices to the master.
1841	*
1842	* 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1843	* remaining I3C devices
1844	*
1845	* Once this is done, all I3C and I2C devices should be usable.
1846	*
1847	* Return: a 0 in case of success, an negative error code otherwise.
1848	*/
1849	static int i3c_master_bus_init(struct i3c_master_controller *master)
1850	{
1851	enum i3c_addr_slot_status status;
1852	struct i2c_dev_boardinfo *i2cboardinfo;
1853	struct i3c_dev_boardinfo *i3cboardinfo;
1854	struct i2c_dev_desc *i2cdev;
1855	int ret;
1856
1857	/*
1858	* First attach all devices with static definitions provided by the
1859	* FW.
1860	*/
1861	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1862	status = i3c_bus_get_addr_slot_status(bus: &master->bus,
1863	addr: i2cboardinfo->base.addr);
1864	if (status != I3C_ADDR_SLOT_FREE) {
1865	ret = -EBUSY;
1866	goto err_detach_devs;
1867	}
1868
1869	i3c_bus_set_addr_slot_status(bus: &master->bus,
1870	addr: i2cboardinfo->base.addr,
1871	status: I3C_ADDR_SLOT_I2C_DEV);
1872
1873	i2cdev = i3c_master_alloc_i2c_dev(master,
1874	addr: i2cboardinfo->base.addr,
1875	lvr: i2cboardinfo->lvr);
1876	if (IS_ERR(ptr: i2cdev)) {
1877	ret = PTR_ERR(ptr: i2cdev);
1878	goto err_detach_devs;
1879	}
1880
1881	ret = i3c_master_attach_i2c_dev(master, dev: i2cdev);
1882	if (ret) {
1883	i3c_master_free_i2c_dev(dev: i2cdev);
1884	goto err_detach_devs;
1885	}
1886	}
1887
1888	/*
1889	* Now execute the controller specific ->bus_init() routine, which
1890	* might configure its internal logic to match the bus limitations.
1891	*/
1892	ret = master->ops->bus_init(master);
1893	if (ret)
1894	goto err_detach_devs;
1895
1896	/*
1897	* The master device should have been instantiated in ->bus_init(),
1898	* complain if this was not the case.
1899	*/
1900	if (!master->this) {
1901	dev_err(&master->dev,
1902	"master_set_info() was not called in ->bus_init()\n");
1903	ret = -EINVAL;
1904	goto err_bus_cleanup;
1905	}
1906
1907	if (master->ops->set_speed) {
1908	ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
1909	if (ret)
1910	goto err_bus_cleanup;
1911	}
1912
1913	/*
1914	* Reset all dynamic address that may have been assigned before
1915	* (assigned by the bootloader for example).
1916	*/
1917	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1918	if (ret && ret != I3C_ERROR_M2)
1919	goto err_bus_cleanup;
1920
1921	if (master->ops->set_speed) {
1922	ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
1923	if (ret)
1924	goto err_bus_cleanup;
1925	}
1926
1927	/* Disable all slave events before starting DAA. */
1928	ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1929	I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1930	I3C_CCC_EVENT_HJ);
1931	if (ret && ret != I3C_ERROR_M2)
1932	goto err_bus_cleanup;
1933
1934	/*
1935	* Reserve init_dyn_addr first, and then try to pre-assign dynamic
1936	* address and retrieve device information if needed.
1937	* In case pre-assign dynamic address fails, setting dynamic address to
1938	* the requested init_dyn_addr is retried after DAA is done in
1939	* i3c_master_add_i3c_dev_locked().
1940	*/
1941	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1942
1943	/*
1944	* We don't reserve a dynamic address for devices that
1945	* don't explicitly request one.
1946	*/
1947	if (!i3cboardinfo->init_dyn_addr)
1948	continue;
1949
1950	ret = i3c_bus_get_addr_slot_status(bus: &master->bus,
1951	addr: i3cboardinfo->init_dyn_addr);
1952	if (ret != I3C_ADDR_SLOT_FREE) {
1953	ret = -EBUSY;
1954	goto err_rstdaa;
1955	}
1956
1957	/* Do not mark as occupied until real device exist in bus */
1958	i3c_bus_set_addr_slot_status_mask(bus: &master->bus,
1959	addr: i3cboardinfo->init_dyn_addr,
1960	status: I3C_ADDR_SLOT_EXT_DESIRED,
1961	mask: I3C_ADDR_SLOT_EXT_STATUS_MASK);
1962
1963	/*
1964	* Only try to create/attach devices that have a static
1965	* address. Other devices will be created/attached when
1966	* DAA happens, and the requested dynamic address will
1967	* be set using SETNEWDA once those devices become
1968	* addressable.
1969	*/
1970
1971	if (i3cboardinfo->static_addr)
1972	i3c_master_early_i3c_dev_add(master, boardinfo: i3cboardinfo);
1973	}
1974
1975	ret = i3c_master_do_daa(master);
1976	if (ret)
1977	goto err_rstdaa;
1978
1979	return 0;
1980
1981	err_rstdaa:
1982	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1983
1984	err_bus_cleanup:
1985	if (master->ops->bus_cleanup)
1986	master->ops->bus_cleanup(master);
1987
1988	err_detach_devs:
1989	i3c_master_detach_free_devs(master);
1990
1991	return ret;
1992	}
1993
1994	static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1995	{
1996	if (master->ops->bus_cleanup)
1997	master->ops->bus_cleanup(master);
1998
1999	i3c_master_detach_free_devs(master);
2000	}
2001
2002	static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
2003	{
2004	struct i3c_master_controller *master = i3cdev->common.master;
2005	struct i3c_dev_boardinfo *i3cboardinfo;
2006
2007	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
2008	if (i3cdev->info.pid != i3cboardinfo->pid)
2009	continue;
2010
2011	i3cdev->boardinfo = i3cboardinfo;
2012	i3cdev->info.static_addr = i3cboardinfo->static_addr;
2013	return;
2014	}
2015	}
2016
2017	static struct i3c_dev_desc *
2018	i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
2019	{
2020	struct i3c_master_controller *master = i3c_dev_get_master(dev: refdev);
2021	struct i3c_dev_desc *i3cdev;
2022
2023	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2024	if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
2025	return i3cdev;
2026	}
2027
2028	return NULL;
2029	}
2030
2031	/**
2032	* i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
2033	* @master: master used to send frames on the bus
2034	* @addr: I3C slave dynamic address assigned to the device
2035	*
2036	* This function is instantiating an I3C device object and adding it to the
2037	* I3C device list. All device information are automatically retrieved using
2038	* standard CCC commands.
2039	*
2040	* The I3C device object is returned in case the master wants to attach
2041	* private data to it using i3c_dev_set_master_data().
2042	*
2043	* This function must be called with the bus lock held in write mode.
2044	*
2045	* Return: a 0 in case of success, an negative error code otherwise.
2046	*/
2047	int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
2048	u8 addr)
2049	{
2050	struct i3c_device_info info = { .dyn_addr = addr };
2051	struct i3c_dev_desc *newdev, *olddev;
2052	u8 old_dyn_addr = addr, expected_dyn_addr;
2053	struct i3c_ibi_setup ibireq = { };
2054	bool enable_ibi = false;
2055	int ret;
2056
2057	if (!master)
2058	return -EINVAL;
2059
2060	newdev = i3c_master_alloc_i3c_dev(master, info: &info);
2061	if (IS_ERR(ptr: newdev))
2062	return PTR_ERR(ptr: newdev);
2063
2064	ret = i3c_master_attach_i3c_dev(master, dev: newdev);
2065	if (ret)
2066	goto err_free_dev;
2067
2068	ret = i3c_master_retrieve_dev_info(dev: newdev);
2069	if (ret)
2070	goto err_detach_dev;
2071
2072	i3c_master_attach_boardinfo(i3cdev: newdev);
2073
2074	olddev = i3c_master_search_i3c_dev_duplicate(refdev: newdev);
2075	if (olddev) {
2076	newdev->dev = olddev->dev;
2077	if (newdev->dev)
2078	newdev->dev->desc = newdev;
2079
2080	/*
2081	* We need to restore the IBI state too, so let's save the
2082	* IBI information and try to restore them after olddev has
2083	* been detached+released and its IBI has been stopped and
2084	* the associated resources have been freed.
2085	*/
2086	mutex_lock(&olddev->ibi_lock);
2087	if (olddev->ibi) {
2088	ibireq.handler = olddev->ibi->handler;
2089	ibireq.max_payload_len = olddev->ibi->max_payload_len;
2090	ibireq.num_slots = olddev->ibi->num_slots;
2091
2092	if (olddev->ibi->enabled)
2093	enable_ibi = true;
2094	/*
2095	* The olddev should not receive any commands on the
2096	* i3c bus as it does not exist and has been assigned
2097	* a new address. This will result in NACK or timeout.
2098	* So, update the olddev->ibi->enabled flag to false
2099	* to avoid DISEC with OldAddr.
2100	*/
2101	olddev->ibi->enabled = false;
2102	i3c_dev_free_ibi_locked(dev: olddev);
2103	}
2104	mutex_unlock(lock: &olddev->ibi_lock);
2105
2106	old_dyn_addr = olddev->info.dyn_addr;
2107
2108	i3c_master_detach_i3c_dev(dev: olddev);
2109	i3c_master_free_i3c_dev(dev: olddev);
2110	}
2111
2112	/*
2113	* Depending on our previous state, the expected dynamic address might
2114	* differ:
2115	* - if the device already had a dynamic address assigned, let's try to
2116	* re-apply this one
2117	* - if the device did not have a dynamic address and the firmware
2118	* requested a specific address, pick this one
2119	* - in any other case, keep the address automatically assigned by the
2120	* master
2121	*/
2122	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2123	expected_dyn_addr = old_dyn_addr;
2124	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2125	expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2126	else
2127	expected_dyn_addr = newdev->info.dyn_addr;
2128
2129	if (newdev->info.dyn_addr != expected_dyn_addr &&
2130	i3c_bus_get_addr_slot_status(bus: &master->bus, addr: expected_dyn_addr) == I3C_ADDR_SLOT_FREE) {
2131	/*
2132	* Try to apply the expected dynamic address. If it fails, keep
2133	* the address assigned by the master.
2134	*/
2135	ret = i3c_master_setnewda_locked(master,
2136	oldaddr: newdev->info.dyn_addr,
2137	newaddr: expected_dyn_addr);
2138	if (!ret) {
2139	old_dyn_addr = newdev->info.dyn_addr;
2140	newdev->info.dyn_addr = expected_dyn_addr;
2141	i3c_master_reattach_i3c_dev(dev: newdev, old_dyn_addr);
2142	} else {
2143	dev_err(&master->dev,
2144	"Failed to assign reserved/old address to device %d%llx",
2145	master->bus.id, newdev->info.pid);
2146	}
2147	}
2148
2149	/*
2150	* Now is time to try to restore the IBI setup. If we're lucky,
2151	* everything works as before, otherwise, all we can do is complain.
2152	* FIXME: maybe we should add callback to inform the driver that it
2153	* should request the IBI again instead of trying to hide that from
2154	* him.
2155	*/
2156	if (ibireq.handler) {
2157	mutex_lock(&newdev->ibi_lock);
2158	ret = i3c_dev_request_ibi_locked(dev: newdev, req: &ibireq);
2159	if (ret) {
2160	dev_err(&master->dev,
2161	"Failed to request IBI on device %d-%llx",
2162	master->bus.id, newdev->info.pid);
2163	} else if (enable_ibi) {
2164	ret = i3c_dev_enable_ibi_locked(dev: newdev);
2165	if (ret)
2166	dev_err(&master->dev,
2167	"Failed to re-enable IBI on device %d-%llx",
2168	master->bus.id, newdev->info.pid);
2169	}
2170	mutex_unlock(lock: &newdev->ibi_lock);
2171	}
2172
2173	return 0;
2174
2175	err_detach_dev:
2176	if (newdev->dev && newdev->dev->desc)
2177	newdev->dev->desc = NULL;
2178
2179	i3c_master_detach_i3c_dev(dev: newdev);
2180
2181	err_free_dev:
2182	i3c_master_free_i3c_dev(dev: newdev);
2183
2184	return ret;
2185	}
2186	EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2187
2188	#define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2189
2190	static int
2191	of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2192	struct device_node *node, u32 *reg)
2193	{
2194	struct i2c_dev_boardinfo *boardinfo;
2195	struct device *dev = &master->dev;
2196	int ret;
2197
2198	boardinfo = devm_kzalloc(dev, size: sizeof(*boardinfo), GFP_KERNEL);
2199	if (!boardinfo)
2200	return -ENOMEM;
2201
2202	ret = of_i2c_get_board_info(dev, node, info: &boardinfo->base);
2203	if (ret)
2204	return ret;
2205
2206	/*
2207	* The I3C Specification does not clearly say I2C devices with 10-bit
2208	* address are supported. These devices can't be passed properly through
2209	* DEFSLVS command.
2210	*/
2211	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2212	dev_err(dev, "I2C device with 10 bit address not supported.");
2213	return -ENOTSUPP;
2214	}
2215
2216	/* LVR is encoded in reg[2]. */
2217	boardinfo->lvr = reg[2];
2218
2219	list_add_tail(new: &boardinfo->node, head: &master->boardinfo.i2c);
2220	of_node_get(node);
2221
2222	return 0;
2223	}
2224
2225	static int
2226	of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2227	struct device_node *node, u32 *reg)
2228	{
2229	struct i3c_dev_boardinfo *boardinfo;
2230	struct device *dev = &master->dev;
2231	enum i3c_addr_slot_status addrstatus;
2232	u32 init_dyn_addr = 0;
2233
2234	boardinfo = devm_kzalloc(dev, size: sizeof(*boardinfo), GFP_KERNEL);
2235	if (!boardinfo)
2236	return -ENOMEM;
2237
2238	if (reg[0]) {
2239	if (reg[0] > I3C_MAX_ADDR)
2240	return -EINVAL;
2241
2242	addrstatus = i3c_bus_get_addr_slot_status(bus: &master->bus,
2243	addr: reg[0]);
2244	if (addrstatus != I3C_ADDR_SLOT_FREE)
2245	return -EINVAL;
2246	}
2247
2248	boardinfo->static_addr = reg[0];
2249
2250	if (!of_property_read_u32(np: node, propname: "assigned-address", out_value: &init_dyn_addr)) {
2251	if (init_dyn_addr > I3C_MAX_ADDR)
2252	return -EINVAL;
2253
2254	addrstatus = i3c_bus_get_addr_slot_status(bus: &master->bus,
2255	addr: init_dyn_addr);
2256	if (addrstatus != I3C_ADDR_SLOT_FREE)
2257	return -EINVAL;
2258	}
2259
2260	boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2261
2262	if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2263	I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2264	return -EINVAL;
2265
2266	boardinfo->init_dyn_addr = init_dyn_addr;
2267	boardinfo->of_node = of_node_get(node);
2268	list_add_tail(new: &boardinfo->node, head: &master->boardinfo.i3c);
2269
2270	return 0;
2271	}
2272
2273	static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2274	struct device_node *node)
2275	{
2276	u32 reg[3];
2277	int ret;
2278
2279	if (!master)
2280	return -EINVAL;
2281
2282	ret = of_property_read_u32_array(np: node, propname: "reg", out_values: reg, ARRAY_SIZE(reg));
2283	if (ret)
2284	return ret;
2285
2286	/*
2287	* The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2288	* dealing with an I2C device.
2289	*/
2290	if (!reg[1])
2291	ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2292	else
2293	ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2294
2295	return ret;
2296	}
2297
2298	static int of_populate_i3c_bus(struct i3c_master_controller *master)
2299	{
2300	struct device *dev = &master->dev;
2301	struct device_node *i3cbus_np = dev->of_node;
2302	struct device_node *node;
2303	int ret;
2304	u32 val;
2305
2306	if (!i3cbus_np)
2307	return 0;
2308
2309	for_each_available_child_of_node(i3cbus_np, node) {
2310	ret = of_i3c_master_add_dev(master, node);
2311	if (ret) {
2312	of_node_put(node);
2313	return ret;
2314	}
2315	}
2316
2317	/*
2318	* The user might want to limit I2C and I3C speed in case some devices
2319	* on the bus are not supporting typical rates, or if the bus topology
2320	* prevents it from using max possible rate.
2321	*/
2322	if (!of_property_read_u32(np: i3cbus_np, propname: "i2c-scl-hz", out_value: &val))
2323	master->bus.scl_rate.i2c = val;
2324
2325	if (!of_property_read_u32(np: i3cbus_np, propname: "i3c-scl-hz", out_value: &val))
2326	master->bus.scl_rate.i3c = val;
2327
2328	return 0;
2329	}
2330
2331	static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2332	struct i2c_msg *xfers, int nxfers)
2333	{
2334	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2335	struct i2c_dev_desc *dev;
2336	int i, ret;
2337	u16 addr;
2338
2339	if (!xfers || !master || nxfers <= 0)
2340	return -EINVAL;
2341
2342	if (!master->ops->i2c_xfers)
2343	return -ENOTSUPP;
2344
2345	/* Doing transfers to different devices is not supported. */
2346	addr = xfers[0].addr;
2347	for (i = 1; i < nxfers; i++) {
2348	if (addr != xfers[i].addr)
2349	return -ENOTSUPP;
2350	}
2351
2352	i3c_bus_normaluse_lock(bus: &master->bus);
2353	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2354	if (!dev)
2355	ret = -ENOENT;
2356	else
2357	ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2358	i3c_bus_normaluse_unlock(bus: &master->bus);
2359
2360	return ret ? ret : nxfers;
2361	}
2362
2363	static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2364	{
2365	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2366	}
2367
2368	static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2369	{
2370	/* Fall back to no spike filters and FM bus mode. */
2371	u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2372	u32 reg[3];
2373
2374	if (!of_property_read_u32_array(np: client->dev.of_node, propname: "reg", out_values: reg, ARRAY_SIZE(reg)))
2375	lvr = reg[2];
2376
2377	return lvr;
2378	}
2379
2380	static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2381	{
2382	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2383	enum i3c_addr_slot_status status;
2384	struct i2c_dev_desc *i2cdev;
2385	int ret;
2386
2387	/* Already added by board info? */
2388	if (i3c_master_find_i2c_dev_by_addr(master, addr: client->addr))
2389	return 0;
2390
2391	status = i3c_bus_get_addr_slot_status(bus: &master->bus, addr: client->addr);
2392	if (status != I3C_ADDR_SLOT_FREE)
2393	return -EBUSY;
2394
2395	i3c_bus_set_addr_slot_status(bus: &master->bus, addr: client->addr,
2396	status: I3C_ADDR_SLOT_I2C_DEV);
2397
2398	i2cdev = i3c_master_alloc_i2c_dev(master, addr: client->addr,
2399	lvr: i3c_master_i2c_get_lvr(client));
2400	if (IS_ERR(ptr: i2cdev)) {
2401	ret = PTR_ERR(ptr: i2cdev);
2402	goto out_clear_status;
2403	}
2404
2405	ret = i3c_master_attach_i2c_dev(master, dev: i2cdev);
2406	if (ret)
2407	goto out_free_dev;
2408
2409	return 0;
2410
2411	out_free_dev:
2412	i3c_master_free_i2c_dev(dev: i2cdev);
2413	out_clear_status:
2414	i3c_bus_set_addr_slot_status(bus: &master->bus, addr: client->addr,
2415	status: I3C_ADDR_SLOT_FREE);
2416
2417	return ret;
2418	}
2419
2420	static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2421	{
2422	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2423	struct i2c_dev_desc *dev;
2424
2425	dev = i3c_master_find_i2c_dev_by_addr(master, addr: client->addr);
2426	if (!dev)
2427	return -ENODEV;
2428
2429	i3c_master_detach_i2c_dev(dev);
2430	i3c_bus_set_addr_slot_status(bus: &master->bus, addr: dev->addr,
2431	status: I3C_ADDR_SLOT_FREE);
2432	i3c_master_free_i2c_dev(dev);
2433
2434	return 0;
2435	}
2436
2437	static const struct i2c_algorithm i3c_master_i2c_algo = {
2438	.master_xfer = i3c_master_i2c_adapter_xfer,
2439	.functionality = i3c_master_i2c_funcs,
2440	};
2441
2442	static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2443	void *data)
2444	{
2445	struct i2c_adapter *adap;
2446	struct i2c_client *client;
2447	struct device *dev = data;
2448	struct i3c_master_controller *master;
2449	int ret;
2450
2451	if (dev->type != &i2c_client_type)
2452	return 0;
2453
2454	client = to_i2c_client(dev);
2455	adap = client->adapter;
2456
2457	if (adap->algo != &i3c_master_i2c_algo)
2458	return 0;
2459
2460	master = i2c_adapter_to_i3c_master(adap);
2461
2462	i3c_bus_maintenance_lock(bus: &master->bus);
2463	switch (action) {
2464	case BUS_NOTIFY_ADD_DEVICE:
2465	ret = i3c_master_i2c_attach(adap, client);
2466	break;
2467	case BUS_NOTIFY_DEL_DEVICE:
2468	ret = i3c_master_i2c_detach(adap, client);
2469	break;
2470	}
2471	i3c_bus_maintenance_unlock(bus: &master->bus);
2472
2473	return ret;
2474	}
2475
2476	static struct notifier_block i2cdev_notifier = {
2477	.notifier_call = i3c_i2c_notifier_call,
2478	};
2479
2480	static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2481	{
2482	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2483	struct i2c_dev_desc *i2cdev;
2484	struct i2c_dev_boardinfo *i2cboardinfo;
2485	int ret, id;
2486
2487	adap->dev.parent = master->dev.parent;
2488	adap->owner = master->dev.parent->driver->owner;
2489	adap->algo = &i3c_master_i2c_algo;
2490	strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2491
2492	/* FIXME: Should we allow i3c masters to override these values? */
2493	adap->timeout = 1000;
2494	adap->retries = 3;
2495
2496	id = of_alias_get_id(np: master->dev.of_node, stem: "i2c");
2497	if (id >= 0) {
2498	adap->nr = id;
2499	ret = i2c_add_numbered_adapter(adap);
2500	} else {
2501	ret = i2c_add_adapter(adap);
2502	}
2503	if (ret)
2504	return ret;
2505
2506	/*
2507	* We silently ignore failures here. The bus should keep working
2508	* correctly even if one or more i2c devices are not registered.
2509	*/
2510	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2511	i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2512	addr: i2cboardinfo->base.addr);
2513	if (WARN_ON(!i2cdev))
2514	continue;
2515	i2cdev->dev = i2c_new_client_device(adap, info: &i2cboardinfo->base);
2516	}
2517
2518	return 0;
2519	}
2520
2521	static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2522	{
2523	struct i2c_dev_desc *i2cdev;
2524
2525	i2c_del_adapter(adap: &master->i2c);
2526
2527	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2528	i2cdev->dev = NULL;
2529	}
2530
2531	static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2532	{
2533	struct i3c_dev_desc *i3cdev;
2534
2535	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2536	if (!i3cdev->dev)
2537	continue;
2538
2539	i3cdev->dev->desc = NULL;
2540	if (device_is_registered(dev: &i3cdev->dev->dev))
2541	device_unregister(dev: &i3cdev->dev->dev);
2542	else
2543	put_device(dev: &i3cdev->dev->dev);
2544	i3cdev->dev = NULL;
2545	}
2546	}
2547
2548	/**
2549	* i3c_master_queue_ibi() - Queue an IBI
2550	* @dev: the device this IBI is coming from
2551	* @slot: the IBI slot used to store the payload
2552	*
2553	* Queue an IBI to the controller workqueue. The IBI handler attached to
2554	* the dev will be called from a workqueue context.
2555	*/
2556	void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2557	{
2558	if (!dev->ibi || !slot)
2559	return;
2560
2561	atomic_inc(v: &dev->ibi->pending_ibis);
2562	queue_work(wq: dev->ibi->wq, work: &slot->work);
2563	}
2564	EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2565
2566	static void i3c_master_handle_ibi(struct work_struct *work)
2567	{
2568	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2569	work);
2570	struct i3c_dev_desc *dev = slot->dev;
2571	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2572	struct i3c_ibi_payload payload;
2573
2574	payload.data = slot->data;
2575	payload.len = slot->len;
2576
2577	if (dev->dev)
2578	dev->ibi->handler(dev->dev, &payload);
2579
2580	master->ops->recycle_ibi_slot(dev, slot);
2581	if (atomic_dec_and_test(v: &dev->ibi->pending_ibis))
2582	complete(&dev->ibi->all_ibis_handled);
2583	}
2584
2585	static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2586	struct i3c_ibi_slot *slot)
2587	{
2588	slot->dev = dev;
2589	INIT_WORK(&slot->work, i3c_master_handle_ibi);
2590	}
2591
2592	struct i3c_generic_ibi_slot {
2593	struct list_head node;
2594	struct i3c_ibi_slot base;
2595	};
2596
2597	struct i3c_generic_ibi_pool {
2598	spinlock_t lock;
2599	unsigned int num_slots;
2600	struct i3c_generic_ibi_slot *slots;
2601	void *payload_buf;
2602	struct list_head free_slots;
2603	struct list_head pending;
2604	};
2605
2606	/**
2607	* i3c_generic_ibi_free_pool() - Free a generic IBI pool
2608	* @pool: the IBI pool to free
2609	*
2610	* Free all IBI slots allated by a generic IBI pool.
2611	*/
2612	void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2613	{
2614	struct i3c_generic_ibi_slot *slot;
2615	unsigned int nslots = 0;
2616
2617	while (!list_empty(head: &pool->free_slots)) {
2618	slot = list_first_entry(&pool->free_slots,
2619	struct i3c_generic_ibi_slot, node);
2620	list_del(entry: &slot->node);
2621	nslots++;
2622	}
2623
2624	/*
2625	* If the number of freed slots is not equal to the number of allocated
2626	* slots we have a leak somewhere.
2627	*/
2628	WARN_ON(nslots != pool->num_slots);
2629
2630	kfree(objp: pool->payload_buf);
2631	kfree(objp: pool->slots);
2632	kfree(objp: pool);
2633	}
2634	EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2635
2636	/**
2637	* i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2638	* @dev: the device this pool will be used for
2639	* @req: IBI setup request describing what the device driver expects
2640	*
2641	* Create a generic IBI pool based on the information provided in @req.
2642	*
2643	* Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2644	*/
2645	struct i3c_generic_ibi_pool *
2646	i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2647	const struct i3c_ibi_setup *req)
2648	{
2649	struct i3c_generic_ibi_pool *pool;
2650	struct i3c_generic_ibi_slot *slot;
2651	unsigned int i;
2652	int ret;
2653
2654	pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2655	if (!pool)
2656	return ERR_PTR(error: -ENOMEM);
2657
2658	spin_lock_init(&pool->lock);
2659	INIT_LIST_HEAD(list: &pool->free_slots);
2660	INIT_LIST_HEAD(list: &pool->pending);
2661
2662	pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2663	if (!pool->slots) {
2664	ret = -ENOMEM;
2665	goto err_free_pool;
2666	}
2667
2668	if (req->max_payload_len) {
2669	pool->payload_buf = kcalloc(req->num_slots,
2670	req->max_payload_len, GFP_KERNEL);
2671	if (!pool->payload_buf) {
2672	ret = -ENOMEM;
2673	goto err_free_pool;
2674	}
2675	}
2676
2677	for (i = 0; i < req->num_slots; i++) {
2678	slot = &pool->slots[i];
2679	i3c_master_init_ibi_slot(dev, slot: &slot->base);
2680
2681	if (req->max_payload_len)
2682	slot->base.data = pool->payload_buf +
2683	(i * req->max_payload_len);
2684
2685	list_add_tail(new: &slot->node, head: &pool->free_slots);
2686	pool->num_slots++;
2687	}
2688
2689	return pool;
2690
2691	err_free_pool:
2692	i3c_generic_ibi_free_pool(pool);
2693	return ERR_PTR(error: ret);
2694	}
2695	EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2696
2697	/**
2698	* i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2699	* @pool: the pool to query an IBI slot on
2700	*
2701	* Search for a free slot in a generic IBI pool.
2702	* The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2703	* when it's no longer needed.
2704	*
2705	* Return: a pointer to a free slot, or NULL if there's no free slot available.
2706	*/
2707	struct i3c_ibi_slot *
2708	i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2709	{
2710	struct i3c_generic_ibi_slot *slot;
2711	unsigned long flags;
2712
2713	spin_lock_irqsave(&pool->lock, flags);
2714	slot = list_first_entry_or_null(&pool->free_slots,
2715	struct i3c_generic_ibi_slot, node);
2716	if (slot)
2717	list_del(entry: &slot->node);
2718	spin_unlock_irqrestore(lock: &pool->lock, flags);
2719
2720	return slot ? &slot->base : NULL;
2721	}
2722	EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2723
2724	/**
2725	* i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2726	* @pool: the pool to return the IBI slot to
2727	* @s: IBI slot to recycle
2728	*
2729	* Add an IBI slot back to its generic IBI pool. Should be called from the
2730	* master driver struct_master_controller_ops->recycle_ibi() method.
2731	*/
2732	void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2733	struct i3c_ibi_slot *s)
2734	{
2735	struct i3c_generic_ibi_slot *slot;
2736	unsigned long flags;
2737
2738	if (!s)
2739	return;
2740
2741	slot = container_of(s, struct i3c_generic_ibi_slot, base);
2742	spin_lock_irqsave(&pool->lock, flags);
2743	list_add_tail(new: &slot->node, head: &pool->free_slots);
2744	spin_unlock_irqrestore(lock: &pool->lock, flags);
2745	}
2746	EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2747
2748	static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2749	{
2750	if (!ops || !ops->bus_init || !ops->priv_xfers ||
2751	!ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2752	return -EINVAL;
2753
2754	if (ops->request_ibi &&
2755	(!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2756	!ops->recycle_ibi_slot))
2757	return -EINVAL;
2758
2759	return 0;
2760	}
2761
2762	/**
2763	* i3c_master_register() - register an I3C master
2764	* @master: master used to send frames on the bus
2765	* @parent: the parent device (the one that provides this I3C master
2766	* controller)
2767	* @ops: the master controller operations
2768	* @secondary: true if you are registering a secondary master. Will return
2769	* -ENOTSUPP if set to true since secondary masters are not yet
2770	* supported
2771	*
2772	* This function takes care of everything for you:
2773	*
2774	* - creates and initializes the I3C bus
2775	* - populates the bus with static I2C devs if @parent->of_node is not
2776	* NULL
2777	* - registers all I3C devices added by the controller during bus
2778	* initialization
2779	* - registers the I2C adapter and all I2C devices
2780	*
2781	* Return: 0 in case of success, a negative error code otherwise.
2782	*/
2783	int i3c_master_register(struct i3c_master_controller *master,
2784	struct device *parent,
2785	const struct i3c_master_controller_ops *ops,
2786	bool secondary)
2787	{
2788	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2789	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2790	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2791	struct i2c_dev_boardinfo *i2cbi;
2792	int ret;
2793
2794	/* We do not support secondary masters yet. */
2795	if (secondary)
2796	return -ENOTSUPP;
2797
2798	ret = i3c_master_check_ops(ops);
2799	if (ret)
2800	return ret;
2801
2802	master->dev.parent = parent;
2803	master->dev.of_node = of_node_get(node: parent->of_node);
2804	master->dev.bus = &i3c_bus_type;
2805	master->dev.type = &i3c_masterdev_type;
2806	master->dev.release = i3c_masterdev_release;
2807	master->ops = ops;
2808	master->secondary = secondary;
2809	INIT_LIST_HEAD(list: &master->boardinfo.i2c);
2810	INIT_LIST_HEAD(list: &master->boardinfo.i3c);
2811
2812	ret = i3c_bus_init(i3cbus, np: master->dev.of_node);
2813	if (ret)
2814	return ret;
2815
2816	device_initialize(dev: &master->dev);
2817	dev_set_name(dev: &master->dev, name: "i3c-%d", i3cbus->id);
2818
2819	master->dev.dma_mask = parent->dma_mask;
2820	master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2821	master->dev.dma_parms = parent->dma_parms;
2822
2823	ret = of_populate_i3c_bus(master);
2824	if (ret)
2825	goto err_put_dev;
2826
2827	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2828	switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2829	case I3C_LVR_I2C_INDEX(0):
2830	if (mode < I3C_BUS_MODE_MIXED_FAST)
2831	mode = I3C_BUS_MODE_MIXED_FAST;
2832	break;
2833	case I3C_LVR_I2C_INDEX(1):
2834	if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2835	mode = I3C_BUS_MODE_MIXED_LIMITED;
2836	break;
2837	case I3C_LVR_I2C_INDEX(2):
2838	if (mode < I3C_BUS_MODE_MIXED_SLOW)
2839	mode = I3C_BUS_MODE_MIXED_SLOW;
2840	break;
2841	default:
2842	ret = -EINVAL;
2843	goto err_put_dev;
2844	}
2845
2846	if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2847	i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2848	}
2849
2850	ret = i3c_bus_set_mode(i3cbus, mode, max_i2c_scl_rate: i2c_scl_rate);
2851	if (ret)
2852	goto err_put_dev;
2853
2854	master->wq = alloc_workqueue(fmt: "%s", flags: 0, max_active: 0, dev_name(dev: parent));
2855	if (!master->wq) {
2856	ret = -ENOMEM;
2857	goto err_put_dev;
2858	}
2859
2860	ret = i3c_master_bus_init(master);
2861	if (ret)
2862	goto err_put_dev;
2863
2864	ret = device_add(dev: &master->dev);
2865	if (ret)
2866	goto err_cleanup_bus;
2867
2868	/*
2869	* Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2870	* through the I2C subsystem.
2871	*/
2872	ret = i3c_master_i2c_adapter_init(master);
2873	if (ret)
2874	goto err_del_dev;
2875
2876	i3c_bus_notify(bus: i3cbus, action: I3C_NOTIFY_BUS_ADD);
2877
2878	pm_runtime_no_callbacks(dev: &master->dev);
2879	pm_suspend_ignore_children(dev: &master->dev, enable: true);
2880	pm_runtime_enable(dev: &master->dev);
2881
2882	/*
2883	* We're done initializing the bus and the controller, we can now
2884	* register I3C devices discovered during the initial DAA.
2885	*/
2886	master->init_done = true;
2887	i3c_bus_normaluse_lock(bus: &master->bus);
2888	i3c_master_register_new_i3c_devs(master);
2889	i3c_bus_normaluse_unlock(bus: &master->bus);
2890
2891	return 0;
2892
2893	err_del_dev:
2894	device_del(dev: &master->dev);
2895
2896	err_cleanup_bus:
2897	i3c_master_bus_cleanup(master);
2898
2899	err_put_dev:
2900	put_device(dev: &master->dev);
2901
2902	return ret;
2903	}
2904	EXPORT_SYMBOL_GPL(i3c_master_register);
2905
2906	/**
2907	* i3c_master_unregister() - unregister an I3C master
2908	* @master: master used to send frames on the bus
2909	*
2910	* Basically undo everything done in i3c_master_register().
2911	*/
2912	void i3c_master_unregister(struct i3c_master_controller *master)
2913	{
2914	i3c_bus_notify(bus: &master->bus, action: I3C_NOTIFY_BUS_REMOVE);
2915
2916	i3c_master_i2c_adapter_cleanup(master);
2917	i3c_master_unregister_i3c_devs(master);
2918	i3c_master_bus_cleanup(master);
2919	pm_runtime_disable(dev: &master->dev);
2920	device_unregister(dev: &master->dev);
2921	}
2922	EXPORT_SYMBOL_GPL(i3c_master_unregister);
2923
2924	int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2925	{
2926	struct i3c_master_controller *master;
2927
2928	if (!dev)
2929	return -ENOENT;
2930
2931	master = i3c_dev_get_master(dev);
2932	if (!master)
2933	return -EINVAL;
2934
2935	if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2936	!dev->boardinfo->static_addr)
2937	return -EINVAL;
2938
2939	return i3c_master_setdasa_locked(master, static_addr: dev->info.static_addr,
2940	dyn_addr: dev->boardinfo->init_dyn_addr);
2941	}
2942
2943	int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2944	struct i3c_priv_xfer *xfers,
2945	int nxfers)
2946	{
2947	struct i3c_master_controller *master;
2948
2949	if (!dev)
2950	return -ENOENT;
2951
2952	master = i3c_dev_get_master(dev);
2953	if (!master || !xfers)
2954	return -EINVAL;
2955
2956	if (!master->ops->priv_xfers)
2957	return -ENOTSUPP;
2958
2959	return master->ops->priv_xfers(dev, xfers, nxfers);
2960	}
2961
2962	int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2963	{
2964	struct i3c_master_controller *master;
2965	int ret;
2966
2967	if (!dev->ibi)
2968	return -EINVAL;
2969
2970	master = i3c_dev_get_master(dev);
2971	ret = master->ops->disable_ibi(dev);
2972	if (ret)
2973	return ret;
2974
2975	reinit_completion(x: &dev->ibi->all_ibis_handled);
2976	if (atomic_read(v: &dev->ibi->pending_ibis))
2977	wait_for_completion(&dev->ibi->all_ibis_handled);
2978
2979	dev->ibi->enabled = false;
2980
2981	return 0;
2982	}
2983
2984	int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2985	{
2986	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2987	int ret;
2988
2989	if (!dev->ibi)
2990	return -EINVAL;
2991
2992	ret = master->ops->enable_ibi(dev);
2993	if (!ret)
2994	dev->ibi->enabled = true;
2995
2996	return ret;
2997	}
2998
2999	int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
3000	const struct i3c_ibi_setup *req)
3001	{
3002	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3003	struct i3c_device_ibi_info *ibi;
3004	int ret;
3005
3006	if (!master->ops->request_ibi)
3007	return -ENOTSUPP;
3008
3009	if (dev->ibi)
3010	return -EBUSY;
3011
3012	ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
3013	if (!ibi)
3014	return -ENOMEM;
3015
3016	ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
3017	if (!ibi->wq) {
3018	kfree(objp: ibi);
3019	return -ENOMEM;
3020	}
3021
3022	atomic_set(v: &ibi->pending_ibis, i: 0);
3023	init_completion(x: &ibi->all_ibis_handled);
3024	ibi->handler = req->handler;
3025	ibi->max_payload_len = req->max_payload_len;
3026	ibi->num_slots = req->num_slots;
3027
3028	dev->ibi = ibi;
3029	ret = master->ops->request_ibi(dev, req);
3030	if (ret) {
3031	kfree(objp: ibi);
3032	dev->ibi = NULL;
3033	}
3034
3035	return ret;
3036	}
3037
3038	void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
3039	{
3040	struct i3c_master_controller *master = i3c_dev_get_master(dev);
3041
3042	if (!dev->ibi)
3043	return;
3044
3045	if (WARN_ON(dev->ibi->enabled))
3046	WARN_ON(i3c_dev_disable_ibi_locked(dev));
3047
3048	master->ops->free_ibi(dev);
3049
3050	if (dev->ibi->wq) {
3051	destroy_workqueue(wq: dev->ibi->wq);
3052	dev->ibi->wq = NULL;
3053	}
3054
3055	kfree(objp: dev->ibi);
3056	dev->ibi = NULL;
3057	}
3058
3059	static int __init i3c_init(void)
3060	{
3061	int res;
3062
3063	res = of_alias_get_highest_id(stem: "i3c");
3064	if (res >= 0) {
3065	mutex_lock(&i3c_core_lock);
3066	__i3c_first_dynamic_bus_num = res + 1;
3067	mutex_unlock(lock: &i3c_core_lock);
3068	}
3069
3070	res = bus_register_notifier(bus: &i2c_bus_type, nb: &i2cdev_notifier);
3071	if (res)
3072	return res;
3073
3074	res = bus_register(bus: &i3c_bus_type);
3075	if (res)
3076	goto out_unreg_notifier;
3077
3078	return 0;
3079
3080	out_unreg_notifier:
3081	bus_unregister_notifier(bus: &i2c_bus_type, nb: &i2cdev_notifier);
3082
3083	return res;
3084	}
3085	subsys_initcall(i3c_init);
3086
3087	static void __exit i3c_exit(void)
3088	{
3089	bus_unregister_notifier(bus: &i2c_bus_type, nb: &i2cdev_notifier);
3090	idr_destroy(&i3c_bus_idr);
3091	bus_unregister(bus: &i3c_bus_type);
3092	}
3093	module_exit(i3c_exit);
3094
3095	MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
3096	MODULE_DESCRIPTION("I3C core");
3097	MODULE_LICENSE("GPL v2");
3098