| 1 | // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB |
| 2 | /* |
| 3 | * Copyright (c) 2016 Mellanox Technologies Ltd. All rights reserved. |
| 4 | * Copyright (c) 2015 System Fabric Works, Inc. All rights reserved. |
| 5 | */ |
| 6 | |
| 7 | #include <rdma/ib_pack.h> |
| 8 | #include "rxe_opcode.h" |
| 9 | #include "rxe_hdr.h" |
| 10 | |
| 11 | /* useful information about work request opcodes and pkt opcodes in |
| 12 | * table form |
| 13 | */ |
| 14 | struct rxe_wr_opcode_info rxe_wr_opcode_info[] = { |
| 15 | [IB_WR_RDMA_WRITE] = { |
| 16 | .name = "IB_WR_RDMA_WRITE" , |
| 17 | .mask = { |
| 18 | [IB_QPT_RC] = WR_INLINE_MASK | WR_WRITE_MASK, |
| 19 | [IB_QPT_UC] = WR_INLINE_MASK | WR_WRITE_MASK, |
| 20 | }, |
| 21 | }, |
| 22 | [IB_WR_RDMA_WRITE_WITH_IMM] = { |
| 23 | .name = "IB_WR_RDMA_WRITE_WITH_IMM" , |
| 24 | .mask = { |
| 25 | [IB_QPT_RC] = WR_INLINE_MASK | WR_WRITE_MASK, |
| 26 | [IB_QPT_UC] = WR_INLINE_MASK | WR_WRITE_MASK, |
| 27 | }, |
| 28 | }, |
| 29 | [IB_WR_SEND] = { |
| 30 | .name = "IB_WR_SEND" , |
| 31 | .mask = { |
| 32 | [IB_QPT_GSI] = WR_INLINE_MASK | WR_SEND_MASK, |
| 33 | [IB_QPT_RC] = WR_INLINE_MASK | WR_SEND_MASK, |
| 34 | [IB_QPT_UC] = WR_INLINE_MASK | WR_SEND_MASK, |
| 35 | [IB_QPT_UD] = WR_INLINE_MASK | WR_SEND_MASK, |
| 36 | }, |
| 37 | }, |
| 38 | [IB_WR_SEND_WITH_IMM] = { |
| 39 | .name = "IB_WR_SEND_WITH_IMM" , |
| 40 | .mask = { |
| 41 | [IB_QPT_GSI] = WR_INLINE_MASK | WR_SEND_MASK, |
| 42 | [IB_QPT_RC] = WR_INLINE_MASK | WR_SEND_MASK, |
| 43 | [IB_QPT_UC] = WR_INLINE_MASK | WR_SEND_MASK, |
| 44 | [IB_QPT_UD] = WR_INLINE_MASK | WR_SEND_MASK, |
| 45 | }, |
| 46 | }, |
| 47 | [IB_WR_RDMA_READ] = { |
| 48 | .name = "IB_WR_RDMA_READ" , |
| 49 | .mask = { |
| 50 | [IB_QPT_RC] = WR_READ_MASK, |
| 51 | }, |
| 52 | }, |
| 53 | [IB_WR_ATOMIC_CMP_AND_SWP] = { |
| 54 | .name = "IB_WR_ATOMIC_CMP_AND_SWP" , |
| 55 | .mask = { |
| 56 | [IB_QPT_RC] = WR_ATOMIC_MASK, |
| 57 | }, |
| 58 | }, |
| 59 | [IB_WR_ATOMIC_FETCH_AND_ADD] = { |
| 60 | .name = "IB_WR_ATOMIC_FETCH_AND_ADD" , |
| 61 | .mask = { |
| 62 | [IB_QPT_RC] = WR_ATOMIC_MASK, |
| 63 | }, |
| 64 | }, |
| 65 | [IB_WR_LSO] = { |
| 66 | .name = "IB_WR_LSO" , |
| 67 | .mask = { |
| 68 | /* not supported */ |
| 69 | }, |
| 70 | }, |
| 71 | [IB_WR_SEND_WITH_INV] = { |
| 72 | .name = "IB_WR_SEND_WITH_INV" , |
| 73 | .mask = { |
| 74 | [IB_QPT_RC] = WR_INLINE_MASK | WR_SEND_MASK, |
| 75 | [IB_QPT_UC] = WR_INLINE_MASK | WR_SEND_MASK, |
| 76 | [IB_QPT_UD] = WR_INLINE_MASK | WR_SEND_MASK, |
| 77 | }, |
| 78 | }, |
| 79 | [IB_WR_RDMA_READ_WITH_INV] = { |
| 80 | .name = "IB_WR_RDMA_READ_WITH_INV" , |
| 81 | .mask = { |
| 82 | [IB_QPT_RC] = WR_READ_MASK, |
| 83 | }, |
| 84 | }, |
| 85 | [IB_WR_LOCAL_INV] = { |
| 86 | .name = "IB_WR_LOCAL_INV" , |
| 87 | .mask = { |
| 88 | [IB_QPT_RC] = WR_LOCAL_OP_MASK, |
| 89 | }, |
| 90 | }, |
| 91 | [IB_WR_REG_MR] = { |
| 92 | .name = "IB_WR_REG_MR" , |
| 93 | .mask = { |
| 94 | [IB_QPT_RC] = WR_LOCAL_OP_MASK, |
| 95 | }, |
| 96 | }, |
| 97 | [IB_WR_BIND_MW] = { |
| 98 | .name = "IB_WR_BIND_MW" , |
| 99 | .mask = { |
| 100 | [IB_QPT_RC] = WR_LOCAL_OP_MASK, |
| 101 | [IB_QPT_UC] = WR_LOCAL_OP_MASK, |
| 102 | }, |
| 103 | }, |
| 104 | [IB_WR_FLUSH] = { |
| 105 | .name = "IB_WR_FLUSH" , |
| 106 | .mask = { |
| 107 | [IB_QPT_RC] = WR_FLUSH_MASK, |
| 108 | }, |
| 109 | }, |
| 110 | [IB_WR_ATOMIC_WRITE] = { |
| 111 | .name = "IB_WR_ATOMIC_WRITE" , |
| 112 | .mask = { |
| 113 | [IB_QPT_RC] = WR_ATOMIC_WRITE_MASK, |
| 114 | }, |
| 115 | }, |
| 116 | }; |
| 117 | |
| 118 | struct rxe_opcode_info rxe_opcode[RXE_NUM_OPCODE] = { |
| 119 | [IB_OPCODE_RC_SEND_FIRST] = { |
| 120 | .name = "IB_OPCODE_RC_SEND_FIRST" , |
| 121 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_RWR_MASK | |
| 122 | RXE_SEND_MASK | RXE_START_MASK, |
| 123 | .length = RXE_BTH_BYTES, |
| 124 | .offset = { |
| 125 | [RXE_BTH] = 0, |
| 126 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 127 | } |
| 128 | }, |
| 129 | [IB_OPCODE_RC_SEND_MIDDLE] = { |
| 130 | .name = "IB_OPCODE_RC_SEND_MIDDLE" , |
| 131 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_SEND_MASK | |
| 132 | RXE_MIDDLE_MASK, |
| 133 | .length = RXE_BTH_BYTES, |
| 134 | .offset = { |
| 135 | [RXE_BTH] = 0, |
| 136 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 137 | } |
| 138 | }, |
| 139 | [IB_OPCODE_RC_SEND_LAST] = { |
| 140 | .name = "IB_OPCODE_RC_SEND_LAST" , |
| 141 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_COMP_MASK | |
| 142 | RXE_SEND_MASK | RXE_END_MASK, |
| 143 | .length = RXE_BTH_BYTES, |
| 144 | .offset = { |
| 145 | [RXE_BTH] = 0, |
| 146 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 147 | } |
| 148 | }, |
| 149 | [IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE] = { |
| 150 | .name = "IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE" , |
| 151 | .mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 152 | RXE_COMP_MASK | RXE_SEND_MASK | RXE_END_MASK, |
| 153 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES, |
| 154 | .offset = { |
| 155 | [RXE_BTH] = 0, |
| 156 | [RXE_IMMDT] = RXE_BTH_BYTES, |
| 157 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 158 | RXE_IMMDT_BYTES, |
| 159 | } |
| 160 | }, |
| 161 | [IB_OPCODE_RC_SEND_ONLY] = { |
| 162 | .name = "IB_OPCODE_RC_SEND_ONLY" , |
| 163 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_COMP_MASK | |
| 164 | RXE_RWR_MASK | RXE_SEND_MASK | |
| 165 | RXE_START_MASK | RXE_END_MASK, |
| 166 | .length = RXE_BTH_BYTES, |
| 167 | .offset = { |
| 168 | [RXE_BTH] = 0, |
| 169 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 170 | } |
| 171 | }, |
| 172 | [IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE] = { |
| 173 | .name = "IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE" , |
| 174 | .mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 175 | RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK | |
| 176 | RXE_START_MASK | RXE_END_MASK, |
| 177 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES, |
| 178 | .offset = { |
| 179 | [RXE_BTH] = 0, |
| 180 | [RXE_IMMDT] = RXE_BTH_BYTES, |
| 181 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 182 | RXE_IMMDT_BYTES, |
| 183 | } |
| 184 | }, |
| 185 | [IB_OPCODE_RC_RDMA_WRITE_FIRST] = { |
| 186 | .name = "IB_OPCODE_RC_RDMA_WRITE_FIRST" , |
| 187 | .mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 188 | RXE_WRITE_MASK | RXE_START_MASK, |
| 189 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES, |
| 190 | .offset = { |
| 191 | [RXE_BTH] = 0, |
| 192 | [RXE_RETH] = RXE_BTH_BYTES, |
| 193 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 194 | RXE_RETH_BYTES, |
| 195 | } |
| 196 | }, |
| 197 | [IB_OPCODE_RC_RDMA_WRITE_MIDDLE] = { |
| 198 | .name = "IB_OPCODE_RC_RDMA_WRITE_MIDDLE" , |
| 199 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 200 | RXE_MIDDLE_MASK, |
| 201 | .length = RXE_BTH_BYTES, |
| 202 | .offset = { |
| 203 | [RXE_BTH] = 0, |
| 204 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 205 | } |
| 206 | }, |
| 207 | [IB_OPCODE_RC_RDMA_WRITE_LAST] = { |
| 208 | .name = "IB_OPCODE_RC_RDMA_WRITE_LAST" , |
| 209 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 210 | RXE_END_MASK, |
| 211 | .length = RXE_BTH_BYTES, |
| 212 | .offset = { |
| 213 | [RXE_BTH] = 0, |
| 214 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 215 | } |
| 216 | }, |
| 217 | [IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = { |
| 218 | .name = "IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE" , |
| 219 | .mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 220 | RXE_WRITE_MASK | RXE_COMP_MASK | RXE_RWR_MASK | |
| 221 | RXE_END_MASK, |
| 222 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES, |
| 223 | .offset = { |
| 224 | [RXE_BTH] = 0, |
| 225 | [RXE_IMMDT] = RXE_BTH_BYTES, |
| 226 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 227 | RXE_IMMDT_BYTES, |
| 228 | } |
| 229 | }, |
| 230 | [IB_OPCODE_RC_RDMA_WRITE_ONLY] = { |
| 231 | .name = "IB_OPCODE_RC_RDMA_WRITE_ONLY" , |
| 232 | .mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 233 | RXE_WRITE_MASK | RXE_START_MASK | |
| 234 | RXE_END_MASK, |
| 235 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES, |
| 236 | .offset = { |
| 237 | [RXE_BTH] = 0, |
| 238 | [RXE_RETH] = RXE_BTH_BYTES, |
| 239 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 240 | RXE_RETH_BYTES, |
| 241 | } |
| 242 | }, |
| 243 | [IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = { |
| 244 | .name = "IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE" , |
| 245 | .mask = RXE_RETH_MASK | RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | |
| 246 | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 247 | RXE_COMP_MASK | RXE_RWR_MASK | |
| 248 | RXE_START_MASK | RXE_END_MASK, |
| 249 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_RETH_BYTES, |
| 250 | .offset = { |
| 251 | [RXE_BTH] = 0, |
| 252 | [RXE_RETH] = RXE_BTH_BYTES, |
| 253 | [RXE_IMMDT] = RXE_BTH_BYTES + |
| 254 | RXE_RETH_BYTES, |
| 255 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 256 | RXE_RETH_BYTES + |
| 257 | RXE_IMMDT_BYTES, |
| 258 | } |
| 259 | }, |
| 260 | [IB_OPCODE_RC_RDMA_READ_REQUEST] = { |
| 261 | .name = "IB_OPCODE_RC_RDMA_READ_REQUEST" , |
| 262 | .mask = RXE_RETH_MASK | RXE_REQ_MASK | RXE_READ_MASK | |
| 263 | RXE_START_MASK | RXE_END_MASK, |
| 264 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES, |
| 265 | .offset = { |
| 266 | [RXE_BTH] = 0, |
| 267 | [RXE_RETH] = RXE_BTH_BYTES, |
| 268 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 269 | RXE_RETH_BYTES, |
| 270 | } |
| 271 | }, |
| 272 | [IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST] = { |
| 273 | .name = "IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST" , |
| 274 | .mask = RXE_AETH_MASK | RXE_PAYLOAD_MASK | RXE_ACK_MASK | |
| 275 | RXE_START_MASK, |
| 276 | .length = RXE_BTH_BYTES + RXE_AETH_BYTES, |
| 277 | .offset = { |
| 278 | [RXE_BTH] = 0, |
| 279 | [RXE_AETH] = RXE_BTH_BYTES, |
| 280 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 281 | RXE_AETH_BYTES, |
| 282 | } |
| 283 | }, |
| 284 | [IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE] = { |
| 285 | .name = "IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE" , |
| 286 | .mask = RXE_PAYLOAD_MASK | RXE_ACK_MASK | RXE_MIDDLE_MASK, |
| 287 | .length = RXE_BTH_BYTES, |
| 288 | .offset = { |
| 289 | [RXE_BTH] = 0, |
| 290 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 291 | } |
| 292 | }, |
| 293 | [IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST] = { |
| 294 | .name = "IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST" , |
| 295 | .mask = RXE_AETH_MASK | RXE_PAYLOAD_MASK | RXE_ACK_MASK | |
| 296 | RXE_END_MASK, |
| 297 | .length = RXE_BTH_BYTES + RXE_AETH_BYTES, |
| 298 | .offset = { |
| 299 | [RXE_BTH] = 0, |
| 300 | [RXE_AETH] = RXE_BTH_BYTES, |
| 301 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 302 | RXE_AETH_BYTES, |
| 303 | } |
| 304 | }, |
| 305 | [IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY] = { |
| 306 | .name = "IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY" , |
| 307 | .mask = RXE_AETH_MASK | RXE_PAYLOAD_MASK | RXE_ACK_MASK | |
| 308 | RXE_START_MASK | RXE_END_MASK, |
| 309 | .length = RXE_BTH_BYTES + RXE_AETH_BYTES, |
| 310 | .offset = { |
| 311 | [RXE_BTH] = 0, |
| 312 | [RXE_AETH] = RXE_BTH_BYTES, |
| 313 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 314 | RXE_AETH_BYTES, |
| 315 | } |
| 316 | }, |
| 317 | [IB_OPCODE_RC_ACKNOWLEDGE] = { |
| 318 | .name = "IB_OPCODE_RC_ACKNOWLEDGE" , |
| 319 | .mask = RXE_AETH_MASK | RXE_ACK_MASK | RXE_START_MASK | |
| 320 | RXE_END_MASK, |
| 321 | .length = RXE_BTH_BYTES + RXE_AETH_BYTES, |
| 322 | .offset = { |
| 323 | [RXE_BTH] = 0, |
| 324 | [RXE_AETH] = RXE_BTH_BYTES, |
| 325 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 326 | RXE_AETH_BYTES, |
| 327 | } |
| 328 | }, |
| 329 | [IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE] = { |
| 330 | .name = "IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE" , |
| 331 | .mask = RXE_AETH_MASK | RXE_ATMACK_MASK | RXE_ACK_MASK | |
| 332 | RXE_START_MASK | RXE_END_MASK, |
| 333 | .length = RXE_BTH_BYTES + RXE_ATMACK_BYTES + RXE_AETH_BYTES, |
| 334 | .offset = { |
| 335 | [RXE_BTH] = 0, |
| 336 | [RXE_AETH] = RXE_BTH_BYTES, |
| 337 | [RXE_ATMACK] = RXE_BTH_BYTES + |
| 338 | RXE_AETH_BYTES, |
| 339 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 340 | RXE_ATMACK_BYTES + |
| 341 | RXE_AETH_BYTES, |
| 342 | } |
| 343 | }, |
| 344 | [IB_OPCODE_RC_COMPARE_SWAP] = { |
| 345 | .name = "IB_OPCODE_RC_COMPARE_SWAP" , |
| 346 | .mask = RXE_ATMETH_MASK | RXE_REQ_MASK | RXE_ATOMIC_MASK | |
| 347 | RXE_START_MASK | RXE_END_MASK, |
| 348 | .length = RXE_BTH_BYTES + RXE_ATMETH_BYTES, |
| 349 | .offset = { |
| 350 | [RXE_BTH] = 0, |
| 351 | [RXE_ATMETH] = RXE_BTH_BYTES, |
| 352 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 353 | RXE_ATMETH_BYTES, |
| 354 | } |
| 355 | }, |
| 356 | [IB_OPCODE_RC_FETCH_ADD] = { |
| 357 | .name = "IB_OPCODE_RC_FETCH_ADD" , |
| 358 | .mask = RXE_ATMETH_MASK | RXE_REQ_MASK | RXE_ATOMIC_MASK | |
| 359 | RXE_START_MASK | RXE_END_MASK, |
| 360 | .length = RXE_BTH_BYTES + RXE_ATMETH_BYTES, |
| 361 | .offset = { |
| 362 | [RXE_BTH] = 0, |
| 363 | [RXE_ATMETH] = RXE_BTH_BYTES, |
| 364 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 365 | RXE_ATMETH_BYTES, |
| 366 | } |
| 367 | }, |
| 368 | [IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE] = { |
| 369 | .name = "IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE" , |
| 370 | .mask = RXE_IETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 371 | RXE_COMP_MASK | RXE_SEND_MASK | RXE_END_MASK, |
| 372 | .length = RXE_BTH_BYTES + RXE_IETH_BYTES, |
| 373 | .offset = { |
| 374 | [RXE_BTH] = 0, |
| 375 | [RXE_IETH] = RXE_BTH_BYTES, |
| 376 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 377 | RXE_IETH_BYTES, |
| 378 | } |
| 379 | }, |
| 380 | [IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE] = { |
| 381 | .name = "IB_OPCODE_RC_SEND_ONLY_INV" , |
| 382 | .mask = RXE_IETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 383 | RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK | |
| 384 | RXE_END_MASK | RXE_START_MASK, |
| 385 | .length = RXE_BTH_BYTES + RXE_IETH_BYTES, |
| 386 | .offset = { |
| 387 | [RXE_BTH] = 0, |
| 388 | [RXE_IETH] = RXE_BTH_BYTES, |
| 389 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 390 | RXE_IETH_BYTES, |
| 391 | } |
| 392 | }, |
| 393 | [IB_OPCODE_RC_FLUSH] = { |
| 394 | .name = "IB_OPCODE_RC_FLUSH" , |
| 395 | .mask = RXE_FETH_MASK | RXE_RETH_MASK | RXE_FLUSH_MASK | |
| 396 | RXE_START_MASK | RXE_END_MASK | RXE_REQ_MASK, |
| 397 | .length = RXE_BTH_BYTES + RXE_FETH_BYTES + RXE_RETH_BYTES, |
| 398 | .offset = { |
| 399 | [RXE_BTH] = 0, |
| 400 | [RXE_FETH] = RXE_BTH_BYTES, |
| 401 | [RXE_RETH] = RXE_BTH_BYTES + RXE_FETH_BYTES, |
| 402 | } |
| 403 | }, |
| 404 | [IB_OPCODE_RC_ATOMIC_WRITE] = { |
| 405 | .name = "IB_OPCODE_RC_ATOMIC_WRITE" , |
| 406 | .mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 407 | RXE_ATOMIC_WRITE_MASK | RXE_START_MASK | |
| 408 | RXE_END_MASK, |
| 409 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES, |
| 410 | .offset = { |
| 411 | [RXE_BTH] = 0, |
| 412 | [RXE_RETH] = RXE_BTH_BYTES, |
| 413 | [RXE_PAYLOAD] = RXE_BTH_BYTES + RXE_RETH_BYTES, |
| 414 | } |
| 415 | }, |
| 416 | |
| 417 | /* UC */ |
| 418 | [IB_OPCODE_UC_SEND_FIRST] = { |
| 419 | .name = "IB_OPCODE_UC_SEND_FIRST" , |
| 420 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_RWR_MASK | |
| 421 | RXE_SEND_MASK | RXE_START_MASK, |
| 422 | .length = RXE_BTH_BYTES, |
| 423 | .offset = { |
| 424 | [RXE_BTH] = 0, |
| 425 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 426 | } |
| 427 | }, |
| 428 | [IB_OPCODE_UC_SEND_MIDDLE] = { |
| 429 | .name = "IB_OPCODE_UC_SEND_MIDDLE" , |
| 430 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_SEND_MASK | |
| 431 | RXE_MIDDLE_MASK, |
| 432 | .length = RXE_BTH_BYTES, |
| 433 | .offset = { |
| 434 | [RXE_BTH] = 0, |
| 435 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 436 | } |
| 437 | }, |
| 438 | [IB_OPCODE_UC_SEND_LAST] = { |
| 439 | .name = "IB_OPCODE_UC_SEND_LAST" , |
| 440 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_COMP_MASK | |
| 441 | RXE_SEND_MASK | RXE_END_MASK, |
| 442 | .length = RXE_BTH_BYTES, |
| 443 | .offset = { |
| 444 | [RXE_BTH] = 0, |
| 445 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 446 | } |
| 447 | }, |
| 448 | [IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE] = { |
| 449 | .name = "IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE" , |
| 450 | .mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 451 | RXE_COMP_MASK | RXE_SEND_MASK | RXE_END_MASK, |
| 452 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES, |
| 453 | .offset = { |
| 454 | [RXE_BTH] = 0, |
| 455 | [RXE_IMMDT] = RXE_BTH_BYTES, |
| 456 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 457 | RXE_IMMDT_BYTES, |
| 458 | } |
| 459 | }, |
| 460 | [IB_OPCODE_UC_SEND_ONLY] = { |
| 461 | .name = "IB_OPCODE_UC_SEND_ONLY" , |
| 462 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_COMP_MASK | |
| 463 | RXE_RWR_MASK | RXE_SEND_MASK | |
| 464 | RXE_START_MASK | RXE_END_MASK, |
| 465 | .length = RXE_BTH_BYTES, |
| 466 | .offset = { |
| 467 | [RXE_BTH] = 0, |
| 468 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 469 | } |
| 470 | }, |
| 471 | [IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE] = { |
| 472 | .name = "IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE" , |
| 473 | .mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 474 | RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK | |
| 475 | RXE_START_MASK | RXE_END_MASK, |
| 476 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES, |
| 477 | .offset = { |
| 478 | [RXE_BTH] = 0, |
| 479 | [RXE_IMMDT] = RXE_BTH_BYTES, |
| 480 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 481 | RXE_IMMDT_BYTES, |
| 482 | } |
| 483 | }, |
| 484 | [IB_OPCODE_UC_RDMA_WRITE_FIRST] = { |
| 485 | .name = "IB_OPCODE_UC_RDMA_WRITE_FIRST" , |
| 486 | .mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 487 | RXE_WRITE_MASK | RXE_START_MASK, |
| 488 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES, |
| 489 | .offset = { |
| 490 | [RXE_BTH] = 0, |
| 491 | [RXE_RETH] = RXE_BTH_BYTES, |
| 492 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 493 | RXE_RETH_BYTES, |
| 494 | } |
| 495 | }, |
| 496 | [IB_OPCODE_UC_RDMA_WRITE_MIDDLE] = { |
| 497 | .name = "IB_OPCODE_UC_RDMA_WRITE_MIDDLE" , |
| 498 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 499 | RXE_MIDDLE_MASK, |
| 500 | .length = RXE_BTH_BYTES, |
| 501 | .offset = { |
| 502 | [RXE_BTH] = 0, |
| 503 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 504 | } |
| 505 | }, |
| 506 | [IB_OPCODE_UC_RDMA_WRITE_LAST] = { |
| 507 | .name = "IB_OPCODE_UC_RDMA_WRITE_LAST" , |
| 508 | .mask = RXE_PAYLOAD_MASK | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 509 | RXE_END_MASK, |
| 510 | .length = RXE_BTH_BYTES, |
| 511 | .offset = { |
| 512 | [RXE_BTH] = 0, |
| 513 | [RXE_PAYLOAD] = RXE_BTH_BYTES, |
| 514 | } |
| 515 | }, |
| 516 | [IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = { |
| 517 | .name = "IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE" , |
| 518 | .mask = RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 519 | RXE_WRITE_MASK | RXE_COMP_MASK | RXE_RWR_MASK | |
| 520 | RXE_END_MASK, |
| 521 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES, |
| 522 | .offset = { |
| 523 | [RXE_BTH] = 0, |
| 524 | [RXE_IMMDT] = RXE_BTH_BYTES, |
| 525 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 526 | RXE_IMMDT_BYTES, |
| 527 | } |
| 528 | }, |
| 529 | [IB_OPCODE_UC_RDMA_WRITE_ONLY] = { |
| 530 | .name = "IB_OPCODE_UC_RDMA_WRITE_ONLY" , |
| 531 | .mask = RXE_RETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 532 | RXE_WRITE_MASK | RXE_START_MASK | |
| 533 | RXE_END_MASK, |
| 534 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES, |
| 535 | .offset = { |
| 536 | [RXE_BTH] = 0, |
| 537 | [RXE_RETH] = RXE_BTH_BYTES, |
| 538 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 539 | RXE_RETH_BYTES, |
| 540 | } |
| 541 | }, |
| 542 | [IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = { |
| 543 | .name = "IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE" , |
| 544 | .mask = RXE_RETH_MASK | RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | |
| 545 | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 546 | RXE_COMP_MASK | RXE_RWR_MASK | |
| 547 | RXE_START_MASK | RXE_END_MASK, |
| 548 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_RETH_BYTES, |
| 549 | .offset = { |
| 550 | [RXE_BTH] = 0, |
| 551 | [RXE_RETH] = RXE_BTH_BYTES, |
| 552 | [RXE_IMMDT] = RXE_BTH_BYTES + |
| 553 | RXE_RETH_BYTES, |
| 554 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 555 | RXE_RETH_BYTES + |
| 556 | RXE_IMMDT_BYTES, |
| 557 | } |
| 558 | }, |
| 559 | |
| 560 | /* RD */ |
| 561 | [IB_OPCODE_RD_SEND_FIRST] = { |
| 562 | .name = "IB_OPCODE_RD_SEND_FIRST" , |
| 563 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK | |
| 564 | RXE_REQ_MASK | RXE_RWR_MASK | RXE_SEND_MASK | |
| 565 | RXE_START_MASK, |
| 566 | .length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES, |
| 567 | .offset = { |
| 568 | [RXE_BTH] = 0, |
| 569 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 570 | [RXE_DETH] = RXE_BTH_BYTES + |
| 571 | RXE_RDETH_BYTES, |
| 572 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 573 | RXE_RDETH_BYTES + |
| 574 | RXE_DETH_BYTES, |
| 575 | } |
| 576 | }, |
| 577 | [IB_OPCODE_RD_SEND_MIDDLE] = { |
| 578 | .name = "IB_OPCODE_RD_SEND_MIDDLE" , |
| 579 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK | |
| 580 | RXE_REQ_MASK | RXE_SEND_MASK | |
| 581 | RXE_MIDDLE_MASK, |
| 582 | .length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES, |
| 583 | .offset = { |
| 584 | [RXE_BTH] = 0, |
| 585 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 586 | [RXE_DETH] = RXE_BTH_BYTES + |
| 587 | RXE_RDETH_BYTES, |
| 588 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 589 | RXE_RDETH_BYTES + |
| 590 | RXE_DETH_BYTES, |
| 591 | } |
| 592 | }, |
| 593 | [IB_OPCODE_RD_SEND_LAST] = { |
| 594 | .name = "IB_OPCODE_RD_SEND_LAST" , |
| 595 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK | |
| 596 | RXE_REQ_MASK | RXE_COMP_MASK | RXE_SEND_MASK | |
| 597 | RXE_END_MASK, |
| 598 | .length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES, |
| 599 | .offset = { |
| 600 | [RXE_BTH] = 0, |
| 601 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 602 | [RXE_DETH] = RXE_BTH_BYTES + |
| 603 | RXE_RDETH_BYTES, |
| 604 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 605 | RXE_RDETH_BYTES + |
| 606 | RXE_DETH_BYTES, |
| 607 | } |
| 608 | }, |
| 609 | [IB_OPCODE_RD_SEND_LAST_WITH_IMMEDIATE] = { |
| 610 | .name = "IB_OPCODE_RD_SEND_LAST_WITH_IMMEDIATE" , |
| 611 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_IMMDT_MASK | |
| 612 | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 613 | RXE_COMP_MASK | RXE_SEND_MASK | |
| 614 | RXE_END_MASK, |
| 615 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_DETH_BYTES + |
| 616 | RXE_RDETH_BYTES, |
| 617 | .offset = { |
| 618 | [RXE_BTH] = 0, |
| 619 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 620 | [RXE_DETH] = RXE_BTH_BYTES + |
| 621 | RXE_RDETH_BYTES, |
| 622 | [RXE_IMMDT] = RXE_BTH_BYTES + |
| 623 | RXE_RDETH_BYTES + |
| 624 | RXE_DETH_BYTES, |
| 625 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 626 | RXE_RDETH_BYTES + |
| 627 | RXE_DETH_BYTES + |
| 628 | RXE_IMMDT_BYTES, |
| 629 | } |
| 630 | }, |
| 631 | [IB_OPCODE_RD_SEND_ONLY] = { |
| 632 | .name = "IB_OPCODE_RD_SEND_ONLY" , |
| 633 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK | |
| 634 | RXE_REQ_MASK | RXE_COMP_MASK | RXE_RWR_MASK | |
| 635 | RXE_SEND_MASK | RXE_START_MASK | RXE_END_MASK, |
| 636 | .length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES, |
| 637 | .offset = { |
| 638 | [RXE_BTH] = 0, |
| 639 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 640 | [RXE_DETH] = RXE_BTH_BYTES + |
| 641 | RXE_RDETH_BYTES, |
| 642 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 643 | RXE_RDETH_BYTES + |
| 644 | RXE_DETH_BYTES, |
| 645 | } |
| 646 | }, |
| 647 | [IB_OPCODE_RD_SEND_ONLY_WITH_IMMEDIATE] = { |
| 648 | .name = "IB_OPCODE_RD_SEND_ONLY_WITH_IMMEDIATE" , |
| 649 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_IMMDT_MASK | |
| 650 | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 651 | RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK | |
| 652 | RXE_START_MASK | RXE_END_MASK, |
| 653 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_DETH_BYTES + |
| 654 | RXE_RDETH_BYTES, |
| 655 | .offset = { |
| 656 | [RXE_BTH] = 0, |
| 657 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 658 | [RXE_DETH] = RXE_BTH_BYTES + |
| 659 | RXE_RDETH_BYTES, |
| 660 | [RXE_IMMDT] = RXE_BTH_BYTES + |
| 661 | RXE_RDETH_BYTES + |
| 662 | RXE_DETH_BYTES, |
| 663 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 664 | RXE_RDETH_BYTES + |
| 665 | RXE_DETH_BYTES + |
| 666 | RXE_IMMDT_BYTES, |
| 667 | } |
| 668 | }, |
| 669 | [IB_OPCODE_RD_RDMA_WRITE_FIRST] = { |
| 670 | .name = "IB_OPCODE_RD_RDMA_WRITE_FIRST" , |
| 671 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_RETH_MASK | |
| 672 | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 673 | RXE_WRITE_MASK | RXE_START_MASK, |
| 674 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES + RXE_DETH_BYTES + |
| 675 | RXE_RDETH_BYTES, |
| 676 | .offset = { |
| 677 | [RXE_BTH] = 0, |
| 678 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 679 | [RXE_DETH] = RXE_BTH_BYTES + |
| 680 | RXE_RDETH_BYTES, |
| 681 | [RXE_RETH] = RXE_BTH_BYTES + |
| 682 | RXE_RDETH_BYTES + |
| 683 | RXE_DETH_BYTES, |
| 684 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 685 | RXE_RDETH_BYTES + |
| 686 | RXE_DETH_BYTES + |
| 687 | RXE_RETH_BYTES, |
| 688 | } |
| 689 | }, |
| 690 | [IB_OPCODE_RD_RDMA_WRITE_MIDDLE] = { |
| 691 | .name = "IB_OPCODE_RD_RDMA_WRITE_MIDDLE" , |
| 692 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK | |
| 693 | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 694 | RXE_MIDDLE_MASK, |
| 695 | .length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES, |
| 696 | .offset = { |
| 697 | [RXE_BTH] = 0, |
| 698 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 699 | [RXE_DETH] = RXE_BTH_BYTES + |
| 700 | RXE_RDETH_BYTES, |
| 701 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 702 | RXE_RDETH_BYTES + |
| 703 | RXE_DETH_BYTES, |
| 704 | } |
| 705 | }, |
| 706 | [IB_OPCODE_RD_RDMA_WRITE_LAST] = { |
| 707 | .name = "IB_OPCODE_RD_RDMA_WRITE_LAST" , |
| 708 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_PAYLOAD_MASK | |
| 709 | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 710 | RXE_END_MASK, |
| 711 | .length = RXE_BTH_BYTES + RXE_DETH_BYTES + RXE_RDETH_BYTES, |
| 712 | .offset = { |
| 713 | [RXE_BTH] = 0, |
| 714 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 715 | [RXE_DETH] = RXE_BTH_BYTES + |
| 716 | RXE_RDETH_BYTES, |
| 717 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 718 | RXE_RDETH_BYTES + |
| 719 | RXE_DETH_BYTES, |
| 720 | } |
| 721 | }, |
| 722 | [IB_OPCODE_RD_RDMA_WRITE_LAST_WITH_IMMEDIATE] = { |
| 723 | .name = "IB_OPCODE_RD_RDMA_WRITE_LAST_WITH_IMMEDIATE" , |
| 724 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_IMMDT_MASK | |
| 725 | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 726 | RXE_WRITE_MASK | RXE_COMP_MASK | RXE_RWR_MASK | |
| 727 | RXE_END_MASK, |
| 728 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_DETH_BYTES + |
| 729 | RXE_RDETH_BYTES, |
| 730 | .offset = { |
| 731 | [RXE_BTH] = 0, |
| 732 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 733 | [RXE_DETH] = RXE_BTH_BYTES + |
| 734 | RXE_RDETH_BYTES, |
| 735 | [RXE_IMMDT] = RXE_BTH_BYTES + |
| 736 | RXE_RDETH_BYTES + |
| 737 | RXE_DETH_BYTES, |
| 738 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 739 | RXE_RDETH_BYTES + |
| 740 | RXE_DETH_BYTES + |
| 741 | RXE_IMMDT_BYTES, |
| 742 | } |
| 743 | }, |
| 744 | [IB_OPCODE_RD_RDMA_WRITE_ONLY] = { |
| 745 | .name = "IB_OPCODE_RD_RDMA_WRITE_ONLY" , |
| 746 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_RETH_MASK | |
| 747 | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 748 | RXE_WRITE_MASK | RXE_START_MASK | |
| 749 | RXE_END_MASK, |
| 750 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES + RXE_DETH_BYTES + |
| 751 | RXE_RDETH_BYTES, |
| 752 | .offset = { |
| 753 | [RXE_BTH] = 0, |
| 754 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 755 | [RXE_DETH] = RXE_BTH_BYTES + |
| 756 | RXE_RDETH_BYTES, |
| 757 | [RXE_RETH] = RXE_BTH_BYTES + |
| 758 | RXE_RDETH_BYTES + |
| 759 | RXE_DETH_BYTES, |
| 760 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 761 | RXE_RDETH_BYTES + |
| 762 | RXE_DETH_BYTES + |
| 763 | RXE_RETH_BYTES, |
| 764 | } |
| 765 | }, |
| 766 | [IB_OPCODE_RD_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = { |
| 767 | .name = "IB_OPCODE_RD_RDMA_WRITE_ONLY_WITH_IMMEDIATE" , |
| 768 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_RETH_MASK | |
| 769 | RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | |
| 770 | RXE_REQ_MASK | RXE_WRITE_MASK | |
| 771 | RXE_COMP_MASK | RXE_RWR_MASK | |
| 772 | RXE_START_MASK | RXE_END_MASK, |
| 773 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_RETH_BYTES + |
| 774 | RXE_DETH_BYTES + RXE_RDETH_BYTES, |
| 775 | .offset = { |
| 776 | [RXE_BTH] = 0, |
| 777 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 778 | [RXE_DETH] = RXE_BTH_BYTES + |
| 779 | RXE_RDETH_BYTES, |
| 780 | [RXE_RETH] = RXE_BTH_BYTES + |
| 781 | RXE_RDETH_BYTES + |
| 782 | RXE_DETH_BYTES, |
| 783 | [RXE_IMMDT] = RXE_BTH_BYTES + |
| 784 | RXE_RDETH_BYTES + |
| 785 | RXE_DETH_BYTES + |
| 786 | RXE_RETH_BYTES, |
| 787 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 788 | RXE_RDETH_BYTES + |
| 789 | RXE_DETH_BYTES + |
| 790 | RXE_RETH_BYTES + |
| 791 | RXE_IMMDT_BYTES, |
| 792 | } |
| 793 | }, |
| 794 | [IB_OPCODE_RD_RDMA_READ_REQUEST] = { |
| 795 | .name = "IB_OPCODE_RD_RDMA_READ_REQUEST" , |
| 796 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_RETH_MASK | |
| 797 | RXE_REQ_MASK | RXE_READ_MASK | |
| 798 | RXE_START_MASK | RXE_END_MASK, |
| 799 | .length = RXE_BTH_BYTES + RXE_RETH_BYTES + RXE_DETH_BYTES + |
| 800 | RXE_RDETH_BYTES, |
| 801 | .offset = { |
| 802 | [RXE_BTH] = 0, |
| 803 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 804 | [RXE_DETH] = RXE_BTH_BYTES + |
| 805 | RXE_RDETH_BYTES, |
| 806 | [RXE_RETH] = RXE_BTH_BYTES + |
| 807 | RXE_RDETH_BYTES + |
| 808 | RXE_DETH_BYTES, |
| 809 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 810 | RXE_RETH_BYTES + |
| 811 | RXE_DETH_BYTES + |
| 812 | RXE_RDETH_BYTES, |
| 813 | } |
| 814 | }, |
| 815 | [IB_OPCODE_RD_RDMA_READ_RESPONSE_FIRST] = { |
| 816 | .name = "IB_OPCODE_RD_RDMA_READ_RESPONSE_FIRST" , |
| 817 | .mask = RXE_RDETH_MASK | RXE_AETH_MASK | |
| 818 | RXE_PAYLOAD_MASK | RXE_ACK_MASK | |
| 819 | RXE_START_MASK, |
| 820 | .length = RXE_BTH_BYTES + RXE_AETH_BYTES + RXE_RDETH_BYTES, |
| 821 | .offset = { |
| 822 | [RXE_BTH] = 0, |
| 823 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 824 | [RXE_AETH] = RXE_BTH_BYTES + |
| 825 | RXE_RDETH_BYTES, |
| 826 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 827 | RXE_RDETH_BYTES + |
| 828 | RXE_AETH_BYTES, |
| 829 | } |
| 830 | }, |
| 831 | [IB_OPCODE_RD_RDMA_READ_RESPONSE_MIDDLE] = { |
| 832 | .name = "IB_OPCODE_RD_RDMA_READ_RESPONSE_MIDDLE" , |
| 833 | .mask = RXE_RDETH_MASK | RXE_PAYLOAD_MASK | RXE_ACK_MASK | |
| 834 | RXE_MIDDLE_MASK, |
| 835 | .length = RXE_BTH_BYTES + RXE_RDETH_BYTES, |
| 836 | .offset = { |
| 837 | [RXE_BTH] = 0, |
| 838 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 839 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 840 | RXE_RDETH_BYTES, |
| 841 | } |
| 842 | }, |
| 843 | [IB_OPCODE_RD_RDMA_READ_RESPONSE_LAST] = { |
| 844 | .name = "IB_OPCODE_RD_RDMA_READ_RESPONSE_LAST" , |
| 845 | .mask = RXE_RDETH_MASK | RXE_AETH_MASK | RXE_PAYLOAD_MASK | |
| 846 | RXE_ACK_MASK | RXE_END_MASK, |
| 847 | .length = RXE_BTH_BYTES + RXE_AETH_BYTES + RXE_RDETH_BYTES, |
| 848 | .offset = { |
| 849 | [RXE_BTH] = 0, |
| 850 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 851 | [RXE_AETH] = RXE_BTH_BYTES + |
| 852 | RXE_RDETH_BYTES, |
| 853 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 854 | RXE_RDETH_BYTES + |
| 855 | RXE_AETH_BYTES, |
| 856 | } |
| 857 | }, |
| 858 | [IB_OPCODE_RD_RDMA_READ_RESPONSE_ONLY] = { |
| 859 | .name = "IB_OPCODE_RD_RDMA_READ_RESPONSE_ONLY" , |
| 860 | .mask = RXE_RDETH_MASK | RXE_AETH_MASK | RXE_PAYLOAD_MASK | |
| 861 | RXE_ACK_MASK | RXE_START_MASK | RXE_END_MASK, |
| 862 | .length = RXE_BTH_BYTES + RXE_AETH_BYTES + RXE_RDETH_BYTES, |
| 863 | .offset = { |
| 864 | [RXE_BTH] = 0, |
| 865 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 866 | [RXE_AETH] = RXE_BTH_BYTES + |
| 867 | RXE_RDETH_BYTES, |
| 868 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 869 | RXE_RDETH_BYTES + |
| 870 | RXE_AETH_BYTES, |
| 871 | } |
| 872 | }, |
| 873 | [IB_OPCODE_RD_ACKNOWLEDGE] = { |
| 874 | .name = "IB_OPCODE_RD_ACKNOWLEDGE" , |
| 875 | .mask = RXE_RDETH_MASK | RXE_AETH_MASK | RXE_ACK_MASK | |
| 876 | RXE_START_MASK | RXE_END_MASK, |
| 877 | .length = RXE_BTH_BYTES + RXE_AETH_BYTES + RXE_RDETH_BYTES, |
| 878 | .offset = { |
| 879 | [RXE_BTH] = 0, |
| 880 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 881 | [RXE_AETH] = RXE_BTH_BYTES + |
| 882 | RXE_RDETH_BYTES, |
| 883 | } |
| 884 | }, |
| 885 | [IB_OPCODE_RD_ATOMIC_ACKNOWLEDGE] = { |
| 886 | .name = "IB_OPCODE_RD_ATOMIC_ACKNOWLEDGE" , |
| 887 | .mask = RXE_RDETH_MASK | RXE_AETH_MASK | RXE_ATMACK_MASK | |
| 888 | RXE_ACK_MASK | RXE_START_MASK | RXE_END_MASK, |
| 889 | .length = RXE_BTH_BYTES + RXE_ATMACK_BYTES + RXE_AETH_BYTES + |
| 890 | RXE_RDETH_BYTES, |
| 891 | .offset = { |
| 892 | [RXE_BTH] = 0, |
| 893 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 894 | [RXE_AETH] = RXE_BTH_BYTES + |
| 895 | RXE_RDETH_BYTES, |
| 896 | [RXE_ATMACK] = RXE_BTH_BYTES + |
| 897 | RXE_RDETH_BYTES + |
| 898 | RXE_AETH_BYTES, |
| 899 | } |
| 900 | }, |
| 901 | [IB_OPCODE_RD_COMPARE_SWAP] = { |
| 902 | .name = "RD_COMPARE_SWAP" , |
| 903 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_ATMETH_MASK | |
| 904 | RXE_REQ_MASK | RXE_ATOMIC_MASK | |
| 905 | RXE_START_MASK | RXE_END_MASK, |
| 906 | .length = RXE_BTH_BYTES + RXE_ATMETH_BYTES + RXE_DETH_BYTES + |
| 907 | RXE_RDETH_BYTES, |
| 908 | .offset = { |
| 909 | [RXE_BTH] = 0, |
| 910 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 911 | [RXE_DETH] = RXE_BTH_BYTES + |
| 912 | RXE_RDETH_BYTES, |
| 913 | [RXE_ATMETH] = RXE_BTH_BYTES + |
| 914 | RXE_RDETH_BYTES + |
| 915 | RXE_DETH_BYTES, |
| 916 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 917 | RXE_ATMETH_BYTES + |
| 918 | RXE_DETH_BYTES + |
| 919 | RXE_RDETH_BYTES, |
| 920 | } |
| 921 | }, |
| 922 | [IB_OPCODE_RD_FETCH_ADD] = { |
| 923 | .name = "IB_OPCODE_RD_FETCH_ADD" , |
| 924 | .mask = RXE_RDETH_MASK | RXE_DETH_MASK | RXE_ATMETH_MASK | |
| 925 | RXE_REQ_MASK | RXE_ATOMIC_MASK | |
| 926 | RXE_START_MASK | RXE_END_MASK, |
| 927 | .length = RXE_BTH_BYTES + RXE_ATMETH_BYTES + RXE_DETH_BYTES + |
| 928 | RXE_RDETH_BYTES, |
| 929 | .offset = { |
| 930 | [RXE_BTH] = 0, |
| 931 | [RXE_RDETH] = RXE_BTH_BYTES, |
| 932 | [RXE_DETH] = RXE_BTH_BYTES + |
| 933 | RXE_RDETH_BYTES, |
| 934 | [RXE_ATMETH] = RXE_BTH_BYTES + |
| 935 | RXE_RDETH_BYTES + |
| 936 | RXE_DETH_BYTES, |
| 937 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 938 | RXE_ATMETH_BYTES + |
| 939 | RXE_DETH_BYTES + |
| 940 | RXE_RDETH_BYTES, |
| 941 | } |
| 942 | }, |
| 943 | |
| 944 | /* UD */ |
| 945 | [IB_OPCODE_UD_SEND_ONLY] = { |
| 946 | .name = "IB_OPCODE_UD_SEND_ONLY" , |
| 947 | .mask = RXE_DETH_MASK | RXE_PAYLOAD_MASK | RXE_REQ_MASK | |
| 948 | RXE_COMP_MASK | RXE_RWR_MASK | RXE_SEND_MASK | |
| 949 | RXE_START_MASK | RXE_END_MASK, |
| 950 | .length = RXE_BTH_BYTES + RXE_DETH_BYTES, |
| 951 | .offset = { |
| 952 | [RXE_BTH] = 0, |
| 953 | [RXE_DETH] = RXE_BTH_BYTES, |
| 954 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 955 | RXE_DETH_BYTES, |
| 956 | } |
| 957 | }, |
| 958 | [IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE] = { |
| 959 | .name = "IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE" , |
| 960 | .mask = RXE_DETH_MASK | RXE_IMMDT_MASK | RXE_PAYLOAD_MASK | |
| 961 | RXE_REQ_MASK | RXE_COMP_MASK | RXE_RWR_MASK | |
| 962 | RXE_SEND_MASK | RXE_START_MASK | RXE_END_MASK, |
| 963 | .length = RXE_BTH_BYTES + RXE_IMMDT_BYTES + RXE_DETH_BYTES, |
| 964 | .offset = { |
| 965 | [RXE_BTH] = 0, |
| 966 | [RXE_DETH] = RXE_BTH_BYTES, |
| 967 | [RXE_IMMDT] = RXE_BTH_BYTES + |
| 968 | RXE_DETH_BYTES, |
| 969 | [RXE_PAYLOAD] = RXE_BTH_BYTES + |
| 970 | RXE_DETH_BYTES + |
| 971 | RXE_IMMDT_BYTES, |
| 972 | } |
| 973 | }, |
| 974 | |
| 975 | }; |
| 976 | |