1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Driver for the Integrant ITD1000 "Zero-IF Tuner IC for Direct Broadcast Satellite" |
4 | * |
5 | * Copyright (c) 2007-8 Patrick Boettcher <pb@linuxtv.org> |
6 | */ |
7 | |
8 | #include <linux/module.h> |
9 | #include <linux/moduleparam.h> |
10 | #include <linux/delay.h> |
11 | #include <linux/dvb/frontend.h> |
12 | #include <linux/i2c.h> |
13 | #include <linux/slab.h> |
14 | |
15 | #include <media/dvb_frontend.h> |
16 | |
17 | #include "itd1000.h" |
18 | #include "itd1000_priv.h" |
19 | |
20 | /* Max transfer size done by I2C transfer functions */ |
21 | #define MAX_XFER_SIZE 64 |
22 | |
23 | static int debug; |
24 | module_param(debug, int, 0644); |
25 | MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)." ); |
26 | |
27 | #define itd_dbg(args...) do { \ |
28 | if (debug) { \ |
29 | printk(KERN_DEBUG "ITD1000: " args);\ |
30 | } \ |
31 | } while (0) |
32 | |
33 | #define itd_warn(args...) do { \ |
34 | printk(KERN_WARNING "ITD1000: " args); \ |
35 | } while (0) |
36 | |
37 | #define itd_info(args...) do { \ |
38 | printk(KERN_INFO "ITD1000: " args); \ |
39 | } while (0) |
40 | |
41 | /* don't write more than one byte with flexcop behind */ |
42 | static int itd1000_write_regs(struct itd1000_state *state, u8 reg, u8 v[], u8 len) |
43 | { |
44 | u8 buf[MAX_XFER_SIZE]; |
45 | struct i2c_msg msg = { |
46 | .addr = state->cfg->i2c_address, .flags = 0, .buf = buf, .len = len+1 |
47 | }; |
48 | |
49 | if (1 + len > sizeof(buf)) { |
50 | printk(KERN_WARNING |
51 | "itd1000: i2c wr reg=%04x: len=%d is too big!\n" , |
52 | reg, len); |
53 | return -EINVAL; |
54 | } |
55 | |
56 | buf[0] = reg; |
57 | memcpy(&buf[1], v, len); |
58 | |
59 | /* itd_dbg("wr %02x: %02x\n", reg, v[0]); */ |
60 | |
61 | if (i2c_transfer(adap: state->i2c, msgs: &msg, num: 1) != 1) { |
62 | printk(KERN_WARNING "itd1000 I2C write failed\n" ); |
63 | return -EREMOTEIO; |
64 | } |
65 | return 0; |
66 | } |
67 | |
68 | static int itd1000_read_reg(struct itd1000_state *state, u8 reg) |
69 | { |
70 | u8 val; |
71 | struct i2c_msg msg[2] = { |
72 | { .addr = state->cfg->i2c_address, .flags = 0, .buf = ®, .len = 1 }, |
73 | { .addr = state->cfg->i2c_address, .flags = I2C_M_RD, .buf = &val, .len = 1 }, |
74 | }; |
75 | |
76 | /* ugly flexcop workaround */ |
77 | itd1000_write_regs(state, reg: (reg - 1) & 0xff, v: &state->shadow[(reg - 1) & 0xff], len: 1); |
78 | |
79 | if (i2c_transfer(adap: state->i2c, msgs: msg, num: 2) != 2) { |
80 | itd_warn("itd1000 I2C read failed\n" ); |
81 | return -EREMOTEIO; |
82 | } |
83 | return val; |
84 | } |
85 | |
86 | static inline int itd1000_write_reg(struct itd1000_state *state, u8 r, u8 v) |
87 | { |
88 | u8 tmp = v; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */ |
89 | int ret = itd1000_write_regs(state, reg: r, v: &tmp, len: 1); |
90 | state->shadow[r] = tmp; |
91 | return ret; |
92 | } |
93 | |
94 | |
95 | static struct { |
96 | u32 symbol_rate; |
97 | u8 pgaext : 4; /* PLLFH */ |
98 | u8 bbgvmin : 4; /* BBGVMIN */ |
99 | } itd1000_lpf_pga[] = { |
100 | { 0, 0x8, 0x3 }, |
101 | { 5200000, 0x8, 0x3 }, |
102 | { 12200000, 0x4, 0x3 }, |
103 | { 15400000, 0x2, 0x3 }, |
104 | { 19800000, 0x2, 0x3 }, |
105 | { 21500000, 0x2, 0x3 }, |
106 | { 24500000, 0x2, 0x3 }, |
107 | { 28400000, 0x2, 0x3 }, |
108 | { 33400000, 0x2, 0x3 }, |
109 | { 34400000, 0x1, 0x4 }, |
110 | { 34400000, 0x1, 0x4 }, |
111 | { 38400000, 0x1, 0x4 }, |
112 | { 38400000, 0x1, 0x4 }, |
113 | { 40400000, 0x1, 0x4 }, |
114 | { 45400000, 0x1, 0x4 }, |
115 | }; |
116 | |
117 | static void itd1000_set_lpf_bw(struct itd1000_state *state, u32 symbol_rate) |
118 | { |
119 | u8 i; |
120 | u8 con1 = itd1000_read_reg(state, reg: CON1) & 0xfd; |
121 | u8 pllfh = itd1000_read_reg(state, reg: PLLFH) & 0x0f; |
122 | u8 bbgvmin = itd1000_read_reg(state, reg: BBGVMIN) & 0xf0; |
123 | u8 bw = itd1000_read_reg(state, reg: BW) & 0xf0; |
124 | |
125 | itd_dbg("symbol_rate = %d\n" , symbol_rate); |
126 | |
127 | /* not sure what is that ? - starting to download the table */ |
128 | itd1000_write_reg(state, r: CON1, v: con1 | (1 << 1)); |
129 | |
130 | for (i = 0; i < ARRAY_SIZE(itd1000_lpf_pga); i++) |
131 | if (symbol_rate < itd1000_lpf_pga[i].symbol_rate) { |
132 | itd_dbg("symrate: index: %d pgaext: %x, bbgvmin: %x\n" , i, itd1000_lpf_pga[i].pgaext, itd1000_lpf_pga[i].bbgvmin); |
133 | itd1000_write_reg(state, r: PLLFH, v: pllfh | (itd1000_lpf_pga[i].pgaext << 4)); |
134 | itd1000_write_reg(state, r: BBGVMIN, v: bbgvmin | (itd1000_lpf_pga[i].bbgvmin)); |
135 | itd1000_write_reg(state, r: BW, v: bw | (i & 0x0f)); |
136 | break; |
137 | } |
138 | |
139 | itd1000_write_reg(state, r: CON1, v: con1 | (0 << 1)); |
140 | } |
141 | |
142 | static struct { |
143 | u8 vcorg; |
144 | u32 fmax_rg; |
145 | } itd1000_vcorg[] = { |
146 | { 1, 920000 }, |
147 | { 2, 971000 }, |
148 | { 3, 1031000 }, |
149 | { 4, 1091000 }, |
150 | { 5, 1171000 }, |
151 | { 6, 1281000 }, |
152 | { 7, 1381000 }, |
153 | { 8, 500000 }, /* this is intentional. */ |
154 | { 9, 1451000 }, |
155 | { 10, 1531000 }, |
156 | { 11, 1631000 }, |
157 | { 12, 1741000 }, |
158 | { 13, 1891000 }, |
159 | { 14, 2071000 }, |
160 | { 15, 2250000 }, |
161 | }; |
162 | |
163 | static void itd1000_set_vco(struct itd1000_state *state, u32 freq_khz) |
164 | { |
165 | u8 i; |
166 | u8 gvbb_i2c = itd1000_read_reg(state, reg: GVBB_I2C) & 0xbf; |
167 | u8 vco_chp1_i2c = itd1000_read_reg(state, reg: VCO_CHP1_I2C) & 0x0f; |
168 | u8 adcout; |
169 | |
170 | /* reserved bit again (reset ?) */ |
171 | itd1000_write_reg(state, r: GVBB_I2C, v: gvbb_i2c | (1 << 6)); |
172 | |
173 | for (i = 0; i < ARRAY_SIZE(itd1000_vcorg); i++) { |
174 | if (freq_khz < itd1000_vcorg[i].fmax_rg) { |
175 | itd1000_write_reg(state, r: VCO_CHP1_I2C, v: vco_chp1_i2c | (itd1000_vcorg[i].vcorg << 4)); |
176 | msleep(msecs: 1); |
177 | |
178 | adcout = itd1000_read_reg(state, reg: PLLLOCK) & 0x0f; |
179 | |
180 | itd_dbg("VCO: %dkHz: %d -> ADCOUT: %d %02x\n" , freq_khz, itd1000_vcorg[i].vcorg, adcout, vco_chp1_i2c); |
181 | |
182 | if (adcout > 13) { |
183 | if (!(itd1000_vcorg[i].vcorg == 7 || itd1000_vcorg[i].vcorg == 15)) |
184 | itd1000_write_reg(state, r: VCO_CHP1_I2C, v: vco_chp1_i2c | ((itd1000_vcorg[i].vcorg + 1) << 4)); |
185 | } else if (adcout < 2) { |
186 | if (!(itd1000_vcorg[i].vcorg == 1 || itd1000_vcorg[i].vcorg == 9)) |
187 | itd1000_write_reg(state, r: VCO_CHP1_I2C, v: vco_chp1_i2c | ((itd1000_vcorg[i].vcorg - 1) << 4)); |
188 | } |
189 | break; |
190 | } |
191 | } |
192 | } |
193 | |
194 | static const struct { |
195 | u32 freq; |
196 | u8 values[10]; /* RFTR, RFST1 - RFST9 */ |
197 | } itd1000_fre_values[] = { |
198 | { 1075000, { 0x59, 0x1d, 0x1c, 0x17, 0x16, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } }, |
199 | { 1250000, { 0x89, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } }, |
200 | { 1450000, { 0x89, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } }, |
201 | { 1650000, { 0x69, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } }, |
202 | { 1750000, { 0x69, 0x1e, 0x17, 0x15, 0x14, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } }, |
203 | { 1850000, { 0x69, 0x1d, 0x17, 0x16, 0x14, 0x0f, 0x0e, 0x0d, 0x0b, 0x0a } }, |
204 | { 1900000, { 0x69, 0x1d, 0x17, 0x15, 0x14, 0x0f, 0x0e, 0x0d, 0x0b, 0x0a } }, |
205 | { 1950000, { 0x69, 0x1d, 0x17, 0x16, 0x14, 0x13, 0x0e, 0x0d, 0x0b, 0x0a } }, |
206 | { 2050000, { 0x69, 0x1e, 0x1d, 0x17, 0x16, 0x14, 0x13, 0x0e, 0x0b, 0x0a } }, |
207 | { 2150000, { 0x69, 0x1d, 0x1c, 0x17, 0x15, 0x14, 0x13, 0x0f, 0x0e, 0x0b } } |
208 | }; |
209 | |
210 | |
211 | #define FREF 16 |
212 | |
213 | static void itd1000_set_lo(struct itd1000_state *state, u32 freq_khz) |
214 | { |
215 | int i, j; |
216 | u32 plln, pllf; |
217 | u64 tmp; |
218 | |
219 | plln = (freq_khz * 1000) / 2 / FREF; |
220 | |
221 | /* Compute the factional part times 1000 */ |
222 | tmp = plln % 1000000; |
223 | plln /= 1000000; |
224 | |
225 | tmp *= 1048576; |
226 | do_div(tmp, 1000000); |
227 | pllf = (u32) tmp; |
228 | |
229 | state->frequency = ((plln * 1000) + (pllf * 1000)/1048576) * 2*FREF; |
230 | itd_dbg("frequency: %dkHz (wanted) %dkHz (set), PLLF = %d, PLLN = %d\n" , freq_khz, state->frequency, pllf, plln); |
231 | |
232 | itd1000_write_reg(state, r: PLLNH, v: 0x80); /* PLLNH */ |
233 | itd1000_write_reg(state, r: PLLNL, v: plln & 0xff); |
234 | itd1000_write_reg(state, r: PLLFH, v: (itd1000_read_reg(state, reg: PLLFH) & 0xf0) | ((pllf >> 16) & 0x0f)); |
235 | itd1000_write_reg(state, r: PLLFM, v: (pllf >> 8) & 0xff); |
236 | itd1000_write_reg(state, r: PLLFL, v: (pllf >> 0) & 0xff); |
237 | |
238 | for (i = 0; i < ARRAY_SIZE(itd1000_fre_values); i++) { |
239 | if (freq_khz <= itd1000_fre_values[i].freq) { |
240 | itd_dbg("fre_values: %d\n" , i); |
241 | itd1000_write_reg(state, r: RFTR, v: itd1000_fre_values[i].values[0]); |
242 | for (j = 0; j < 9; j++) |
243 | itd1000_write_reg(state, r: RFST1+j, v: itd1000_fre_values[i].values[j+1]); |
244 | break; |
245 | } |
246 | } |
247 | |
248 | itd1000_set_vco(state, freq_khz); |
249 | } |
250 | |
251 | static int itd1000_set_parameters(struct dvb_frontend *fe) |
252 | { |
253 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
254 | struct itd1000_state *state = fe->tuner_priv; |
255 | u8 pllcon1; |
256 | |
257 | itd1000_set_lo(state, freq_khz: c->frequency); |
258 | itd1000_set_lpf_bw(state, symbol_rate: c->symbol_rate); |
259 | |
260 | pllcon1 = itd1000_read_reg(state, reg: PLLCON1) & 0x7f; |
261 | itd1000_write_reg(state, r: PLLCON1, v: pllcon1 | (1 << 7)); |
262 | itd1000_write_reg(state, r: PLLCON1, v: pllcon1); |
263 | |
264 | return 0; |
265 | } |
266 | |
267 | static int itd1000_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
268 | { |
269 | struct itd1000_state *state = fe->tuner_priv; |
270 | *frequency = state->frequency; |
271 | return 0; |
272 | } |
273 | |
274 | static int itd1000_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) |
275 | { |
276 | return 0; |
277 | } |
278 | |
279 | static u8 itd1000_init_tab[][2] = { |
280 | { PLLCON1, 0x65 }, /* Register does not change */ |
281 | { PLLNH, 0x80 }, /* Bits [7:6] do not change */ |
282 | { RESERVED_0X6D, 0x3b }, |
283 | { VCO_CHP2_I2C, 0x12 }, |
284 | { 0x72, 0xf9 }, /* No such regsister defined */ |
285 | { RESERVED_0X73, 0xff }, |
286 | { RESERVED_0X74, 0xb2 }, |
287 | { RESERVED_0X75, 0xc7 }, |
288 | { EXTGVBBRF, 0xf0 }, |
289 | { DIVAGCCK, 0x80 }, |
290 | { BBTR, 0xa0 }, |
291 | { RESERVED_0X7E, 0x4f }, |
292 | { 0x82, 0x88 }, /* No such regsister defined */ |
293 | { 0x83, 0x80 }, /* No such regsister defined */ |
294 | { 0x84, 0x80 }, /* No such regsister defined */ |
295 | { RESERVED_0X85, 0x74 }, |
296 | { RESERVED_0X86, 0xff }, |
297 | { RESERVED_0X88, 0x02 }, |
298 | { RESERVED_0X89, 0x16 }, |
299 | { RFST0, 0x1f }, |
300 | { RESERVED_0X94, 0x66 }, |
301 | { RESERVED_0X95, 0x66 }, |
302 | { RESERVED_0X96, 0x77 }, |
303 | { RESERVED_0X97, 0x99 }, |
304 | { RESERVED_0X98, 0xff }, |
305 | { RESERVED_0X99, 0xfc }, |
306 | { RESERVED_0X9A, 0xba }, |
307 | { RESERVED_0X9B, 0xaa }, |
308 | }; |
309 | |
310 | static u8 itd1000_reinit_tab[][2] = { |
311 | { VCO_CHP1_I2C, 0x8a }, |
312 | { BW, 0x87 }, |
313 | { GVBB_I2C, 0x03 }, |
314 | { BBGVMIN, 0x03 }, |
315 | { CON1, 0x2e }, |
316 | }; |
317 | |
318 | |
319 | static int itd1000_init(struct dvb_frontend *fe) |
320 | { |
321 | struct itd1000_state *state = fe->tuner_priv; |
322 | int i; |
323 | |
324 | for (i = 0; i < ARRAY_SIZE(itd1000_init_tab); i++) |
325 | itd1000_write_reg(state, r: itd1000_init_tab[i][0], v: itd1000_init_tab[i][1]); |
326 | |
327 | for (i = 0; i < ARRAY_SIZE(itd1000_reinit_tab); i++) |
328 | itd1000_write_reg(state, r: itd1000_reinit_tab[i][0], v: itd1000_reinit_tab[i][1]); |
329 | |
330 | return 0; |
331 | } |
332 | |
333 | static int itd1000_sleep(struct dvb_frontend *fe) |
334 | { |
335 | return 0; |
336 | } |
337 | |
338 | static void itd1000_release(struct dvb_frontend *fe) |
339 | { |
340 | kfree(objp: fe->tuner_priv); |
341 | fe->tuner_priv = NULL; |
342 | } |
343 | |
344 | static const struct dvb_tuner_ops itd1000_tuner_ops = { |
345 | .info = { |
346 | .name = "Integrant ITD1000" , |
347 | .frequency_min_hz = 950 * MHz, |
348 | .frequency_max_hz = 2150 * MHz, |
349 | .frequency_step_hz = 125 * kHz, |
350 | }, |
351 | |
352 | .release = itd1000_release, |
353 | |
354 | .init = itd1000_init, |
355 | .sleep = itd1000_sleep, |
356 | |
357 | .set_params = itd1000_set_parameters, |
358 | .get_frequency = itd1000_get_frequency, |
359 | .get_bandwidth = itd1000_get_bandwidth |
360 | }; |
361 | |
362 | |
363 | struct dvb_frontend *itd1000_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct itd1000_config *cfg) |
364 | { |
365 | struct itd1000_state *state = NULL; |
366 | u8 i = 0; |
367 | |
368 | state = kzalloc(size: sizeof(struct itd1000_state), GFP_KERNEL); |
369 | if (state == NULL) |
370 | return NULL; |
371 | |
372 | state->cfg = cfg; |
373 | state->i2c = i2c; |
374 | |
375 | i = itd1000_read_reg(state, reg: 0); |
376 | if (i != 0) { |
377 | kfree(objp: state); |
378 | return NULL; |
379 | } |
380 | itd_info("successfully identified (ID: %d)\n" , i); |
381 | |
382 | memset(state->shadow, 0xff, sizeof(state->shadow)); |
383 | for (i = 0x65; i < 0x9c; i++) |
384 | state->shadow[i] = itd1000_read_reg(state, reg: i); |
385 | |
386 | memcpy(&fe->ops.tuner_ops, &itd1000_tuner_ops, sizeof(struct dvb_tuner_ops)); |
387 | |
388 | fe->tuner_priv = state; |
389 | |
390 | return fe; |
391 | } |
392 | EXPORT_SYMBOL_GPL(itd1000_attach); |
393 | |
394 | MODULE_AUTHOR("Patrick Boettcher <pb@linuxtv.org>" ); |
395 | MODULE_DESCRIPTION("Integrant ITD1000 driver" ); |
396 | MODULE_LICENSE("GPL" ); |
397 | |