| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator |
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| 4 | * LGS8913, LGS8GL5, LGS8G75 |
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| 5 | * experimental support LGS8G42, LGS8G52 |
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| 6 | * |
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| 7 | * Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com> |
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| 8 | * Copyright (C) 2008 Sirius International (Hong Kong) Limited |
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| 9 | * Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5) |
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| 10 | */ |
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| 11 | |
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| 12 | #ifndef LGS8913_PRIV_H |
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| 13 | #define LGS8913_PRIV_H |
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| 14 | |
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| 15 | struct lgs8gxx_state { |
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| 16 | struct i2c_adapter *i2c; |
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| 17 | /* configuration settings */ |
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| 18 | const struct lgs8gxx_config *config; |
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| 19 | struct dvb_frontend frontend; |
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| 20 | u16 curr_gi; /* current guard interval */ |
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| 21 | }; |
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| 22 | |
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| 23 | #define SC_MASK 0x1C /* Sub-Carrier Modulation Mask */ |
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| 24 | #define SC_QAM64 0x10 /* 64QAM modulation */ |
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| 25 | #define SC_QAM32 0x0C /* 32QAM modulation */ |
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| 26 | #define SC_QAM16 0x08 /* 16QAM modulation */ |
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| 27 | #define SC_QAM4NR 0x04 /* 4QAM-NR modulation */ |
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| 28 | #define SC_QAM4 0x00 /* 4QAM modulation */ |
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| 29 | |
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| 30 | #define LGS_FEC_MASK 0x03 /* FEC Rate Mask */ |
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| 31 | #define LGS_FEC_0_4 0x00 /* FEC Rate 0.4 */ |
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| 32 | #define LGS_FEC_0_6 0x01 /* FEC Rate 0.6 */ |
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| 33 | #define LGS_FEC_0_8 0x02 /* FEC Rate 0.8 */ |
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| 34 | |
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| 35 | #define TIM_MASK 0x20 /* Time Interleave Length Mask */ |
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| 36 | #define TIM_LONG 0x20 /* Time Interleave Length = 720 */ |
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| 37 | #define TIM_MIDDLE 0x00 /* Time Interleave Length = 240 */ |
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| 38 | |
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| 39 | #define CF_MASK 0x80 /* Control Frame Mask */ |
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| 40 | #define CF_EN 0x80 /* Control Frame On */ |
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| 41 | |
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| 42 | #define GI_MASK 0x03 /* Guard Interval Mask */ |
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| 43 | #define GI_420 0x00 /* 1/9 Guard Interval */ |
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| 44 | #define GI_595 0x01 /* */ |
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| 45 | #define GI_945 0x02 /* 1/4 Guard Interval */ |
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| 46 | |
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| 47 | |
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| 48 | #define TS_PARALLEL 0x00 /* Parallel TS Output a.k.a. SPI */ |
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| 49 | #define TS_SERIAL 0x01 /* Serial TS Output a.k.a. SSI */ |
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| 50 | #define TS_CLK_NORMAL 0x00 /* MPEG Clock Normal */ |
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| 51 | #define TS_CLK_INVERTED 0x02 /* MPEG Clock Inverted */ |
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| 52 | #define TS_CLK_GATED 0x00 /* MPEG clock gated */ |
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| 53 | #define TS_CLK_FREERUN 0x04 /* MPEG clock free running*/ |
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| 54 | |
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| 55 | |
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| 56 | #endif |
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| 57 | |
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