1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * adv7183 - Analog Devices ADV7183 video decoder registers |
4 | * |
5 | * Copyright (c) 2011 Analog Devices Inc. |
6 | */ |
7 | |
8 | #ifndef _ADV7183_REGS_H_ |
9 | #define _ADV7183_REGS_H_ |
10 | |
11 | #define ADV7183_IN_CTRL 0x00 /* Input control */ |
12 | #define ADV7183_VD_SEL 0x01 /* Video selection */ |
13 | #define ADV7183_OUT_CTRL 0x03 /* Output control */ |
14 | #define ADV7183_EXT_OUT_CTRL 0x04 /* Extended output control */ |
15 | #define ADV7183_AUTO_DET_EN 0x07 /* Autodetect enable */ |
16 | #define ADV7183_CONTRAST 0x08 /* Contrast */ |
17 | #define ADV7183_BRIGHTNESS 0x0A /* Brightness */ |
18 | #define ADV7183_HUE 0x0B /* Hue */ |
19 | #define ADV7183_DEF_Y 0x0C /* Default value Y */ |
20 | #define ADV7183_DEF_C 0x0D /* Default value C */ |
21 | #define ADV7183_ADI_CTRL 0x0E /* ADI control */ |
22 | #define ADV7183_POW_MANAGE 0x0F /* Power Management */ |
23 | #define ADV7183_STATUS_1 0x10 /* Status 1 */ |
24 | #define ADV7183_IDENT 0x11 /* Ident */ |
25 | #define ADV7183_STATUS_2 0x12 /* Status 2 */ |
26 | #define ADV7183_STATUS_3 0x13 /* Status 3 */ |
27 | #define ADV7183_ANAL_CLAMP_CTRL 0x14 /* Analog clamp control */ |
28 | #define ADV7183_DIGI_CLAMP_CTRL_1 0x15 /* Digital clamp control 1 */ |
29 | #define ADV7183_SHAP_FILT_CTRL 0x17 /* Shaping filter control */ |
30 | #define ADV7183_SHAP_FILT_CTRL_2 0x18 /* Shaping filter control 2 */ |
31 | #define ADV7183_COMB_FILT_CTRL 0x19 /* Comb filter control */ |
32 | #define ADV7183_ADI_CTRL_2 0x1D /* ADI control 2 */ |
33 | #define ADV7183_PIX_DELAY_CTRL 0x27 /* Pixel delay control */ |
34 | #define ADV7183_MISC_GAIN_CTRL 0x2B /* Misc gain control */ |
35 | #define ADV7183_AGC_MODE_CTRL 0x2C /* AGC mode control */ |
36 | #define ADV7183_CHRO_GAIN_CTRL_1 0x2D /* Chroma gain control 1 */ |
37 | #define ADV7183_CHRO_GAIN_CTRL_2 0x2E /* Chroma gain control 2 */ |
38 | #define ADV7183_LUMA_GAIN_CTRL_1 0x2F /* Luma gain control 1 */ |
39 | #define ADV7183_LUMA_GAIN_CTRL_2 0x30 /* Luma gain control 2 */ |
40 | #define ADV7183_VS_FIELD_CTRL_1 0x31 /* Vsync field control 1 */ |
41 | #define ADV7183_VS_FIELD_CTRL_2 0x32 /* Vsync field control 2 */ |
42 | #define ADV7183_VS_FIELD_CTRL_3 0x33 /* Vsync field control 3 */ |
43 | #define ADV7183_HS_POS_CTRL_1 0x34 /* Hsync position control 1 */ |
44 | #define ADV7183_HS_POS_CTRL_2 0x35 /* Hsync position control 2 */ |
45 | #define ADV7183_HS_POS_CTRL_3 0x36 /* Hsync position control 3 */ |
46 | #define ADV7183_POLARITY 0x37 /* Polarity */ |
47 | #define ADV7183_NTSC_COMB_CTRL 0x38 /* NTSC comb control */ |
48 | #define ADV7183_PAL_COMB_CTRL 0x39 /* PAL comb control */ |
49 | #define ADV7183_ADC_CTRL 0x3A /* ADC control */ |
50 | #define ADV7183_MAN_WIN_CTRL 0x3D /* Manual window control */ |
51 | #define ADV7183_RESAMPLE_CTRL 0x41 /* Resample control */ |
52 | #define ADV7183_GEMSTAR_CTRL_1 0x48 /* Gemstar ctrl 1 */ |
53 | #define ADV7183_GEMSTAR_CTRL_2 0x49 /* Gemstar ctrl 2 */ |
54 | #define ADV7183_GEMSTAR_CTRL_3 0x4A /* Gemstar ctrl 3 */ |
55 | #define ADV7183_GEMSTAR_CTRL_4 0x4B /* Gemstar ctrl 4 */ |
56 | #define ADV7183_GEMSTAR_CTRL_5 0x4C /* Gemstar ctrl 5 */ |
57 | #define ADV7183_CTI_DNR_CTRL_1 0x4D /* CTI DNR ctrl 1 */ |
58 | #define ADV7183_CTI_DNR_CTRL_2 0x4E /* CTI DNR ctrl 2 */ |
59 | #define ADV7183_CTI_DNR_CTRL_4 0x50 /* CTI DNR ctrl 4 */ |
60 | #define ADV7183_LOCK_CNT 0x51 /* Lock count */ |
61 | #define ADV7183_FREE_LINE_LEN 0x8F /* Free-Run line length 1 */ |
62 | #define ADV7183_VBI_INFO 0x90 /* VBI info */ |
63 | #define ADV7183_WSS_1 0x91 /* WSS 1 */ |
64 | #define ADV7183_WSS_2 0x92 /* WSS 2 */ |
65 | #define ADV7183_EDTV_1 0x93 /* EDTV 1 */ |
66 | #define ADV7183_EDTV_2 0x94 /* EDTV 2 */ |
67 | #define ADV7183_EDTV_3 0x95 /* EDTV 3 */ |
68 | #define ADV7183_CGMS_1 0x96 /* CGMS 1 */ |
69 | #define ADV7183_CGMS_2 0x97 /* CGMS 2 */ |
70 | #define ADV7183_CGMS_3 0x98 /* CGMS 3 */ |
71 | #define ADV7183_CCAP_1 0x99 /* CCAP 1 */ |
72 | #define ADV7183_CCAP_2 0x9A /* CCAP 2 */ |
73 | #define ADV7183_LETTERBOX_1 0x9B /* Letterbox 1 */ |
74 | #define ADV7183_LETTERBOX_2 0x9C /* Letterbox 2 */ |
75 | #define ADV7183_LETTERBOX_3 0x9D /* Letterbox 3 */ |
76 | #define ADV7183_CRC_EN 0xB2 /* CRC enable */ |
77 | #define ADV7183_ADC_SWITCH_1 0xC3 /* ADC switch 1 */ |
78 | #define ADV7183_ADC_SWITCH_2 0xC4 /* ADC switch 2 */ |
79 | #define ADV7183_LETTERBOX_CTRL_1 0xDC /* Letterbox control 1 */ |
80 | #define ADV7183_LETTERBOX_CTRL_2 0xDD /* Letterbox control 2 */ |
81 | #define ADV7183_SD_OFFSET_CB 0xE1 /* SD offset Cb */ |
82 | #define ADV7183_SD_OFFSET_CR 0xE2 /* SD offset Cr */ |
83 | #define ADV7183_SD_SATURATION_CB 0xE3 /* SD saturation Cb */ |
84 | #define ADV7183_SD_SATURATION_CR 0xE4 /* SD saturation Cr */ |
85 | #define ADV7183_NTSC_V_BEGIN 0xE5 /* NTSC V bit begin */ |
86 | #define ADV7183_NTSC_V_END 0xE6 /* NTSC V bit end */ |
87 | #define ADV7183_NTSC_F_TOGGLE 0xE7 /* NTSC F bit toggle */ |
88 | #define ADV7183_PAL_V_BEGIN 0xE8 /* PAL V bit begin */ |
89 | #define ADV7183_PAL_V_END 0xE9 /* PAL V bit end */ |
90 | #define ADV7183_PAL_F_TOGGLE 0xEA /* PAL F bit toggle */ |
91 | #define ADV7183_DRIVE_STR 0xF4 /* Drive strength */ |
92 | #define ADV7183_IF_COMP_CTRL 0xF8 /* IF comp control */ |
93 | #define ADV7183_VS_MODE_CTRL 0xF9 /* VS mode control */ |
94 | |
95 | #endif |
96 | |