1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // Copyright (C) 2018 Intel Corporation |
3 | |
4 | #include <linux/acpi.h> |
5 | #include <linux/clk.h> |
6 | #include <linux/delay.h> |
7 | #include <linux/i2c.h> |
8 | #include <linux/module.h> |
9 | #include <linux/pm_runtime.h> |
10 | #include <media/v4l2-ctrls.h> |
11 | #include <media/v4l2-device.h> |
12 | #include <media/v4l2-fwnode.h> |
13 | #include <asm/unaligned.h> |
14 | |
15 | #define IMX258_REG_VALUE_08BIT 1 |
16 | #define IMX258_REG_VALUE_16BIT 2 |
17 | |
18 | #define IMX258_REG_MODE_SELECT 0x0100 |
19 | #define IMX258_MODE_STANDBY 0x00 |
20 | #define IMX258_MODE_STREAMING 0x01 |
21 | |
22 | /* Chip ID */ |
23 | #define IMX258_REG_CHIP_ID 0x0016 |
24 | #define IMX258_CHIP_ID 0x0258 |
25 | |
26 | /* V_TIMING internal */ |
27 | #define IMX258_VTS_30FPS 0x0c50 |
28 | #define IMX258_VTS_30FPS_2K 0x0638 |
29 | #define IMX258_VTS_30FPS_VGA 0x034c |
30 | #define IMX258_VTS_MAX 0xffff |
31 | |
32 | /*Frame Length Line*/ |
33 | #define IMX258_FLL_MIN 0x08a6 |
34 | #define IMX258_FLL_MAX 0xffff |
35 | #define IMX258_FLL_STEP 1 |
36 | #define IMX258_FLL_DEFAULT 0x0c98 |
37 | |
38 | /* HBLANK control - read only */ |
39 | #define IMX258_PPL_DEFAULT 5352 |
40 | |
41 | /* Exposure control */ |
42 | #define IMX258_REG_EXPOSURE 0x0202 |
43 | #define IMX258_EXPOSURE_MIN 4 |
44 | #define IMX258_EXPOSURE_STEP 1 |
45 | #define IMX258_EXPOSURE_DEFAULT 0x640 |
46 | #define IMX258_EXPOSURE_MAX 65535 |
47 | |
48 | /* Analog gain control */ |
49 | #define IMX258_REG_ANALOG_GAIN 0x0204 |
50 | #define IMX258_ANA_GAIN_MIN 0 |
51 | #define IMX258_ANA_GAIN_MAX 480 |
52 | #define IMX258_ANA_GAIN_STEP 1 |
53 | #define IMX258_ANA_GAIN_DEFAULT 0x0 |
54 | |
55 | /* Digital gain control */ |
56 | #define IMX258_REG_GR_DIGITAL_GAIN 0x020e |
57 | #define IMX258_REG_R_DIGITAL_GAIN 0x0210 |
58 | #define IMX258_REG_B_DIGITAL_GAIN 0x0212 |
59 | #define IMX258_REG_GB_DIGITAL_GAIN 0x0214 |
60 | #define IMX258_DGTL_GAIN_MIN 0 |
61 | #define IMX258_DGTL_GAIN_MAX 4096 /* Max = 0xFFF */ |
62 | #define IMX258_DGTL_GAIN_DEFAULT 1024 |
63 | #define IMX258_DGTL_GAIN_STEP 1 |
64 | |
65 | /* HDR control */ |
66 | #define IMX258_REG_HDR 0x0220 |
67 | #define IMX258_HDR_ON BIT(0) |
68 | #define IMX258_REG_HDR_RATIO 0x0222 |
69 | #define IMX258_HDR_RATIO_MIN 0 |
70 | #define IMX258_HDR_RATIO_MAX 5 |
71 | #define IMX258_HDR_RATIO_STEP 1 |
72 | #define IMX258_HDR_RATIO_DEFAULT 0x0 |
73 | |
74 | /* Test Pattern Control */ |
75 | #define IMX258_REG_TEST_PATTERN 0x0600 |
76 | |
77 | /* Orientation */ |
78 | #define REG_MIRROR_FLIP_CONTROL 0x0101 |
79 | #define REG_CONFIG_MIRROR_FLIP 0x03 |
80 | #define REG_CONFIG_FLIP_TEST_PATTERN 0x02 |
81 | |
82 | /* Input clock frequency in Hz */ |
83 | #define IMX258_INPUT_CLOCK_FREQ 19200000 |
84 | |
85 | struct imx258_reg { |
86 | u16 address; |
87 | u8 val; |
88 | }; |
89 | |
90 | struct imx258_reg_list { |
91 | u32 num_of_regs; |
92 | const struct imx258_reg *regs; |
93 | }; |
94 | |
95 | /* Link frequency config */ |
96 | struct imx258_link_freq_config { |
97 | u32 pixels_per_line; |
98 | |
99 | /* PLL registers for this link frequency */ |
100 | struct imx258_reg_list reg_list; |
101 | }; |
102 | |
103 | /* Mode : resolution and related config&values */ |
104 | struct imx258_mode { |
105 | /* Frame width */ |
106 | u32 width; |
107 | /* Frame height */ |
108 | u32 height; |
109 | |
110 | /* V-timing */ |
111 | u32 vts_def; |
112 | u32 vts_min; |
113 | |
114 | /* Index of Link frequency config to be used */ |
115 | u32 link_freq_index; |
116 | /* Default register values */ |
117 | struct imx258_reg_list reg_list; |
118 | }; |
119 | |
120 | /* 4208x3118 needs 1267Mbps/lane, 4 lanes */ |
121 | static const struct imx258_reg mipi_data_rate_1267mbps[] = { |
122 | { 0x0301, 0x05 }, |
123 | { 0x0303, 0x02 }, |
124 | { 0x0305, 0x03 }, |
125 | { 0x0306, 0x00 }, |
126 | { 0x0307, 0xC6 }, |
127 | { 0x0309, 0x0A }, |
128 | { 0x030B, 0x01 }, |
129 | { 0x030D, 0x02 }, |
130 | { 0x030E, 0x00 }, |
131 | { 0x030F, 0xD8 }, |
132 | { 0x0310, 0x00 }, |
133 | { 0x0820, 0x13 }, |
134 | { 0x0821, 0x4C }, |
135 | { 0x0822, 0xCC }, |
136 | { 0x0823, 0xCC }, |
137 | }; |
138 | |
139 | static const struct imx258_reg mipi_data_rate_640mbps[] = { |
140 | { 0x0301, 0x05 }, |
141 | { 0x0303, 0x02 }, |
142 | { 0x0305, 0x03 }, |
143 | { 0x0306, 0x00 }, |
144 | { 0x0307, 0x64 }, |
145 | { 0x0309, 0x0A }, |
146 | { 0x030B, 0x01 }, |
147 | { 0x030D, 0x02 }, |
148 | { 0x030E, 0x00 }, |
149 | { 0x030F, 0xD8 }, |
150 | { 0x0310, 0x00 }, |
151 | { 0x0820, 0x0A }, |
152 | { 0x0821, 0x00 }, |
153 | { 0x0822, 0x00 }, |
154 | { 0x0823, 0x00 }, |
155 | }; |
156 | |
157 | static const struct imx258_reg mode_4208x3118_regs[] = { |
158 | { 0x0136, 0x13 }, |
159 | { 0x0137, 0x33 }, |
160 | { 0x3051, 0x00 }, |
161 | { 0x3052, 0x00 }, |
162 | { 0x4E21, 0x14 }, |
163 | { 0x6B11, 0xCF }, |
164 | { 0x7FF0, 0x08 }, |
165 | { 0x7FF1, 0x0F }, |
166 | { 0x7FF2, 0x08 }, |
167 | { 0x7FF3, 0x1B }, |
168 | { 0x7FF4, 0x23 }, |
169 | { 0x7FF5, 0x60 }, |
170 | { 0x7FF6, 0x00 }, |
171 | { 0x7FF7, 0x01 }, |
172 | { 0x7FF8, 0x00 }, |
173 | { 0x7FF9, 0x78 }, |
174 | { 0x7FFA, 0x00 }, |
175 | { 0x7FFB, 0x00 }, |
176 | { 0x7FFC, 0x00 }, |
177 | { 0x7FFD, 0x00 }, |
178 | { 0x7FFE, 0x00 }, |
179 | { 0x7FFF, 0x03 }, |
180 | { 0x7F76, 0x03 }, |
181 | { 0x7F77, 0xFE }, |
182 | { 0x7FA8, 0x03 }, |
183 | { 0x7FA9, 0xFE }, |
184 | { 0x7B24, 0x81 }, |
185 | { 0x7B25, 0x00 }, |
186 | { 0x6564, 0x07 }, |
187 | { 0x6B0D, 0x41 }, |
188 | { 0x653D, 0x04 }, |
189 | { 0x6B05, 0x8C }, |
190 | { 0x6B06, 0xF9 }, |
191 | { 0x6B08, 0x65 }, |
192 | { 0x6B09, 0xFC }, |
193 | { 0x6B0A, 0xCF }, |
194 | { 0x6B0B, 0xD2 }, |
195 | { 0x6700, 0x0E }, |
196 | { 0x6707, 0x0E }, |
197 | { 0x9104, 0x00 }, |
198 | { 0x4648, 0x7F }, |
199 | { 0x7420, 0x00 }, |
200 | { 0x7421, 0x1C }, |
201 | { 0x7422, 0x00 }, |
202 | { 0x7423, 0xD7 }, |
203 | { 0x5F04, 0x00 }, |
204 | { 0x5F05, 0xED }, |
205 | { 0x0112, 0x0A }, |
206 | { 0x0113, 0x0A }, |
207 | { 0x0114, 0x03 }, |
208 | { 0x0342, 0x14 }, |
209 | { 0x0343, 0xE8 }, |
210 | { 0x0340, 0x0C }, |
211 | { 0x0341, 0x50 }, |
212 | { 0x0344, 0x00 }, |
213 | { 0x0345, 0x00 }, |
214 | { 0x0346, 0x00 }, |
215 | { 0x0347, 0x00 }, |
216 | { 0x0348, 0x10 }, |
217 | { 0x0349, 0x6F }, |
218 | { 0x034A, 0x0C }, |
219 | { 0x034B, 0x2E }, |
220 | { 0x0381, 0x01 }, |
221 | { 0x0383, 0x01 }, |
222 | { 0x0385, 0x01 }, |
223 | { 0x0387, 0x01 }, |
224 | { 0x0900, 0x00 }, |
225 | { 0x0901, 0x11 }, |
226 | { 0x0401, 0x00 }, |
227 | { 0x0404, 0x00 }, |
228 | { 0x0405, 0x10 }, |
229 | { 0x0408, 0x00 }, |
230 | { 0x0409, 0x00 }, |
231 | { 0x040A, 0x00 }, |
232 | { 0x040B, 0x00 }, |
233 | { 0x040C, 0x10 }, |
234 | { 0x040D, 0x70 }, |
235 | { 0x040E, 0x0C }, |
236 | { 0x040F, 0x30 }, |
237 | { 0x3038, 0x00 }, |
238 | { 0x303A, 0x00 }, |
239 | { 0x303B, 0x10 }, |
240 | { 0x300D, 0x00 }, |
241 | { 0x034C, 0x10 }, |
242 | { 0x034D, 0x70 }, |
243 | { 0x034E, 0x0C }, |
244 | { 0x034F, 0x30 }, |
245 | { 0x0350, 0x01 }, |
246 | { 0x0202, 0x0C }, |
247 | { 0x0203, 0x46 }, |
248 | { 0x0204, 0x00 }, |
249 | { 0x0205, 0x00 }, |
250 | { 0x020E, 0x01 }, |
251 | { 0x020F, 0x00 }, |
252 | { 0x0210, 0x01 }, |
253 | { 0x0211, 0x00 }, |
254 | { 0x0212, 0x01 }, |
255 | { 0x0213, 0x00 }, |
256 | { 0x0214, 0x01 }, |
257 | { 0x0215, 0x00 }, |
258 | { 0x7BCD, 0x00 }, |
259 | { 0x94DC, 0x20 }, |
260 | { 0x94DD, 0x20 }, |
261 | { 0x94DE, 0x20 }, |
262 | { 0x95DC, 0x20 }, |
263 | { 0x95DD, 0x20 }, |
264 | { 0x95DE, 0x20 }, |
265 | { 0x7FB0, 0x00 }, |
266 | { 0x9010, 0x3E }, |
267 | { 0x9419, 0x50 }, |
268 | { 0x941B, 0x50 }, |
269 | { 0x9519, 0x50 }, |
270 | { 0x951B, 0x50 }, |
271 | { 0x3030, 0x00 }, |
272 | { 0x3032, 0x00 }, |
273 | { 0x0220, 0x00 }, |
274 | }; |
275 | |
276 | static const struct imx258_reg mode_2104_1560_regs[] = { |
277 | { 0x0136, 0x13 }, |
278 | { 0x0137, 0x33 }, |
279 | { 0x3051, 0x00 }, |
280 | { 0x3052, 0x00 }, |
281 | { 0x4E21, 0x14 }, |
282 | { 0x6B11, 0xCF }, |
283 | { 0x7FF0, 0x08 }, |
284 | { 0x7FF1, 0x0F }, |
285 | { 0x7FF2, 0x08 }, |
286 | { 0x7FF3, 0x1B }, |
287 | { 0x7FF4, 0x23 }, |
288 | { 0x7FF5, 0x60 }, |
289 | { 0x7FF6, 0x00 }, |
290 | { 0x7FF7, 0x01 }, |
291 | { 0x7FF8, 0x00 }, |
292 | { 0x7FF9, 0x78 }, |
293 | { 0x7FFA, 0x00 }, |
294 | { 0x7FFB, 0x00 }, |
295 | { 0x7FFC, 0x00 }, |
296 | { 0x7FFD, 0x00 }, |
297 | { 0x7FFE, 0x00 }, |
298 | { 0x7FFF, 0x03 }, |
299 | { 0x7F76, 0x03 }, |
300 | { 0x7F77, 0xFE }, |
301 | { 0x7FA8, 0x03 }, |
302 | { 0x7FA9, 0xFE }, |
303 | { 0x7B24, 0x81 }, |
304 | { 0x7B25, 0x00 }, |
305 | { 0x6564, 0x07 }, |
306 | { 0x6B0D, 0x41 }, |
307 | { 0x653D, 0x04 }, |
308 | { 0x6B05, 0x8C }, |
309 | { 0x6B06, 0xF9 }, |
310 | { 0x6B08, 0x65 }, |
311 | { 0x6B09, 0xFC }, |
312 | { 0x6B0A, 0xCF }, |
313 | { 0x6B0B, 0xD2 }, |
314 | { 0x6700, 0x0E }, |
315 | { 0x6707, 0x0E }, |
316 | { 0x9104, 0x00 }, |
317 | { 0x4648, 0x7F }, |
318 | { 0x7420, 0x00 }, |
319 | { 0x7421, 0x1C }, |
320 | { 0x7422, 0x00 }, |
321 | { 0x7423, 0xD7 }, |
322 | { 0x5F04, 0x00 }, |
323 | { 0x5F05, 0xED }, |
324 | { 0x0112, 0x0A }, |
325 | { 0x0113, 0x0A }, |
326 | { 0x0114, 0x03 }, |
327 | { 0x0342, 0x14 }, |
328 | { 0x0343, 0xE8 }, |
329 | { 0x0340, 0x06 }, |
330 | { 0x0341, 0x38 }, |
331 | { 0x0344, 0x00 }, |
332 | { 0x0345, 0x00 }, |
333 | { 0x0346, 0x00 }, |
334 | { 0x0347, 0x00 }, |
335 | { 0x0348, 0x10 }, |
336 | { 0x0349, 0x6F }, |
337 | { 0x034A, 0x0C }, |
338 | { 0x034B, 0x2E }, |
339 | { 0x0381, 0x01 }, |
340 | { 0x0383, 0x01 }, |
341 | { 0x0385, 0x01 }, |
342 | { 0x0387, 0x01 }, |
343 | { 0x0900, 0x01 }, |
344 | { 0x0901, 0x12 }, |
345 | { 0x0401, 0x01 }, |
346 | { 0x0404, 0x00 }, |
347 | { 0x0405, 0x20 }, |
348 | { 0x0408, 0x00 }, |
349 | { 0x0409, 0x02 }, |
350 | { 0x040A, 0x00 }, |
351 | { 0x040B, 0x00 }, |
352 | { 0x040C, 0x10 }, |
353 | { 0x040D, 0x6A }, |
354 | { 0x040E, 0x06 }, |
355 | { 0x040F, 0x18 }, |
356 | { 0x3038, 0x00 }, |
357 | { 0x303A, 0x00 }, |
358 | { 0x303B, 0x10 }, |
359 | { 0x300D, 0x00 }, |
360 | { 0x034C, 0x08 }, |
361 | { 0x034D, 0x38 }, |
362 | { 0x034E, 0x06 }, |
363 | { 0x034F, 0x18 }, |
364 | { 0x0350, 0x01 }, |
365 | { 0x0202, 0x06 }, |
366 | { 0x0203, 0x2E }, |
367 | { 0x0204, 0x00 }, |
368 | { 0x0205, 0x00 }, |
369 | { 0x020E, 0x01 }, |
370 | { 0x020F, 0x00 }, |
371 | { 0x0210, 0x01 }, |
372 | { 0x0211, 0x00 }, |
373 | { 0x0212, 0x01 }, |
374 | { 0x0213, 0x00 }, |
375 | { 0x0214, 0x01 }, |
376 | { 0x0215, 0x00 }, |
377 | { 0x7BCD, 0x01 }, |
378 | { 0x94DC, 0x20 }, |
379 | { 0x94DD, 0x20 }, |
380 | { 0x94DE, 0x20 }, |
381 | { 0x95DC, 0x20 }, |
382 | { 0x95DD, 0x20 }, |
383 | { 0x95DE, 0x20 }, |
384 | { 0x7FB0, 0x00 }, |
385 | { 0x9010, 0x3E }, |
386 | { 0x9419, 0x50 }, |
387 | { 0x941B, 0x50 }, |
388 | { 0x9519, 0x50 }, |
389 | { 0x951B, 0x50 }, |
390 | { 0x3030, 0x00 }, |
391 | { 0x3032, 0x00 }, |
392 | { 0x0220, 0x00 }, |
393 | }; |
394 | |
395 | static const struct imx258_reg mode_1048_780_regs[] = { |
396 | { 0x0136, 0x13 }, |
397 | { 0x0137, 0x33 }, |
398 | { 0x3051, 0x00 }, |
399 | { 0x3052, 0x00 }, |
400 | { 0x4E21, 0x14 }, |
401 | { 0x6B11, 0xCF }, |
402 | { 0x7FF0, 0x08 }, |
403 | { 0x7FF1, 0x0F }, |
404 | { 0x7FF2, 0x08 }, |
405 | { 0x7FF3, 0x1B }, |
406 | { 0x7FF4, 0x23 }, |
407 | { 0x7FF5, 0x60 }, |
408 | { 0x7FF6, 0x00 }, |
409 | { 0x7FF7, 0x01 }, |
410 | { 0x7FF8, 0x00 }, |
411 | { 0x7FF9, 0x78 }, |
412 | { 0x7FFA, 0x00 }, |
413 | { 0x7FFB, 0x00 }, |
414 | { 0x7FFC, 0x00 }, |
415 | { 0x7FFD, 0x00 }, |
416 | { 0x7FFE, 0x00 }, |
417 | { 0x7FFF, 0x03 }, |
418 | { 0x7F76, 0x03 }, |
419 | { 0x7F77, 0xFE }, |
420 | { 0x7FA8, 0x03 }, |
421 | { 0x7FA9, 0xFE }, |
422 | { 0x7B24, 0x81 }, |
423 | { 0x7B25, 0x00 }, |
424 | { 0x6564, 0x07 }, |
425 | { 0x6B0D, 0x41 }, |
426 | { 0x653D, 0x04 }, |
427 | { 0x6B05, 0x8C }, |
428 | { 0x6B06, 0xF9 }, |
429 | { 0x6B08, 0x65 }, |
430 | { 0x6B09, 0xFC }, |
431 | { 0x6B0A, 0xCF }, |
432 | { 0x6B0B, 0xD2 }, |
433 | { 0x6700, 0x0E }, |
434 | { 0x6707, 0x0E }, |
435 | { 0x9104, 0x00 }, |
436 | { 0x4648, 0x7F }, |
437 | { 0x7420, 0x00 }, |
438 | { 0x7421, 0x1C }, |
439 | { 0x7422, 0x00 }, |
440 | { 0x7423, 0xD7 }, |
441 | { 0x5F04, 0x00 }, |
442 | { 0x5F05, 0xED }, |
443 | { 0x0112, 0x0A }, |
444 | { 0x0113, 0x0A }, |
445 | { 0x0114, 0x03 }, |
446 | { 0x0342, 0x14 }, |
447 | { 0x0343, 0xE8 }, |
448 | { 0x0340, 0x03 }, |
449 | { 0x0341, 0x4C }, |
450 | { 0x0344, 0x00 }, |
451 | { 0x0345, 0x00 }, |
452 | { 0x0346, 0x00 }, |
453 | { 0x0347, 0x00 }, |
454 | { 0x0348, 0x10 }, |
455 | { 0x0349, 0x6F }, |
456 | { 0x034A, 0x0C }, |
457 | { 0x034B, 0x2E }, |
458 | { 0x0381, 0x01 }, |
459 | { 0x0383, 0x01 }, |
460 | { 0x0385, 0x01 }, |
461 | { 0x0387, 0x01 }, |
462 | { 0x0900, 0x01 }, |
463 | { 0x0901, 0x14 }, |
464 | { 0x0401, 0x01 }, |
465 | { 0x0404, 0x00 }, |
466 | { 0x0405, 0x40 }, |
467 | { 0x0408, 0x00 }, |
468 | { 0x0409, 0x06 }, |
469 | { 0x040A, 0x00 }, |
470 | { 0x040B, 0x00 }, |
471 | { 0x040C, 0x10 }, |
472 | { 0x040D, 0x64 }, |
473 | { 0x040E, 0x03 }, |
474 | { 0x040F, 0x0C }, |
475 | { 0x3038, 0x00 }, |
476 | { 0x303A, 0x00 }, |
477 | { 0x303B, 0x10 }, |
478 | { 0x300D, 0x00 }, |
479 | { 0x034C, 0x04 }, |
480 | { 0x034D, 0x18 }, |
481 | { 0x034E, 0x03 }, |
482 | { 0x034F, 0x0C }, |
483 | { 0x0350, 0x01 }, |
484 | { 0x0202, 0x03 }, |
485 | { 0x0203, 0x42 }, |
486 | { 0x0204, 0x00 }, |
487 | { 0x0205, 0x00 }, |
488 | { 0x020E, 0x01 }, |
489 | { 0x020F, 0x00 }, |
490 | { 0x0210, 0x01 }, |
491 | { 0x0211, 0x00 }, |
492 | { 0x0212, 0x01 }, |
493 | { 0x0213, 0x00 }, |
494 | { 0x0214, 0x01 }, |
495 | { 0x0215, 0x00 }, |
496 | { 0x7BCD, 0x00 }, |
497 | { 0x94DC, 0x20 }, |
498 | { 0x94DD, 0x20 }, |
499 | { 0x94DE, 0x20 }, |
500 | { 0x95DC, 0x20 }, |
501 | { 0x95DD, 0x20 }, |
502 | { 0x95DE, 0x20 }, |
503 | { 0x7FB0, 0x00 }, |
504 | { 0x9010, 0x3E }, |
505 | { 0x9419, 0x50 }, |
506 | { 0x941B, 0x50 }, |
507 | { 0x9519, 0x50 }, |
508 | { 0x951B, 0x50 }, |
509 | { 0x3030, 0x00 }, |
510 | { 0x3032, 0x00 }, |
511 | { 0x0220, 0x00 }, |
512 | }; |
513 | |
514 | static const char * const [] = { |
515 | "Disabled" , |
516 | "Solid Colour" , |
517 | "Eight Vertical Colour Bars" , |
518 | "Colour Bars With Fade to Grey" , |
519 | "Pseudorandom Sequence (PN9)" , |
520 | }; |
521 | |
522 | /* Configurations for supported link frequencies */ |
523 | #define IMX258_LINK_FREQ_634MHZ 633600000ULL |
524 | #define IMX258_LINK_FREQ_320MHZ 320000000ULL |
525 | |
526 | enum { |
527 | IMX258_LINK_FREQ_1267MBPS, |
528 | IMX258_LINK_FREQ_640MBPS, |
529 | }; |
530 | |
531 | /* |
532 | * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample |
533 | * data rate => double data rate; number of lanes => 4; bits per pixel => 10 |
534 | */ |
535 | static u64 link_freq_to_pixel_rate(u64 f) |
536 | { |
537 | f *= 2 * 4; |
538 | do_div(f, 10); |
539 | |
540 | return f; |
541 | } |
542 | |
543 | /* Menu items for LINK_FREQ V4L2 control */ |
544 | static const s64 [] = { |
545 | IMX258_LINK_FREQ_634MHZ, |
546 | IMX258_LINK_FREQ_320MHZ, |
547 | }; |
548 | |
549 | /* Link frequency configs */ |
550 | static const struct imx258_link_freq_config link_freq_configs[] = { |
551 | [IMX258_LINK_FREQ_1267MBPS] = { |
552 | .pixels_per_line = IMX258_PPL_DEFAULT, |
553 | .reg_list = { |
554 | .num_of_regs = ARRAY_SIZE(mipi_data_rate_1267mbps), |
555 | .regs = mipi_data_rate_1267mbps, |
556 | } |
557 | }, |
558 | [IMX258_LINK_FREQ_640MBPS] = { |
559 | .pixels_per_line = IMX258_PPL_DEFAULT, |
560 | .reg_list = { |
561 | .num_of_regs = ARRAY_SIZE(mipi_data_rate_640mbps), |
562 | .regs = mipi_data_rate_640mbps, |
563 | } |
564 | }, |
565 | }; |
566 | |
567 | /* Mode configs */ |
568 | static const struct imx258_mode supported_modes[] = { |
569 | { |
570 | .width = 4208, |
571 | .height = 3118, |
572 | .vts_def = IMX258_VTS_30FPS, |
573 | .vts_min = IMX258_VTS_30FPS, |
574 | .reg_list = { |
575 | .num_of_regs = ARRAY_SIZE(mode_4208x3118_regs), |
576 | .regs = mode_4208x3118_regs, |
577 | }, |
578 | .link_freq_index = IMX258_LINK_FREQ_1267MBPS, |
579 | }, |
580 | { |
581 | .width = 2104, |
582 | .height = 1560, |
583 | .vts_def = IMX258_VTS_30FPS_2K, |
584 | .vts_min = IMX258_VTS_30FPS_2K, |
585 | .reg_list = { |
586 | .num_of_regs = ARRAY_SIZE(mode_2104_1560_regs), |
587 | .regs = mode_2104_1560_regs, |
588 | }, |
589 | .link_freq_index = IMX258_LINK_FREQ_640MBPS, |
590 | }, |
591 | { |
592 | .width = 1048, |
593 | .height = 780, |
594 | .vts_def = IMX258_VTS_30FPS_VGA, |
595 | .vts_min = IMX258_VTS_30FPS_VGA, |
596 | .reg_list = { |
597 | .num_of_regs = ARRAY_SIZE(mode_1048_780_regs), |
598 | .regs = mode_1048_780_regs, |
599 | }, |
600 | .link_freq_index = IMX258_LINK_FREQ_640MBPS, |
601 | }, |
602 | }; |
603 | |
604 | struct imx258 { |
605 | struct v4l2_subdev sd; |
606 | struct media_pad pad; |
607 | |
608 | struct v4l2_ctrl_handler ctrl_handler; |
609 | /* V4L2 Controls */ |
610 | struct v4l2_ctrl *link_freq; |
611 | struct v4l2_ctrl *pixel_rate; |
612 | struct v4l2_ctrl *vblank; |
613 | struct v4l2_ctrl *hblank; |
614 | struct v4l2_ctrl *exposure; |
615 | |
616 | /* Current mode */ |
617 | const struct imx258_mode *cur_mode; |
618 | |
619 | /* |
620 | * Mutex for serialized access: |
621 | * Protect sensor module set pad format and start/stop streaming safely. |
622 | */ |
623 | struct mutex mutex; |
624 | |
625 | struct clk *clk; |
626 | }; |
627 | |
628 | static inline struct imx258 *to_imx258(struct v4l2_subdev *_sd) |
629 | { |
630 | return container_of(_sd, struct imx258, sd); |
631 | } |
632 | |
633 | /* Read registers up to 2 at a time */ |
634 | static int imx258_read_reg(struct imx258 *imx258, u16 reg, u32 len, u32 *val) |
635 | { |
636 | struct i2c_client *client = v4l2_get_subdevdata(sd: &imx258->sd); |
637 | struct i2c_msg msgs[2]; |
638 | u8 addr_buf[2] = { reg >> 8, reg & 0xff }; |
639 | u8 data_buf[4] = { 0, }; |
640 | int ret; |
641 | |
642 | if (len > 4) |
643 | return -EINVAL; |
644 | |
645 | /* Write register address */ |
646 | msgs[0].addr = client->addr; |
647 | msgs[0].flags = 0; |
648 | msgs[0].len = ARRAY_SIZE(addr_buf); |
649 | msgs[0].buf = addr_buf; |
650 | |
651 | /* Read data from register */ |
652 | msgs[1].addr = client->addr; |
653 | msgs[1].flags = I2C_M_RD; |
654 | msgs[1].len = len; |
655 | msgs[1].buf = &data_buf[4 - len]; |
656 | |
657 | ret = i2c_transfer(adap: client->adapter, msgs, ARRAY_SIZE(msgs)); |
658 | if (ret != ARRAY_SIZE(msgs)) |
659 | return -EIO; |
660 | |
661 | *val = get_unaligned_be32(p: data_buf); |
662 | |
663 | return 0; |
664 | } |
665 | |
666 | /* Write registers up to 2 at a time */ |
667 | static int imx258_write_reg(struct imx258 *imx258, u16 reg, u32 len, u32 val) |
668 | { |
669 | struct i2c_client *client = v4l2_get_subdevdata(sd: &imx258->sd); |
670 | u8 buf[6]; |
671 | |
672 | if (len > 4) |
673 | return -EINVAL; |
674 | |
675 | put_unaligned_be16(val: reg, p: buf); |
676 | put_unaligned_be32(val: val << (8 * (4 - len)), p: buf + 2); |
677 | if (i2c_master_send(client, buf, count: len + 2) != len + 2) |
678 | return -EIO; |
679 | |
680 | return 0; |
681 | } |
682 | |
683 | /* Write a list of registers */ |
684 | static int imx258_write_regs(struct imx258 *imx258, |
685 | const struct imx258_reg *regs, u32 len) |
686 | { |
687 | struct i2c_client *client = v4l2_get_subdevdata(sd: &imx258->sd); |
688 | unsigned int i; |
689 | int ret; |
690 | |
691 | for (i = 0; i < len; i++) { |
692 | ret = imx258_write_reg(imx258, reg: regs[i].address, len: 1, |
693 | val: regs[i].val); |
694 | if (ret) { |
695 | dev_err_ratelimited( |
696 | &client->dev, |
697 | "Failed to write reg 0x%4.4x. error = %d\n" , |
698 | regs[i].address, ret); |
699 | |
700 | return ret; |
701 | } |
702 | } |
703 | |
704 | return 0; |
705 | } |
706 | |
707 | /* Open sub-device */ |
708 | static int imx258_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) |
709 | { |
710 | struct v4l2_mbus_framefmt *try_fmt = |
711 | v4l2_subdev_state_get_format(fh->state, 0); |
712 | |
713 | /* Initialize try_fmt */ |
714 | try_fmt->width = supported_modes[0].width; |
715 | try_fmt->height = supported_modes[0].height; |
716 | try_fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; |
717 | try_fmt->field = V4L2_FIELD_NONE; |
718 | |
719 | return 0; |
720 | } |
721 | |
722 | static int imx258_update_digital_gain(struct imx258 *imx258, u32 len, u32 val) |
723 | { |
724 | int ret; |
725 | |
726 | ret = imx258_write_reg(imx258, IMX258_REG_GR_DIGITAL_GAIN, |
727 | IMX258_REG_VALUE_16BIT, |
728 | val); |
729 | if (ret) |
730 | return ret; |
731 | ret = imx258_write_reg(imx258, IMX258_REG_GB_DIGITAL_GAIN, |
732 | IMX258_REG_VALUE_16BIT, |
733 | val); |
734 | if (ret) |
735 | return ret; |
736 | ret = imx258_write_reg(imx258, IMX258_REG_R_DIGITAL_GAIN, |
737 | IMX258_REG_VALUE_16BIT, |
738 | val); |
739 | if (ret) |
740 | return ret; |
741 | ret = imx258_write_reg(imx258, IMX258_REG_B_DIGITAL_GAIN, |
742 | IMX258_REG_VALUE_16BIT, |
743 | val); |
744 | if (ret) |
745 | return ret; |
746 | return 0; |
747 | } |
748 | |
749 | static int imx258_set_ctrl(struct v4l2_ctrl *ctrl) |
750 | { |
751 | struct imx258 *imx258 = |
752 | container_of(ctrl->handler, struct imx258, ctrl_handler); |
753 | struct i2c_client *client = v4l2_get_subdevdata(sd: &imx258->sd); |
754 | int ret = 0; |
755 | |
756 | /* |
757 | * Applying V4L2 control value only happens |
758 | * when power is up for streaming |
759 | */ |
760 | if (pm_runtime_get_if_in_use(dev: &client->dev) == 0) |
761 | return 0; |
762 | |
763 | switch (ctrl->id) { |
764 | case V4L2_CID_ANALOGUE_GAIN: |
765 | ret = imx258_write_reg(imx258, IMX258_REG_ANALOG_GAIN, |
766 | IMX258_REG_VALUE_16BIT, |
767 | val: ctrl->val); |
768 | break; |
769 | case V4L2_CID_EXPOSURE: |
770 | ret = imx258_write_reg(imx258, IMX258_REG_EXPOSURE, |
771 | IMX258_REG_VALUE_16BIT, |
772 | val: ctrl->val); |
773 | break; |
774 | case V4L2_CID_DIGITAL_GAIN: |
775 | ret = imx258_update_digital_gain(imx258, IMX258_REG_VALUE_16BIT, |
776 | val: ctrl->val); |
777 | break; |
778 | case V4L2_CID_TEST_PATTERN: |
779 | ret = imx258_write_reg(imx258, IMX258_REG_TEST_PATTERN, |
780 | IMX258_REG_VALUE_16BIT, |
781 | val: ctrl->val); |
782 | ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL, |
783 | IMX258_REG_VALUE_08BIT, |
784 | val: !ctrl->val ? REG_CONFIG_MIRROR_FLIP : |
785 | REG_CONFIG_FLIP_TEST_PATTERN); |
786 | break; |
787 | case V4L2_CID_WIDE_DYNAMIC_RANGE: |
788 | if (!ctrl->val) { |
789 | ret = imx258_write_reg(imx258, IMX258_REG_HDR, |
790 | IMX258_REG_VALUE_08BIT, |
791 | IMX258_HDR_RATIO_MIN); |
792 | } else { |
793 | ret = imx258_write_reg(imx258, IMX258_REG_HDR, |
794 | IMX258_REG_VALUE_08BIT, |
795 | IMX258_HDR_ON); |
796 | if (ret) |
797 | break; |
798 | ret = imx258_write_reg(imx258, IMX258_REG_HDR_RATIO, |
799 | IMX258_REG_VALUE_08BIT, |
800 | BIT(IMX258_HDR_RATIO_MAX)); |
801 | } |
802 | break; |
803 | default: |
804 | dev_info(&client->dev, |
805 | "ctrl(id:0x%x,val:0x%x) is not handled\n" , |
806 | ctrl->id, ctrl->val); |
807 | ret = -EINVAL; |
808 | break; |
809 | } |
810 | |
811 | pm_runtime_put(dev: &client->dev); |
812 | |
813 | return ret; |
814 | } |
815 | |
816 | static const struct v4l2_ctrl_ops imx258_ctrl_ops = { |
817 | .s_ctrl = imx258_set_ctrl, |
818 | }; |
819 | |
820 | static int imx258_enum_mbus_code(struct v4l2_subdev *sd, |
821 | struct v4l2_subdev_state *sd_state, |
822 | struct v4l2_subdev_mbus_code_enum *code) |
823 | { |
824 | /* Only one bayer order(GRBG) is supported */ |
825 | if (code->index > 0) |
826 | return -EINVAL; |
827 | |
828 | code->code = MEDIA_BUS_FMT_SGRBG10_1X10; |
829 | |
830 | return 0; |
831 | } |
832 | |
833 | static int imx258_enum_frame_size(struct v4l2_subdev *sd, |
834 | struct v4l2_subdev_state *sd_state, |
835 | struct v4l2_subdev_frame_size_enum *fse) |
836 | { |
837 | if (fse->index >= ARRAY_SIZE(supported_modes)) |
838 | return -EINVAL; |
839 | |
840 | if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10) |
841 | return -EINVAL; |
842 | |
843 | fse->min_width = supported_modes[fse->index].width; |
844 | fse->max_width = fse->min_width; |
845 | fse->min_height = supported_modes[fse->index].height; |
846 | fse->max_height = fse->min_height; |
847 | |
848 | return 0; |
849 | } |
850 | |
851 | static void imx258_update_pad_format(const struct imx258_mode *mode, |
852 | struct v4l2_subdev_format *fmt) |
853 | { |
854 | fmt->format.width = mode->width; |
855 | fmt->format.height = mode->height; |
856 | fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10; |
857 | fmt->format.field = V4L2_FIELD_NONE; |
858 | } |
859 | |
860 | static int __imx258_get_pad_format(struct imx258 *imx258, |
861 | struct v4l2_subdev_state *sd_state, |
862 | struct v4l2_subdev_format *fmt) |
863 | { |
864 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) |
865 | fmt->format = *v4l2_subdev_state_get_format(sd_state, |
866 | fmt->pad); |
867 | else |
868 | imx258_update_pad_format(mode: imx258->cur_mode, fmt); |
869 | |
870 | return 0; |
871 | } |
872 | |
873 | static int imx258_get_pad_format(struct v4l2_subdev *sd, |
874 | struct v4l2_subdev_state *sd_state, |
875 | struct v4l2_subdev_format *fmt) |
876 | { |
877 | struct imx258 *imx258 = to_imx258(sd: sd); |
878 | int ret; |
879 | |
880 | mutex_lock(&imx258->mutex); |
881 | ret = __imx258_get_pad_format(imx258, sd_state, fmt); |
882 | mutex_unlock(lock: &imx258->mutex); |
883 | |
884 | return ret; |
885 | } |
886 | |
887 | static int imx258_set_pad_format(struct v4l2_subdev *sd, |
888 | struct v4l2_subdev_state *sd_state, |
889 | struct v4l2_subdev_format *fmt) |
890 | { |
891 | struct imx258 *imx258 = to_imx258(sd: sd); |
892 | const struct imx258_mode *mode; |
893 | struct v4l2_mbus_framefmt *framefmt; |
894 | s32 vblank_def; |
895 | s32 vblank_min; |
896 | s64 h_blank; |
897 | s64 pixel_rate; |
898 | s64 link_freq; |
899 | |
900 | mutex_lock(&imx258->mutex); |
901 | |
902 | /* Only one raw bayer(GBRG) order is supported */ |
903 | fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10; |
904 | |
905 | mode = v4l2_find_nearest_size(supported_modes, |
906 | ARRAY_SIZE(supported_modes), width, height, |
907 | fmt->format.width, fmt->format.height); |
908 | imx258_update_pad_format(mode, fmt); |
909 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { |
910 | framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); |
911 | *framefmt = fmt->format; |
912 | } else { |
913 | imx258->cur_mode = mode; |
914 | __v4l2_ctrl_s_ctrl(ctrl: imx258->link_freq, val: mode->link_freq_index); |
915 | |
916 | link_freq = link_freq_menu_items[mode->link_freq_index]; |
917 | pixel_rate = link_freq_to_pixel_rate(f: link_freq); |
918 | __v4l2_ctrl_s_ctrl_int64(ctrl: imx258->pixel_rate, val: pixel_rate); |
919 | /* Update limits and set FPS to default */ |
920 | vblank_def = imx258->cur_mode->vts_def - |
921 | imx258->cur_mode->height; |
922 | vblank_min = imx258->cur_mode->vts_min - |
923 | imx258->cur_mode->height; |
924 | __v4l2_ctrl_modify_range( |
925 | ctrl: imx258->vblank, min: vblank_min, |
926 | IMX258_VTS_MAX - imx258->cur_mode->height, step: 1, |
927 | def: vblank_def); |
928 | __v4l2_ctrl_s_ctrl(ctrl: imx258->vblank, val: vblank_def); |
929 | h_blank = |
930 | link_freq_configs[mode->link_freq_index].pixels_per_line |
931 | - imx258->cur_mode->width; |
932 | __v4l2_ctrl_modify_range(ctrl: imx258->hblank, min: h_blank, |
933 | max: h_blank, step: 1, def: h_blank); |
934 | } |
935 | |
936 | mutex_unlock(lock: &imx258->mutex); |
937 | |
938 | return 0; |
939 | } |
940 | |
941 | /* Start streaming */ |
942 | static int imx258_start_streaming(struct imx258 *imx258) |
943 | { |
944 | struct i2c_client *client = v4l2_get_subdevdata(sd: &imx258->sd); |
945 | const struct imx258_reg_list *reg_list; |
946 | int ret, link_freq_index; |
947 | |
948 | /* Setup PLL */ |
949 | link_freq_index = imx258->cur_mode->link_freq_index; |
950 | reg_list = &link_freq_configs[link_freq_index].reg_list; |
951 | ret = imx258_write_regs(imx258, regs: reg_list->regs, len: reg_list->num_of_regs); |
952 | if (ret) { |
953 | dev_err(&client->dev, "%s failed to set plls\n" , __func__); |
954 | return ret; |
955 | } |
956 | |
957 | /* Apply default values of current mode */ |
958 | reg_list = &imx258->cur_mode->reg_list; |
959 | ret = imx258_write_regs(imx258, regs: reg_list->regs, len: reg_list->num_of_regs); |
960 | if (ret) { |
961 | dev_err(&client->dev, "%s failed to set mode\n" , __func__); |
962 | return ret; |
963 | } |
964 | |
965 | /* Set Orientation be 180 degree */ |
966 | ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL, |
967 | IMX258_REG_VALUE_08BIT, REG_CONFIG_MIRROR_FLIP); |
968 | if (ret) { |
969 | dev_err(&client->dev, "%s failed to set orientation\n" , |
970 | __func__); |
971 | return ret; |
972 | } |
973 | |
974 | /* Apply customized values from user */ |
975 | ret = __v4l2_ctrl_handler_setup(hdl: imx258->sd.ctrl_handler); |
976 | if (ret) |
977 | return ret; |
978 | |
979 | /* set stream on register */ |
980 | return imx258_write_reg(imx258, IMX258_REG_MODE_SELECT, |
981 | IMX258_REG_VALUE_08BIT, |
982 | IMX258_MODE_STREAMING); |
983 | } |
984 | |
985 | /* Stop streaming */ |
986 | static int imx258_stop_streaming(struct imx258 *imx258) |
987 | { |
988 | struct i2c_client *client = v4l2_get_subdevdata(sd: &imx258->sd); |
989 | int ret; |
990 | |
991 | /* set stream off register */ |
992 | ret = imx258_write_reg(imx258, IMX258_REG_MODE_SELECT, |
993 | IMX258_REG_VALUE_08BIT, IMX258_MODE_STANDBY); |
994 | if (ret) |
995 | dev_err(&client->dev, "%s failed to set stream\n" , __func__); |
996 | |
997 | /* |
998 | * Return success even if it was an error, as there is nothing the |
999 | * caller can do about it. |
1000 | */ |
1001 | return 0; |
1002 | } |
1003 | |
1004 | static int imx258_power_on(struct device *dev) |
1005 | { |
1006 | struct v4l2_subdev *sd = dev_get_drvdata(dev); |
1007 | struct imx258 *imx258 = to_imx258(sd: sd); |
1008 | int ret; |
1009 | |
1010 | ret = clk_prepare_enable(clk: imx258->clk); |
1011 | if (ret) |
1012 | dev_err(dev, "failed to enable clock\n" ); |
1013 | |
1014 | return ret; |
1015 | } |
1016 | |
1017 | static int imx258_power_off(struct device *dev) |
1018 | { |
1019 | struct v4l2_subdev *sd = dev_get_drvdata(dev); |
1020 | struct imx258 *imx258 = to_imx258(sd: sd); |
1021 | |
1022 | clk_disable_unprepare(clk: imx258->clk); |
1023 | |
1024 | return 0; |
1025 | } |
1026 | |
1027 | static int imx258_set_stream(struct v4l2_subdev *sd, int enable) |
1028 | { |
1029 | struct imx258 *imx258 = to_imx258(sd: sd); |
1030 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
1031 | int ret = 0; |
1032 | |
1033 | mutex_lock(&imx258->mutex); |
1034 | |
1035 | if (enable) { |
1036 | ret = pm_runtime_resume_and_get(dev: &client->dev); |
1037 | if (ret < 0) |
1038 | goto err_unlock; |
1039 | |
1040 | /* |
1041 | * Apply default & customized values |
1042 | * and then start streaming. |
1043 | */ |
1044 | ret = imx258_start_streaming(imx258); |
1045 | if (ret) |
1046 | goto err_rpm_put; |
1047 | } else { |
1048 | imx258_stop_streaming(imx258); |
1049 | pm_runtime_put(dev: &client->dev); |
1050 | } |
1051 | |
1052 | mutex_unlock(lock: &imx258->mutex); |
1053 | |
1054 | return ret; |
1055 | |
1056 | err_rpm_put: |
1057 | pm_runtime_put(dev: &client->dev); |
1058 | err_unlock: |
1059 | mutex_unlock(lock: &imx258->mutex); |
1060 | |
1061 | return ret; |
1062 | } |
1063 | |
1064 | /* Verify chip ID */ |
1065 | static int imx258_identify_module(struct imx258 *imx258) |
1066 | { |
1067 | struct i2c_client *client = v4l2_get_subdevdata(sd: &imx258->sd); |
1068 | int ret; |
1069 | u32 val; |
1070 | |
1071 | ret = imx258_read_reg(imx258, IMX258_REG_CHIP_ID, |
1072 | IMX258_REG_VALUE_16BIT, val: &val); |
1073 | if (ret) { |
1074 | dev_err(&client->dev, "failed to read chip id %x\n" , |
1075 | IMX258_CHIP_ID); |
1076 | return ret; |
1077 | } |
1078 | |
1079 | if (val != IMX258_CHIP_ID) { |
1080 | dev_err(&client->dev, "chip id mismatch: %x!=%x\n" , |
1081 | IMX258_CHIP_ID, val); |
1082 | return -EIO; |
1083 | } |
1084 | |
1085 | return 0; |
1086 | } |
1087 | |
1088 | static const struct v4l2_subdev_video_ops imx258_video_ops = { |
1089 | .s_stream = imx258_set_stream, |
1090 | }; |
1091 | |
1092 | static const struct v4l2_subdev_pad_ops imx258_pad_ops = { |
1093 | .enum_mbus_code = imx258_enum_mbus_code, |
1094 | .get_fmt = imx258_get_pad_format, |
1095 | .set_fmt = imx258_set_pad_format, |
1096 | .enum_frame_size = imx258_enum_frame_size, |
1097 | }; |
1098 | |
1099 | static const struct v4l2_subdev_ops imx258_subdev_ops = { |
1100 | .video = &imx258_video_ops, |
1101 | .pad = &imx258_pad_ops, |
1102 | }; |
1103 | |
1104 | static const struct v4l2_subdev_internal_ops imx258_internal_ops = { |
1105 | .open = imx258_open, |
1106 | }; |
1107 | |
1108 | /* Initialize control handlers */ |
1109 | static int imx258_init_controls(struct imx258 *imx258) |
1110 | { |
1111 | struct i2c_client *client = v4l2_get_subdevdata(sd: &imx258->sd); |
1112 | struct v4l2_fwnode_device_properties props; |
1113 | struct v4l2_ctrl_handler *ctrl_hdlr; |
1114 | struct v4l2_ctrl *vflip, *hflip; |
1115 | s64 vblank_def; |
1116 | s64 vblank_min; |
1117 | s64 pixel_rate_min; |
1118 | s64 pixel_rate_max; |
1119 | int ret; |
1120 | |
1121 | ctrl_hdlr = &imx258->ctrl_handler; |
1122 | ret = v4l2_ctrl_handler_init(ctrl_hdlr, 13); |
1123 | if (ret) |
1124 | return ret; |
1125 | |
1126 | mutex_init(&imx258->mutex); |
1127 | ctrl_hdlr->lock = &imx258->mutex; |
1128 | imx258->link_freq = v4l2_ctrl_new_int_menu(hdl: ctrl_hdlr, |
1129 | ops: &imx258_ctrl_ops, |
1130 | V4L2_CID_LINK_FREQ, |
1131 | ARRAY_SIZE(link_freq_menu_items) - 1, |
1132 | def: 0, |
1133 | qmenu_int: link_freq_menu_items); |
1134 | |
1135 | if (imx258->link_freq) |
1136 | imx258->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
1137 | |
1138 | /* The driver only supports one bayer order and flips by default. */ |
1139 | hflip = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, |
1140 | V4L2_CID_HFLIP, min: 1, max: 1, step: 1, def: 1); |
1141 | if (hflip) |
1142 | hflip->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
1143 | |
1144 | vflip = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, |
1145 | V4L2_CID_VFLIP, min: 1, max: 1, step: 1, def: 1); |
1146 | if (vflip) |
1147 | vflip->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
1148 | |
1149 | pixel_rate_max = link_freq_to_pixel_rate(f: link_freq_menu_items[0]); |
1150 | pixel_rate_min = link_freq_to_pixel_rate(f: link_freq_menu_items[1]); |
1151 | /* By default, PIXEL_RATE is read only */ |
1152 | imx258->pixel_rate = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, |
1153 | V4L2_CID_PIXEL_RATE, |
1154 | min: pixel_rate_min, max: pixel_rate_max, |
1155 | step: 1, def: pixel_rate_max); |
1156 | |
1157 | |
1158 | vblank_def = imx258->cur_mode->vts_def - imx258->cur_mode->height; |
1159 | vblank_min = imx258->cur_mode->vts_min - imx258->cur_mode->height; |
1160 | imx258->vblank = v4l2_ctrl_new_std( |
1161 | hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, V4L2_CID_VBLANK, |
1162 | min: vblank_min, |
1163 | IMX258_VTS_MAX - imx258->cur_mode->height, step: 1, |
1164 | def: vblank_def); |
1165 | |
1166 | if (imx258->vblank) |
1167 | imx258->vblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
1168 | |
1169 | imx258->hblank = v4l2_ctrl_new_std( |
1170 | hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, V4L2_CID_HBLANK, |
1171 | IMX258_PPL_DEFAULT - imx258->cur_mode->width, |
1172 | IMX258_PPL_DEFAULT - imx258->cur_mode->width, |
1173 | step: 1, |
1174 | IMX258_PPL_DEFAULT - imx258->cur_mode->width); |
1175 | |
1176 | if (imx258->hblank) |
1177 | imx258->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
1178 | |
1179 | imx258->exposure = v4l2_ctrl_new_std( |
1180 | hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, |
1181 | V4L2_CID_EXPOSURE, IMX258_EXPOSURE_MIN, |
1182 | IMX258_EXPOSURE_MAX, IMX258_EXPOSURE_STEP, |
1183 | IMX258_EXPOSURE_DEFAULT); |
1184 | |
1185 | v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, |
1186 | IMX258_ANA_GAIN_MIN, IMX258_ANA_GAIN_MAX, |
1187 | IMX258_ANA_GAIN_STEP, IMX258_ANA_GAIN_DEFAULT); |
1188 | |
1189 | v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, V4L2_CID_DIGITAL_GAIN, |
1190 | IMX258_DGTL_GAIN_MIN, IMX258_DGTL_GAIN_MAX, |
1191 | IMX258_DGTL_GAIN_STEP, |
1192 | IMX258_DGTL_GAIN_DEFAULT); |
1193 | |
1194 | v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, V4L2_CID_WIDE_DYNAMIC_RANGE, |
1195 | min: 0, max: 1, step: 1, IMX258_HDR_RATIO_DEFAULT); |
1196 | |
1197 | v4l2_ctrl_new_std_menu_items(hdl: ctrl_hdlr, ops: &imx258_ctrl_ops, |
1198 | V4L2_CID_TEST_PATTERN, |
1199 | ARRAY_SIZE(imx258_test_pattern_menu) - 1, |
1200 | mask: 0, def: 0, qmenu: imx258_test_pattern_menu); |
1201 | |
1202 | if (ctrl_hdlr->error) { |
1203 | ret = ctrl_hdlr->error; |
1204 | dev_err(&client->dev, "%s control init failed (%d)\n" , |
1205 | __func__, ret); |
1206 | goto error; |
1207 | } |
1208 | |
1209 | ret = v4l2_fwnode_device_parse(dev: &client->dev, props: &props); |
1210 | if (ret) |
1211 | goto error; |
1212 | |
1213 | ret = v4l2_ctrl_new_fwnode_properties(hdl: ctrl_hdlr, ctrl_ops: &imx258_ctrl_ops, |
1214 | p: &props); |
1215 | if (ret) |
1216 | goto error; |
1217 | |
1218 | imx258->sd.ctrl_handler = ctrl_hdlr; |
1219 | |
1220 | return 0; |
1221 | |
1222 | error: |
1223 | v4l2_ctrl_handler_free(hdl: ctrl_hdlr); |
1224 | mutex_destroy(lock: &imx258->mutex); |
1225 | |
1226 | return ret; |
1227 | } |
1228 | |
1229 | static void imx258_free_controls(struct imx258 *imx258) |
1230 | { |
1231 | v4l2_ctrl_handler_free(hdl: imx258->sd.ctrl_handler); |
1232 | mutex_destroy(lock: &imx258->mutex); |
1233 | } |
1234 | |
1235 | static int imx258_probe(struct i2c_client *client) |
1236 | { |
1237 | struct imx258 *imx258; |
1238 | int ret; |
1239 | u32 val = 0; |
1240 | |
1241 | imx258 = devm_kzalloc(dev: &client->dev, size: sizeof(*imx258), GFP_KERNEL); |
1242 | if (!imx258) |
1243 | return -ENOMEM; |
1244 | |
1245 | imx258->clk = devm_clk_get_optional(dev: &client->dev, NULL); |
1246 | if (IS_ERR(ptr: imx258->clk)) |
1247 | return dev_err_probe(dev: &client->dev, err: PTR_ERR(ptr: imx258->clk), |
1248 | fmt: "error getting clock\n" ); |
1249 | if (!imx258->clk) { |
1250 | dev_dbg(&client->dev, |
1251 | "no clock provided, using clock-frequency property\n" ); |
1252 | |
1253 | device_property_read_u32(dev: &client->dev, propname: "clock-frequency" , val: &val); |
1254 | } else { |
1255 | val = clk_get_rate(clk: imx258->clk); |
1256 | } |
1257 | if (val != IMX258_INPUT_CLOCK_FREQ) { |
1258 | dev_err(&client->dev, "input clock frequency not supported\n" ); |
1259 | return -EINVAL; |
1260 | } |
1261 | |
1262 | /* Initialize subdev */ |
1263 | v4l2_i2c_subdev_init(sd: &imx258->sd, client, ops: &imx258_subdev_ops); |
1264 | |
1265 | /* Will be powered off via pm_runtime_idle */ |
1266 | ret = imx258_power_on(dev: &client->dev); |
1267 | if (ret) |
1268 | return ret; |
1269 | |
1270 | /* Check module identity */ |
1271 | ret = imx258_identify_module(imx258); |
1272 | if (ret) |
1273 | goto error_identify; |
1274 | |
1275 | /* Set default mode to max resolution */ |
1276 | imx258->cur_mode = &supported_modes[0]; |
1277 | |
1278 | ret = imx258_init_controls(imx258); |
1279 | if (ret) |
1280 | goto error_identify; |
1281 | |
1282 | /* Initialize subdev */ |
1283 | imx258->sd.internal_ops = &imx258_internal_ops; |
1284 | imx258->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
1285 | imx258->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; |
1286 | |
1287 | /* Initialize source pad */ |
1288 | imx258->pad.flags = MEDIA_PAD_FL_SOURCE; |
1289 | |
1290 | ret = media_entity_pads_init(entity: &imx258->sd.entity, num_pads: 1, pads: &imx258->pad); |
1291 | if (ret) |
1292 | goto error_handler_free; |
1293 | |
1294 | ret = v4l2_async_register_subdev_sensor(sd: &imx258->sd); |
1295 | if (ret < 0) |
1296 | goto error_media_entity; |
1297 | |
1298 | pm_runtime_set_active(dev: &client->dev); |
1299 | pm_runtime_enable(dev: &client->dev); |
1300 | pm_runtime_idle(dev: &client->dev); |
1301 | |
1302 | return 0; |
1303 | |
1304 | error_media_entity: |
1305 | media_entity_cleanup(entity: &imx258->sd.entity); |
1306 | |
1307 | error_handler_free: |
1308 | imx258_free_controls(imx258); |
1309 | |
1310 | error_identify: |
1311 | imx258_power_off(dev: &client->dev); |
1312 | |
1313 | return ret; |
1314 | } |
1315 | |
1316 | static void imx258_remove(struct i2c_client *client) |
1317 | { |
1318 | struct v4l2_subdev *sd = i2c_get_clientdata(client); |
1319 | struct imx258 *imx258 = to_imx258(sd: sd); |
1320 | |
1321 | v4l2_async_unregister_subdev(sd); |
1322 | media_entity_cleanup(entity: &sd->entity); |
1323 | imx258_free_controls(imx258); |
1324 | |
1325 | pm_runtime_disable(dev: &client->dev); |
1326 | if (!pm_runtime_status_suspended(dev: &client->dev)) |
1327 | imx258_power_off(dev: &client->dev); |
1328 | pm_runtime_set_suspended(dev: &client->dev); |
1329 | } |
1330 | |
1331 | static const struct dev_pm_ops imx258_pm_ops = { |
1332 | SET_RUNTIME_PM_OPS(imx258_power_off, imx258_power_on, NULL) |
1333 | }; |
1334 | |
1335 | #ifdef CONFIG_ACPI |
1336 | static const struct acpi_device_id imx258_acpi_ids[] = { |
1337 | { "SONY258A" }, |
1338 | { /* sentinel */ } |
1339 | }; |
1340 | |
1341 | MODULE_DEVICE_TABLE(acpi, imx258_acpi_ids); |
1342 | #endif |
1343 | |
1344 | static const struct of_device_id imx258_dt_ids[] = { |
1345 | { .compatible = "sony,imx258" }, |
1346 | { /* sentinel */ } |
1347 | }; |
1348 | MODULE_DEVICE_TABLE(of, imx258_dt_ids); |
1349 | |
1350 | static struct i2c_driver imx258_i2c_driver = { |
1351 | .driver = { |
1352 | .name = "imx258" , |
1353 | .pm = &imx258_pm_ops, |
1354 | .acpi_match_table = ACPI_PTR(imx258_acpi_ids), |
1355 | .of_match_table = imx258_dt_ids, |
1356 | }, |
1357 | .probe = imx258_probe, |
1358 | .remove = imx258_remove, |
1359 | }; |
1360 | |
1361 | module_i2c_driver(imx258_i2c_driver); |
1362 | |
1363 | MODULE_AUTHOR("Yeh, Andy <andy.yeh@intel.com>" ); |
1364 | MODULE_AUTHOR("Chiang, Alan" ); |
1365 | MODULE_AUTHOR("Chen, Jason" ); |
1366 | MODULE_DESCRIPTION("Sony IMX258 sensor driver" ); |
1367 | MODULE_LICENSE("GPL v2" ); |
1368 | |