1 | // SPDX-License-Identifier: GPL-2.0-only |
---|---|
2 | /* |
3 | * Sony imx334 sensor driver |
4 | * |
5 | * Copyright (C) 2021 Intel Corporation |
6 | */ |
7 | #include <linux/unaligned.h> |
8 | |
9 | #include <linux/clk.h> |
10 | #include <linux/delay.h> |
11 | #include <linux/i2c.h> |
12 | #include <linux/module.h> |
13 | #include <linux/pm_runtime.h> |
14 | |
15 | #include <media/v4l2-cci.h> |
16 | #include <media/v4l2-ctrls.h> |
17 | #include <media/v4l2-fwnode.h> |
18 | #include <media/v4l2-subdev.h> |
19 | |
20 | /* Streaming Mode */ |
21 | #define IMX334_REG_MODE_SELECT CCI_REG8(0x3000) |
22 | #define IMX334_MODE_STANDBY 0x01 |
23 | #define IMX334_MODE_STREAMING 0x00 |
24 | |
25 | /* Lines per frame */ |
26 | #define IMX334_REG_VMAX CCI_REG24_LE(0x3030) |
27 | |
28 | #define IMX334_REG_HMAX CCI_REG16_LE(0x3034) |
29 | |
30 | #define IMX334_REG_OPB_SIZE_V CCI_REG8(0x304c) |
31 | #define IMX334_REG_ADBIT CCI_REG8(0x3050) |
32 | #define IMX334_REG_MDBIT CCI_REG8(0x319d) |
33 | #define IMX334_REG_ADBIT1 CCI_REG16_LE(0x341c) |
34 | #define IMX334_REG_Y_OUT_SIZE CCI_REG16_LE(0x3308) |
35 | #define IMX334_REG_XVS_XHS_OUTSEL CCI_REG8(0x31a0) |
36 | #define IMX334_REG_XVS_XHS_DRV CCI_REG8(0x31a1) |
37 | |
38 | /* Chip ID */ |
39 | #define IMX334_REG_ID CCI_REG8(0x3044) |
40 | #define IMX334_ID 0x1e |
41 | |
42 | /* Exposure control */ |
43 | #define IMX334_REG_SHUTTER CCI_REG24_LE(0x3058) |
44 | #define IMX334_EXPOSURE_MIN 1 |
45 | #define IMX334_EXPOSURE_OFFSET 5 |
46 | #define IMX334_EXPOSURE_STEP 1 |
47 | #define IMX334_EXPOSURE_DEFAULT 0x0648 |
48 | |
49 | #define IMX334_REG_LANEMODE CCI_REG8(0x3a01) |
50 | #define IMX334_CSI_4_LANE_MODE 3 |
51 | #define IMX334_CSI_8_LANE_MODE 7 |
52 | |
53 | /* Window cropping Settings */ |
54 | #define IMX334_REG_AREA3_ST_ADR_1 CCI_REG16_LE(0x3074) |
55 | #define IMX334_REG_AREA3_ST_ADR_2 CCI_REG16_LE(0x308e) |
56 | #define IMX334_REG_UNREAD_PARAM5 CCI_REG16_LE(0x30b6) |
57 | #define IMX334_REG_AREA3_WIDTH_1 CCI_REG16_LE(0x3076) |
58 | #define IMX334_REG_AREA3_WIDTH_2 CCI_REG16_LE(0x3090) |
59 | #define IMX334_REG_BLACK_OFSET_ADR CCI_REG16_LE(0x30c6) |
60 | #define IMX334_REG_UNRD_LINE_MAX CCI_REG16_LE(0x30ce) |
61 | #define IMX334_REG_UNREAD_ED_ADR CCI_REG16_LE(0x30d8) |
62 | #define IMX334_REG_UNREAD_PARAM6 CCI_REG16_LE(0x3116) |
63 | |
64 | #define IMX334_REG_VREVERSE CCI_REG8(0x304f) |
65 | #define IMX334_REG_HREVERSE CCI_REG8(0x304e) |
66 | |
67 | /* Binning Settings */ |
68 | #define IMX334_REG_HADD_VADD CCI_REG8(0x3199) |
69 | #define IMX334_REG_VALID_EXPAND CCI_REG8(0x31dd) |
70 | #define IMX334_REG_TCYCLE CCI_REG8(0x3300) |
71 | |
72 | /* Analog gain control */ |
73 | #define IMX334_REG_AGAIN CCI_REG16_LE(0x30e8) |
74 | #define IMX334_AGAIN_MIN 0 |
75 | #define IMX334_AGAIN_MAX 240 |
76 | #define IMX334_AGAIN_STEP 1 |
77 | #define IMX334_AGAIN_DEFAULT 0 |
78 | |
79 | /* Group hold register */ |
80 | #define IMX334_REG_HOLD CCI_REG8(0x3001) |
81 | |
82 | #define IMX334_REG_MASTER_MODE CCI_REG8(0x3002) |
83 | #define IMX334_REG_WINMODE CCI_REG8(0x3018) |
84 | #define IMX334_REG_HTRIMMING_START CCI_REG16_LE(0x302c) |
85 | #define IMX334_REG_HNUM CCI_REG16_LE(0x302e) |
86 | |
87 | /* Input clock rate */ |
88 | #define IMX334_INCLK_RATE 24000000 |
89 | |
90 | /* INCK Setting Register */ |
91 | #define IMX334_REG_BCWAIT_TIME CCI_REG8(0x300c) |
92 | #define IMX334_REG_CPWAIT_TIME CCI_REG8(0x300d) |
93 | #define IMX334_REG_INCKSEL1 CCI_REG16_LE(0x314c) |
94 | #define IMX334_REG_INCKSEL2 CCI_REG8(0x315a) |
95 | #define IMX334_REG_INCKSEL3 CCI_REG8(0x3168) |
96 | #define IMX334_REG_INCKSEL4 CCI_REG8(0x316a) |
97 | #define IMX334_REG_SYS_MODE CCI_REG8(0x319e) |
98 | |
99 | #define IMX334_REG_TCLKPOST CCI_REG16_LE(0x3a18) |
100 | #define IMX334_REG_TCLKPREPARE CCI_REG16_LE(0x3a1a) |
101 | #define IMX334_REG_TCLKTRAIL CCI_REG16_LE(0x3a1c) |
102 | #define IMX334_REG_TCLKZERO CCI_REG16_LE(0x3a1e) |
103 | #define IMX334_REG_THSPREPARE CCI_REG16_LE(0x3a20) |
104 | #define IMX334_REG_THSZERO CCI_REG16_LE(0x3a22) |
105 | #define IMX334_REG_THSTRAIL CCI_REG16_LE(0x3a24) |
106 | #define IMX334_REG_THSEXIT CCI_REG16_LE(0x3a26) |
107 | #define IMX334_REG_TPLX CCI_REG16_LE(0x3a28) |
108 | |
109 | /* CSI2 HW configuration */ |
110 | #define IMX334_LINK_FREQ_891M 891000000 |
111 | #define IMX334_LINK_FREQ_445M 445500000 |
112 | #define IMX334_NUM_DATA_LANES 4 |
113 | |
114 | #define IMX334_REG_MIN 0x00 |
115 | #define IMX334_REG_MAX 0xfffff |
116 | |
117 | /* Test Pattern Control */ |
118 | #define IMX334_REG_TP CCI_REG8(0x329e) |
119 | #define IMX334_TP_COLOR_HBARS 0xa |
120 | #define IMX334_TP_COLOR_VBARS 0xb |
121 | |
122 | #define IMX334_TPG_EN_DOUT CCI_REG8(0x329c) |
123 | #define IMX334_TP_ENABLE 0x1 |
124 | #define IMX334_TP_DISABLE 0x0 |
125 | |
126 | #define IMX334_TPG_COLORW CCI_REG8(0x32a0) |
127 | #define IMX334_TPG_COLORW_120P 0x13 |
128 | |
129 | #define IMX334_TP_CLK_EN CCI_REG8(0x3148) |
130 | #define IMX334_TP_CLK_EN_VAL 0x10 |
131 | #define IMX334_TP_CLK_DIS_VAL 0x0 |
132 | |
133 | #define IMX334_DIG_CLP_MODE CCI_REG8(0x3280) |
134 | |
135 | /** |
136 | * struct imx334_reg_list - imx334 sensor register list |
137 | * @num_of_regs: Number of registers in the list |
138 | * @regs: Pointer to register list |
139 | */ |
140 | struct imx334_reg_list { |
141 | u32 num_of_regs; |
142 | const struct cci_reg_sequence *regs; |
143 | }; |
144 | |
145 | /** |
146 | * struct imx334_mode - imx334 sensor mode structure |
147 | * @width: Frame width |
148 | * @height: Frame height |
149 | * @hblank: Horizontal blanking in lines |
150 | * @vblank: Vertical blanking in lines |
151 | * @vblank_min: Minimal vertical blanking in lines |
152 | * @vblank_max: Maximum vertical blanking in lines |
153 | * @pclk: Sensor pixel clock |
154 | * @link_freq_idx: Link frequency index |
155 | * @reg_list: Register list for sensor mode |
156 | */ |
157 | struct imx334_mode { |
158 | u32 width; |
159 | u32 height; |
160 | u32 hblank; |
161 | u32 vblank; |
162 | u32 vblank_min; |
163 | u32 vblank_max; |
164 | u64 pclk; |
165 | u32 link_freq_idx; |
166 | struct imx334_reg_list reg_list; |
167 | }; |
168 | |
169 | /** |
170 | * struct imx334 - imx334 sensor device structure |
171 | * @dev: Pointer to generic device |
172 | * @cci: CCI register map |
173 | * @client: Pointer to i2c client |
174 | * @sd: V4L2 sub-device |
175 | * @pad: Media pad. Only one pad supported |
176 | * @reset_gpio: Sensor reset gpio |
177 | * @inclk: Sensor input clock |
178 | * @ctrl_handler: V4L2 control handler |
179 | * @link_freq_ctrl: Pointer to link frequency control |
180 | * @pclk_ctrl: Pointer to pixel clock control |
181 | * @hblank_ctrl: Pointer to horizontal blanking control |
182 | * @vblank_ctrl: Pointer to vertical blanking control |
183 | * @exp_ctrl: Pointer to exposure control |
184 | * @again_ctrl: Pointer to analog gain control |
185 | * @vblank: Vertical blanking in lines |
186 | * @cur_mode: Pointer to current selected sensor mode |
187 | * @link_freq_bitmap: Menu bitmap for link_freq_ctrl |
188 | * @cur_code: current selected format code |
189 | */ |
190 | struct imx334 { |
191 | struct device *dev; |
192 | struct regmap *cci; |
193 | struct i2c_client *client; |
194 | struct v4l2_subdev sd; |
195 | struct media_pad pad; |
196 | struct gpio_desc *reset_gpio; |
197 | struct clk *inclk; |
198 | struct v4l2_ctrl_handler ctrl_handler; |
199 | struct v4l2_ctrl *link_freq_ctrl; |
200 | struct v4l2_ctrl *pclk_ctrl; |
201 | struct v4l2_ctrl *hblank_ctrl; |
202 | struct v4l2_ctrl *vblank_ctrl; |
203 | struct { |
204 | struct v4l2_ctrl *exp_ctrl; |
205 | struct v4l2_ctrl *again_ctrl; |
206 | }; |
207 | u32 vblank; |
208 | const struct imx334_mode *cur_mode; |
209 | unsigned long link_freq_bitmap; |
210 | u32 cur_code; |
211 | }; |
212 | |
213 | static const s64 link_freq[] = { |
214 | IMX334_LINK_FREQ_891M, |
215 | IMX334_LINK_FREQ_445M, |
216 | }; |
217 | |
218 | /* Sensor common mode registers values */ |
219 | static const struct cci_reg_sequence common_mode_regs[] = { |
220 | { IMX334_REG_MODE_SELECT, IMX334_MODE_STANDBY }, |
221 | { IMX334_REG_WINMODE, 0x04 }, |
222 | { IMX334_REG_VMAX, 0x0008ca }, |
223 | { IMX334_REG_HMAX, 0x044c }, |
224 | { IMX334_REG_BLACK_OFSET_ADR, 0x0000 }, |
225 | { IMX334_REG_UNRD_LINE_MAX, 0x0000 }, |
226 | { IMX334_REG_OPB_SIZE_V, 0x00 }, |
227 | { IMX334_REG_HREVERSE, 0x00 }, |
228 | { IMX334_REG_VREVERSE, 0x00 }, |
229 | { IMX334_REG_UNREAD_PARAM5, 0x0000 }, |
230 | { IMX334_REG_UNREAD_PARAM6, 0x0008 }, |
231 | { IMX334_REG_XVS_XHS_OUTSEL, 0x20 }, |
232 | { IMX334_REG_XVS_XHS_DRV, 0x0f }, |
233 | { IMX334_REG_BCWAIT_TIME, 0x3b }, |
234 | { IMX334_REG_CPWAIT_TIME, 0x2a }, |
235 | { IMX334_REG_INCKSEL1, 0x0129 }, |
236 | { IMX334_REG_INCKSEL2, 0x06 }, |
237 | { IMX334_REG_INCKSEL3, 0xa0 }, |
238 | { IMX334_REG_INCKSEL4, 0x7e }, |
239 | { IMX334_REG_SYS_MODE, 0x02 }, |
240 | { IMX334_REG_HADD_VADD, 0x00 }, |
241 | { IMX334_REG_VALID_EXPAND, 0x03 }, |
242 | { IMX334_REG_TCYCLE, 0x00 }, |
243 | { IMX334_REG_TCLKPOST, 0x007f }, |
244 | { IMX334_REG_TCLKPREPARE, 0x0037 }, |
245 | { IMX334_REG_TCLKTRAIL, 0x0037 }, |
246 | { IMX334_REG_TCLKZERO, 0xf7 }, |
247 | { IMX334_REG_THSPREPARE, 0x002f }, |
248 | { CCI_REG8(0x3078), 0x02 }, |
249 | { CCI_REG8(0x3079), 0x00 }, |
250 | { CCI_REG8(0x307a), 0x00 }, |
251 | { CCI_REG8(0x307b), 0x00 }, |
252 | { CCI_REG8(0x3080), 0x02 }, |
253 | { CCI_REG8(0x3081), 0x00 }, |
254 | { CCI_REG8(0x3082), 0x00 }, |
255 | { CCI_REG8(0x3083), 0x00 }, |
256 | { CCI_REG8(0x3088), 0x02 }, |
257 | { CCI_REG8(0x3094), 0x00 }, |
258 | { CCI_REG8(0x3095), 0x00 }, |
259 | { CCI_REG8(0x3096), 0x00 }, |
260 | { CCI_REG8(0x309b), 0x02 }, |
261 | { CCI_REG8(0x309c), 0x00 }, |
262 | { CCI_REG8(0x309d), 0x00 }, |
263 | { CCI_REG8(0x309e), 0x00 }, |
264 | { CCI_REG8(0x30a4), 0x00 }, |
265 | { CCI_REG8(0x30a5), 0x00 }, |
266 | { CCI_REG8(0x3288), 0x21 }, |
267 | { CCI_REG8(0x328a), 0x02 }, |
268 | { CCI_REG8(0x3414), 0x05 }, |
269 | { CCI_REG8(0x3416), 0x18 }, |
270 | { CCI_REG8(0x35Ac), 0x0e }, |
271 | { CCI_REG8(0x3648), 0x01 }, |
272 | { CCI_REG8(0x364a), 0x04 }, |
273 | { CCI_REG8(0x364c), 0x04 }, |
274 | { CCI_REG8(0x3678), 0x01 }, |
275 | { CCI_REG8(0x367c), 0x31 }, |
276 | { CCI_REG8(0x367e), 0x31 }, |
277 | { CCI_REG8(0x3708), 0x02 }, |
278 | { CCI_REG8(0x3714), 0x01 }, |
279 | { CCI_REG8(0x3715), 0x02 }, |
280 | { CCI_REG8(0x3716), 0x02 }, |
281 | { CCI_REG8(0x3717), 0x02 }, |
282 | { CCI_REG8(0x371c), 0x3d }, |
283 | { CCI_REG8(0x371d), 0x3f }, |
284 | { CCI_REG8(0x372c), 0x00 }, |
285 | { CCI_REG8(0x372d), 0x00 }, |
286 | { CCI_REG8(0x372e), 0x46 }, |
287 | { CCI_REG8(0x372f), 0x00 }, |
288 | { CCI_REG8(0x3730), 0x89 }, |
289 | { CCI_REG8(0x3731), 0x00 }, |
290 | { CCI_REG8(0x3732), 0x08 }, |
291 | { CCI_REG8(0x3733), 0x01 }, |
292 | { CCI_REG8(0x3734), 0xfe }, |
293 | { CCI_REG8(0x3735), 0x05 }, |
294 | { CCI_REG8(0x375d), 0x00 }, |
295 | { CCI_REG8(0x375e), 0x00 }, |
296 | { CCI_REG8(0x375f), 0x61 }, |
297 | { CCI_REG8(0x3760), 0x06 }, |
298 | { CCI_REG8(0x3768), 0x1b }, |
299 | { CCI_REG8(0x3769), 0x1b }, |
300 | { CCI_REG8(0x376a), 0x1a }, |
301 | { CCI_REG8(0x376b), 0x19 }, |
302 | { CCI_REG8(0x376c), 0x18 }, |
303 | { CCI_REG8(0x376d), 0x14 }, |
304 | { CCI_REG8(0x376e), 0x0f }, |
305 | { CCI_REG8(0x3776), 0x00 }, |
306 | { CCI_REG8(0x3777), 0x00 }, |
307 | { CCI_REG8(0x3778), 0x46 }, |
308 | { CCI_REG8(0x3779), 0x00 }, |
309 | { CCI_REG8(0x377a), 0x08 }, |
310 | { CCI_REG8(0x377b), 0x01 }, |
311 | { CCI_REG8(0x377c), 0x45 }, |
312 | { CCI_REG8(0x377d), 0x01 }, |
313 | { CCI_REG8(0x377e), 0x23 }, |
314 | { CCI_REG8(0x377f), 0x02 }, |
315 | { CCI_REG8(0x3780), 0xd9 }, |
316 | { CCI_REG8(0x3781), 0x03 }, |
317 | { CCI_REG8(0x3782), 0xf5 }, |
318 | { CCI_REG8(0x3783), 0x06 }, |
319 | { CCI_REG8(0x3784), 0xa5 }, |
320 | { CCI_REG8(0x3788), 0x0f }, |
321 | { CCI_REG8(0x378a), 0xd9 }, |
322 | { CCI_REG8(0x378b), 0x03 }, |
323 | { CCI_REG8(0x378c), 0xeb }, |
324 | { CCI_REG8(0x378d), 0x05 }, |
325 | { CCI_REG8(0x378e), 0x87 }, |
326 | { CCI_REG8(0x378f), 0x06 }, |
327 | { CCI_REG8(0x3790), 0xf5 }, |
328 | { CCI_REG8(0x3792), 0x43 }, |
329 | { CCI_REG8(0x3794), 0x7a }, |
330 | { CCI_REG8(0x3796), 0xa1 }, |
331 | { CCI_REG8(0x37b0), 0x37 }, |
332 | { CCI_REG8(0x3e04), 0x0e }, |
333 | { IMX334_REG_AGAIN, 0x0050 }, |
334 | { IMX334_REG_MASTER_MODE, 0x00 }, |
335 | }; |
336 | |
337 | /* Sensor mode registers for 640x480@30fps */ |
338 | static const struct cci_reg_sequence mode_640x480_regs[] = { |
339 | { IMX334_REG_HTRIMMING_START, 0x0670 }, |
340 | { IMX334_REG_HNUM, 0x0280 }, |
341 | { IMX334_REG_AREA3_ST_ADR_1, 0x0748 }, |
342 | { IMX334_REG_AREA3_ST_ADR_2, 0x0749 }, |
343 | { IMX334_REG_AREA3_WIDTH_1, 0x01e0 }, |
344 | { IMX334_REG_AREA3_WIDTH_2, 0x01e0 }, |
345 | { IMX334_REG_Y_OUT_SIZE, 0x01e0 }, |
346 | { IMX334_REG_UNREAD_ED_ADR, 0x0b30 }, |
347 | }; |
348 | |
349 | /* Sensor mode registers for 1280x720@30fps */ |
350 | static const struct cci_reg_sequence mode_1280x720_regs[] = { |
351 | { IMX334_REG_HTRIMMING_START, 0x0530 }, |
352 | { IMX334_REG_HNUM, 0x0500 }, |
353 | { IMX334_REG_AREA3_ST_ADR_1, 0x0384 }, |
354 | { IMX334_REG_AREA3_ST_ADR_2, 0x0385 }, |
355 | { IMX334_REG_AREA3_WIDTH_1, 0x02d0 }, |
356 | { IMX334_REG_AREA3_WIDTH_2, 0x02d0 }, |
357 | { IMX334_REG_Y_OUT_SIZE, 0x02d0 }, |
358 | { IMX334_REG_UNREAD_ED_ADR, 0x0b30 }, |
359 | }; |
360 | |
361 | /* Sensor mode registers for 1920x1080@30fps */ |
362 | static const struct cci_reg_sequence mode_1920x1080_regs[] = { |
363 | { IMX334_REG_HTRIMMING_START, 0x03f0 }, |
364 | { IMX334_REG_HNUM, 0x0780 }, |
365 | { IMX334_REG_AREA3_ST_ADR_1, 0x02cc }, |
366 | { IMX334_REG_AREA3_ST_ADR_2, 0x02cd }, |
367 | { IMX334_REG_AREA3_WIDTH_1, 0x0438 }, |
368 | { IMX334_REG_AREA3_WIDTH_2, 0x0438 }, |
369 | { IMX334_REG_Y_OUT_SIZE, 0x0438 }, |
370 | { IMX334_REG_UNREAD_ED_ADR, 0x0a18 }, |
371 | }; |
372 | |
373 | /* Sensor mode registers for 3840x2160@30fps */ |
374 | static const struct cci_reg_sequence mode_3840x2160_regs[] = { |
375 | { IMX334_REG_HMAX, 0x0226 }, |
376 | { IMX334_REG_INCKSEL2, 0x02 }, |
377 | { IMX334_REG_HTRIMMING_START, 0x003c }, |
378 | { IMX334_REG_HNUM, 0x0f00 }, |
379 | { IMX334_REG_AREA3_ST_ADR_1, 0x00b0 }, |
380 | { IMX334_REG_AREA3_ST_ADR_2, 0x00b1 }, |
381 | { IMX334_REG_UNREAD_ED_ADR, 0x1220 }, |
382 | { IMX334_REG_AREA3_WIDTH_1, 0x0870 }, |
383 | { IMX334_REG_AREA3_WIDTH_2, 0x0870 }, |
384 | { IMX334_REG_Y_OUT_SIZE, 0x0870 }, |
385 | { IMX334_REG_SYS_MODE, 0x0100 }, |
386 | { IMX334_REG_TCLKPOST, 0x00bf }, |
387 | { IMX334_REG_TCLKPREPARE, 0x0067 }, |
388 | { IMX334_REG_TCLKTRAIL, 0x006f }, |
389 | { IMX334_REG_TCLKZERO, 0x1d7 }, |
390 | { IMX334_REG_THSPREPARE, 0x006f }, |
391 | { IMX334_REG_THSZERO, 0x00cf }, |
392 | { IMX334_REG_THSTRAIL, 0x006f }, |
393 | { IMX334_REG_THSEXIT, 0x00b7 }, |
394 | { IMX334_REG_TPLX, 0x005f }, |
395 | }; |
396 | |
397 | static const char * const imx334_test_pattern_menu[] = { |
398 | "Disabled", |
399 | "Vertical Color Bars", |
400 | "Horizontal Color Bars", |
401 | }; |
402 | |
403 | static const int imx334_test_pattern_val[] = { |
404 | IMX334_TP_DISABLE, |
405 | IMX334_TP_COLOR_HBARS, |
406 | IMX334_TP_COLOR_VBARS, |
407 | }; |
408 | |
409 | static const struct cci_reg_sequence raw10_framefmt_regs[] = { |
410 | { IMX334_REG_ADBIT, 0x00 }, |
411 | { IMX334_REG_MDBIT, 0x00 }, |
412 | { IMX334_REG_ADBIT1, 0x01ff }, |
413 | }; |
414 | |
415 | static const struct cci_reg_sequence raw12_framefmt_regs[] = { |
416 | { IMX334_REG_ADBIT, 0x01 }, |
417 | { IMX334_REG_MDBIT, 0x01 }, |
418 | { IMX334_REG_ADBIT1, 0x0047 }, |
419 | }; |
420 | |
421 | static const u32 imx334_mbus_codes[] = { |
422 | MEDIA_BUS_FMT_SRGGB12_1X12, |
423 | MEDIA_BUS_FMT_SRGGB10_1X10, |
424 | }; |
425 | |
426 | /* Supported sensor mode configurations */ |
427 | static const struct imx334_mode supported_modes[] = { |
428 | { |
429 | .width = 3840, |
430 | .height = 2160, |
431 | .hblank = 560, |
432 | .vblank = 2340, |
433 | .vblank_min = 90, |
434 | .vblank_max = 132840, |
435 | .pclk = 594000000, |
436 | .link_freq_idx = 0, |
437 | .reg_list = { |
438 | .num_of_regs = ARRAY_SIZE(mode_3840x2160_regs), |
439 | .regs = mode_3840x2160_regs, |
440 | }, |
441 | }, { |
442 | .width = 1920, |
443 | .height = 1080, |
444 | .hblank = 2480, |
445 | .vblank = 1170, |
446 | .vblank_min = 45, |
447 | .vblank_max = 132840, |
448 | .pclk = 297000000, |
449 | .link_freq_idx = 1, |
450 | .reg_list = { |
451 | .num_of_regs = ARRAY_SIZE(mode_1920x1080_regs), |
452 | .regs = mode_1920x1080_regs, |
453 | }, |
454 | }, { |
455 | .width = 1280, |
456 | .height = 720, |
457 | .hblank = 2480, |
458 | .vblank = 1170, |
459 | .vblank_min = 45, |
460 | .vblank_max = 132840, |
461 | .pclk = 297000000, |
462 | .link_freq_idx = 1, |
463 | .reg_list = { |
464 | .num_of_regs = ARRAY_SIZE(mode_1280x720_regs), |
465 | .regs = mode_1280x720_regs, |
466 | }, |
467 | }, { |
468 | .width = 640, |
469 | .height = 480, |
470 | .hblank = 2480, |
471 | .vblank = 1170, |
472 | .vblank_min = 45, |
473 | .vblank_max = 132840, |
474 | .pclk = 297000000, |
475 | .link_freq_idx = 1, |
476 | .reg_list = { |
477 | .num_of_regs = ARRAY_SIZE(mode_640x480_regs), |
478 | .regs = mode_640x480_regs, |
479 | }, |
480 | }, |
481 | }; |
482 | |
483 | /** |
484 | * to_imx334() - imv334 V4L2 sub-device to imx334 device. |
485 | * @subdev: pointer to imx334 V4L2 sub-device |
486 | * |
487 | * Return: pointer to imx334 device |
488 | */ |
489 | static inline struct imx334 *to_imx334(struct v4l2_subdev *subdev) |
490 | { |
491 | return container_of(subdev, struct imx334, sd); |
492 | } |
493 | |
494 | /** |
495 | * imx334_update_controls() - Update control ranges based on streaming mode |
496 | * @imx334: pointer to imx334 device |
497 | * @mode: pointer to imx334_mode sensor mode |
498 | * |
499 | * Return: 0 if successful, error code otherwise. |
500 | */ |
501 | static int imx334_update_controls(struct imx334 *imx334, |
502 | const struct imx334_mode *mode) |
503 | { |
504 | int ret; |
505 | |
506 | ret = __v4l2_ctrl_s_ctrl(ctrl: imx334->link_freq_ctrl, val: mode->link_freq_idx); |
507 | if (ret) |
508 | return ret; |
509 | |
510 | ret = __v4l2_ctrl_modify_range(ctrl: imx334->pclk_ctrl, min: mode->pclk, |
511 | max: mode->pclk, step: 1, def: mode->pclk); |
512 | if (ret) |
513 | return ret; |
514 | |
515 | ret = __v4l2_ctrl_modify_range(ctrl: imx334->hblank_ctrl, min: mode->hblank, |
516 | max: mode->hblank, step: 1, def: mode->hblank); |
517 | if (ret) |
518 | return ret; |
519 | |
520 | ret = __v4l2_ctrl_modify_range(ctrl: imx334->vblank_ctrl, min: mode->vblank_min, |
521 | max: mode->vblank_max, step: 1, def: mode->vblank); |
522 | if (ret) |
523 | return ret; |
524 | |
525 | return __v4l2_ctrl_s_ctrl(ctrl: imx334->vblank_ctrl, val: mode->vblank); |
526 | } |
527 | |
528 | /** |
529 | * imx334_update_exp_gain() - Set updated exposure and gain |
530 | * @imx334: pointer to imx334 device |
531 | * @exposure: updated exposure value |
532 | * @gain: updated analog gain value |
533 | * |
534 | * Return: 0 if successful, error code otherwise. |
535 | */ |
536 | static int imx334_update_exp_gain(struct imx334 *imx334, u32 exposure, u32 gain) |
537 | { |
538 | u32 lpfr, shutter; |
539 | int ret_hold; |
540 | int ret = 0; |
541 | |
542 | lpfr = imx334->vblank + imx334->cur_mode->height; |
543 | shutter = lpfr - exposure; |
544 | |
545 | dev_dbg(imx334->dev, "Set long exp %u analog gain %u sh0 %u lpfr %u\n", |
546 | exposure, gain, shutter, lpfr); |
547 | |
548 | cci_write(map: imx334->cci, IMX334_REG_HOLD, val: 1, err: &ret); |
549 | cci_write(map: imx334->cci, IMX334_REG_VMAX, val: lpfr, err: &ret); |
550 | cci_write(map: imx334->cci, IMX334_REG_SHUTTER, val: shutter, err: &ret); |
551 | cci_write(map: imx334->cci, IMX334_REG_AGAIN, val: gain, err: &ret); |
552 | |
553 | ret_hold = cci_write(map: imx334->cci, IMX334_REG_HOLD, val: 0, NULL); |
554 | if (ret_hold) |
555 | return ret_hold; |
556 | |
557 | return ret; |
558 | } |
559 | |
560 | /** |
561 | * imx334_set_ctrl() - Set subdevice control |
562 | * @ctrl: pointer to v4l2_ctrl structure |
563 | * |
564 | * Supported controls: |
565 | * - V4L2_CID_VBLANK |
566 | * - cluster controls: |
567 | * - V4L2_CID_ANALOGUE_GAIN |
568 | * - V4L2_CID_EXPOSURE |
569 | * |
570 | * Return: 0 if successful, error code otherwise. |
571 | */ |
572 | static int imx334_set_ctrl(struct v4l2_ctrl *ctrl) |
573 | { |
574 | struct imx334 *imx334 = |
575 | container_of(ctrl->handler, struct imx334, ctrl_handler); |
576 | u32 analog_gain; |
577 | u32 exposure; |
578 | int ret; |
579 | |
580 | if (ctrl->id == V4L2_CID_VBLANK) { |
581 | imx334->vblank = imx334->vblank_ctrl->val; |
582 | |
583 | dev_dbg(imx334->dev, "Received vblank %u, new lpfr %u\n", |
584 | imx334->vblank, |
585 | imx334->vblank + imx334->cur_mode->height); |
586 | |
587 | ret = __v4l2_ctrl_modify_range(ctrl: imx334->exp_ctrl, |
588 | IMX334_EXPOSURE_MIN, |
589 | max: imx334->vblank + |
590 | imx334->cur_mode->height - |
591 | IMX334_EXPOSURE_OFFSET, |
592 | step: 1, IMX334_EXPOSURE_DEFAULT); |
593 | if (ret) |
594 | return ret; |
595 | } |
596 | |
597 | /* Set controls only if sensor is in power on state */ |
598 | if (!pm_runtime_get_if_in_use(dev: imx334->dev)) |
599 | return 0; |
600 | |
601 | switch (ctrl->id) { |
602 | case V4L2_CID_VBLANK: |
603 | exposure = imx334->exp_ctrl->val; |
604 | analog_gain = imx334->again_ctrl->val; |
605 | |
606 | ret = imx334_update_exp_gain(imx334, exposure, gain: analog_gain); |
607 | |
608 | break; |
609 | case V4L2_CID_EXPOSURE: |
610 | |
611 | exposure = ctrl->val; |
612 | analog_gain = imx334->again_ctrl->val; |
613 | |
614 | dev_dbg(imx334->dev, "Received exp %u analog gain %u\n", |
615 | exposure, analog_gain); |
616 | |
617 | ret = imx334_update_exp_gain(imx334, exposure, gain: analog_gain); |
618 | |
619 | break; |
620 | case V4L2_CID_PIXEL_RATE: |
621 | case V4L2_CID_LINK_FREQ: |
622 | case V4L2_CID_HBLANK: |
623 | ret = 0; |
624 | break; |
625 | case V4L2_CID_TEST_PATTERN: |
626 | if (ctrl->val) { |
627 | cci_write(map: imx334->cci, IMX334_TP_CLK_EN, |
628 | IMX334_TP_CLK_EN_VAL, NULL); |
629 | cci_write(map: imx334->cci, IMX334_DIG_CLP_MODE, val: 0x0, NULL); |
630 | cci_write(map: imx334->cci, IMX334_TPG_COLORW, |
631 | IMX334_TPG_COLORW_120P, NULL); |
632 | cci_write(map: imx334->cci, IMX334_REG_TP, |
633 | val: imx334_test_pattern_val[ctrl->val], NULL); |
634 | cci_write(map: imx334->cci, IMX334_TPG_EN_DOUT, |
635 | IMX334_TP_ENABLE, NULL); |
636 | } else { |
637 | cci_write(map: imx334->cci, IMX334_DIG_CLP_MODE, val: 0x1, NULL); |
638 | cci_write(map: imx334->cci, IMX334_TP_CLK_EN, |
639 | IMX334_TP_CLK_DIS_VAL, NULL); |
640 | cci_write(map: imx334->cci, IMX334_TPG_EN_DOUT, |
641 | IMX334_TP_DISABLE, NULL); |
642 | } |
643 | ret = 0; |
644 | break; |
645 | default: |
646 | dev_err(imx334->dev, "Invalid control %d\n", ctrl->id); |
647 | ret = -EINVAL; |
648 | } |
649 | |
650 | pm_runtime_put(dev: imx334->dev); |
651 | |
652 | return ret; |
653 | } |
654 | |
655 | /* V4l2 subdevice control ops*/ |
656 | static const struct v4l2_ctrl_ops imx334_ctrl_ops = { |
657 | .s_ctrl = imx334_set_ctrl, |
658 | }; |
659 | |
660 | static int imx334_get_format_code(struct imx334 *imx334, u32 code) |
661 | { |
662 | unsigned int i; |
663 | |
664 | for (i = 0; i < ARRAY_SIZE(imx334_mbus_codes); i++) { |
665 | if (imx334_mbus_codes[i] == code) |
666 | return imx334_mbus_codes[i]; |
667 | } |
668 | |
669 | return imx334_mbus_codes[0]; |
670 | } |
671 | |
672 | /** |
673 | * imx334_enum_mbus_code() - Enumerate V4L2 sub-device mbus codes |
674 | * @sd: pointer to imx334 V4L2 sub-device structure |
675 | * @sd_state: V4L2 sub-device state |
676 | * @code: V4L2 sub-device code enumeration need to be filled |
677 | * |
678 | * Return: 0 if successful, error code otherwise. |
679 | */ |
680 | static int imx334_enum_mbus_code(struct v4l2_subdev *sd, |
681 | struct v4l2_subdev_state *sd_state, |
682 | struct v4l2_subdev_mbus_code_enum *code) |
683 | { |
684 | if (code->index >= ARRAY_SIZE(imx334_mbus_codes)) |
685 | return -EINVAL; |
686 | |
687 | code->code = imx334_mbus_codes[code->index]; |
688 | |
689 | return 0; |
690 | } |
691 | |
692 | /** |
693 | * imx334_enum_frame_size() - Enumerate V4L2 sub-device frame sizes |
694 | * @sd: pointer to imx334 V4L2 sub-device structure |
695 | * @sd_state: V4L2 sub-device state |
696 | * @fsize: V4L2 sub-device size enumeration need to be filled |
697 | * |
698 | * Return: 0 if successful, error code otherwise. |
699 | */ |
700 | static int imx334_enum_frame_size(struct v4l2_subdev *sd, |
701 | struct v4l2_subdev_state *sd_state, |
702 | struct v4l2_subdev_frame_size_enum *fsize) |
703 | { |
704 | struct imx334 *imx334 = to_imx334(subdev: sd); |
705 | u32 code; |
706 | |
707 | if (fsize->index >= ARRAY_SIZE(supported_modes)) |
708 | return -EINVAL; |
709 | |
710 | code = imx334_get_format_code(imx334, code: fsize->code); |
711 | |
712 | if (fsize->code != code) |
713 | return -EINVAL; |
714 | |
715 | fsize->min_width = supported_modes[fsize->index].width; |
716 | fsize->max_width = fsize->min_width; |
717 | fsize->min_height = supported_modes[fsize->index].height; |
718 | fsize->max_height = fsize->min_height; |
719 | |
720 | return 0; |
721 | } |
722 | |
723 | /** |
724 | * imx334_fill_pad_format() - Fill subdevice pad format |
725 | * from selected sensor mode |
726 | * @imx334: pointer to imx334 device |
727 | * @mode: pointer to imx334_mode sensor mode |
728 | * @fmt: V4L2 sub-device format need to be filled |
729 | */ |
730 | static void imx334_fill_pad_format(struct imx334 *imx334, |
731 | const struct imx334_mode *mode, |
732 | struct v4l2_subdev_format *fmt) |
733 | { |
734 | fmt->format.width = mode->width; |
735 | fmt->format.height = mode->height; |
736 | fmt->format.field = V4L2_FIELD_NONE; |
737 | fmt->format.colorspace = V4L2_COLORSPACE_RAW; |
738 | fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; |
739 | fmt->format.quantization = V4L2_QUANTIZATION_DEFAULT; |
740 | fmt->format.xfer_func = V4L2_XFER_FUNC_NONE; |
741 | } |
742 | |
743 | /** |
744 | * imx334_get_pad_format() - Get subdevice pad format |
745 | * @sd: pointer to imx334 V4L2 sub-device structure |
746 | * @sd_state: V4L2 sub-device state |
747 | * @fmt: V4L2 sub-device format need to be set |
748 | * |
749 | * Return: 0 if successful, error code otherwise. |
750 | */ |
751 | static int imx334_get_pad_format(struct v4l2_subdev *sd, |
752 | struct v4l2_subdev_state *sd_state, |
753 | struct v4l2_subdev_format *fmt) |
754 | { |
755 | struct imx334 *imx334 = to_imx334(subdev: sd); |
756 | |
757 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { |
758 | struct v4l2_mbus_framefmt *framefmt; |
759 | |
760 | framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); |
761 | fmt->format = *framefmt; |
762 | } else { |
763 | fmt->format.code = imx334->cur_code; |
764 | imx334_fill_pad_format(imx334, mode: imx334->cur_mode, fmt); |
765 | } |
766 | |
767 | return 0; |
768 | } |
769 | |
770 | /** |
771 | * imx334_set_pad_format() - Set subdevice pad format |
772 | * @sd: pointer to imx334 V4L2 sub-device structure |
773 | * @sd_state: V4L2 sub-device state |
774 | * @fmt: V4L2 sub-device format need to be set |
775 | * |
776 | * Return: 0 if successful, error code otherwise. |
777 | */ |
778 | static int imx334_set_pad_format(struct v4l2_subdev *sd, |
779 | struct v4l2_subdev_state *sd_state, |
780 | struct v4l2_subdev_format *fmt) |
781 | { |
782 | struct imx334 *imx334 = to_imx334(subdev: sd); |
783 | const struct imx334_mode *mode; |
784 | int ret = 0; |
785 | |
786 | mode = v4l2_find_nearest_size(supported_modes, |
787 | ARRAY_SIZE(supported_modes), |
788 | width, height, |
789 | fmt->format.width, fmt->format.height); |
790 | |
791 | imx334_fill_pad_format(imx334, mode, fmt); |
792 | fmt->format.code = imx334_get_format_code(imx334, code: fmt->format.code); |
793 | |
794 | if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { |
795 | struct v4l2_mbus_framefmt *framefmt; |
796 | |
797 | framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); |
798 | *framefmt = fmt->format; |
799 | } else if (imx334->cur_mode != mode || imx334->cur_code != fmt->format.code) { |
800 | imx334->cur_code = fmt->format.code; |
801 | ret = imx334_update_controls(imx334, mode); |
802 | if (!ret) |
803 | imx334->cur_mode = mode; |
804 | } |
805 | |
806 | return ret; |
807 | } |
808 | |
809 | /** |
810 | * imx334_init_state() - Initialize sub-device state |
811 | * @sd: pointer to imx334 V4L2 sub-device structure |
812 | * @sd_state: V4L2 sub-device state |
813 | * |
814 | * Return: 0 if successful, error code otherwise. |
815 | */ |
816 | static int imx334_init_state(struct v4l2_subdev *sd, |
817 | struct v4l2_subdev_state *sd_state) |
818 | { |
819 | struct imx334 *imx334 = to_imx334(subdev: sd); |
820 | struct v4l2_subdev_format fmt = { 0 }; |
821 | |
822 | fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; |
823 | |
824 | imx334_fill_pad_format(imx334, mode: imx334->cur_mode, fmt: &fmt); |
825 | |
826 | __v4l2_ctrl_modify_range(ctrl: imx334->link_freq_ctrl, min: 0, |
827 | max: __fls(word: imx334->link_freq_bitmap), |
828 | step: ~(imx334->link_freq_bitmap), |
829 | __ffs(imx334->link_freq_bitmap)); |
830 | |
831 | return imx334_set_pad_format(sd, sd_state, fmt: &fmt); |
832 | } |
833 | |
834 | static int imx334_set_framefmt(struct imx334 *imx334) |
835 | { |
836 | switch (imx334->cur_code) { |
837 | case MEDIA_BUS_FMT_SRGGB10_1X10: |
838 | return cci_multi_reg_write(map: imx334->cci, regs: raw10_framefmt_regs, |
839 | ARRAY_SIZE(raw10_framefmt_regs), NULL); |
840 | |
841 | |
842 | case MEDIA_BUS_FMT_SRGGB12_1X12: |
843 | return cci_multi_reg_write(map: imx334->cci, regs: raw12_framefmt_regs, |
844 | ARRAY_SIZE(raw12_framefmt_regs), NULL); |
845 | } |
846 | |
847 | return -EINVAL; |
848 | } |
849 | |
850 | /** |
851 | * imx334_enable_streams() - Enable specified streams for the sensor |
852 | * @sd: pointer to the V4L2 subdevice |
853 | * @state: pointer to the subdevice state |
854 | * @pad: pad number for which streams are enabled |
855 | * @streams_mask: bitmask specifying the streams to enable |
856 | * |
857 | * Return: 0 if successful, error code otherwise. |
858 | */ |
859 | static int imx334_enable_streams(struct v4l2_subdev *sd, |
860 | struct v4l2_subdev_state *state, u32 pad, |
861 | u64 streams_mask) |
862 | { |
863 | struct imx334 *imx334 = to_imx334(subdev: sd); |
864 | const struct imx334_reg_list *reg_list; |
865 | int ret; |
866 | |
867 | ret = pm_runtime_resume_and_get(dev: imx334->dev); |
868 | if (ret < 0) |
869 | return ret; |
870 | |
871 | ret = cci_multi_reg_write(map: imx334->cci, regs: common_mode_regs, |
872 | ARRAY_SIZE(common_mode_regs), NULL); |
873 | if (ret) { |
874 | dev_err(imx334->dev, "fail to write common registers\n"); |
875 | goto err_rpm_put; |
876 | } |
877 | |
878 | /* Write sensor mode registers */ |
879 | reg_list = &imx334->cur_mode->reg_list; |
880 | ret = cci_multi_reg_write(map: imx334->cci, regs: reg_list->regs, |
881 | num_regs: reg_list->num_of_regs, NULL); |
882 | if (ret) { |
883 | dev_err(imx334->dev, "fail to write initial registers\n"); |
884 | goto err_rpm_put; |
885 | } |
886 | |
887 | ret = cci_write(map: imx334->cci, IMX334_REG_LANEMODE, |
888 | IMX334_CSI_4_LANE_MODE, NULL); |
889 | if (ret) { |
890 | dev_err(imx334->dev, "failed to configure lanes\n"); |
891 | goto err_rpm_put; |
892 | } |
893 | |
894 | ret = imx334_set_framefmt(imx334); |
895 | if (ret) { |
896 | dev_err(imx334->dev, "%s failed to set frame format: %d\n", |
897 | __func__, ret); |
898 | goto err_rpm_put; |
899 | } |
900 | |
901 | /* Setup handler will write actual exposure and gain */ |
902 | ret = __v4l2_ctrl_handler_setup(hdl: imx334->sd.ctrl_handler); |
903 | if (ret) { |
904 | dev_err(imx334->dev, "fail to setup handler\n"); |
905 | goto err_rpm_put; |
906 | } |
907 | |
908 | /* Start streaming */ |
909 | ret = cci_write(map: imx334->cci, IMX334_REG_MODE_SELECT, |
910 | IMX334_MODE_STREAMING, NULL); |
911 | if (ret) { |
912 | dev_err(imx334->dev, "fail to start streaming\n"); |
913 | goto err_rpm_put; |
914 | } |
915 | |
916 | return 0; |
917 | |
918 | err_rpm_put: |
919 | pm_runtime_put(dev: imx334->dev); |
920 | return ret; |
921 | } |
922 | |
923 | /** |
924 | * imx334_disable_streams() - Enable specified streams for the sensor |
925 | * @sd: pointer to the V4L2 subdevice |
926 | * @state: pointer to the subdevice state |
927 | * @pad: pad number for which streams are disabled |
928 | * @streams_mask: bitmask specifying the streams to disable |
929 | * |
930 | * Return: 0 if successful, error code otherwise. |
931 | */ |
932 | static int imx334_disable_streams(struct v4l2_subdev *sd, |
933 | struct v4l2_subdev_state *state, u32 pad, |
934 | u64 streams_mask) |
935 | { |
936 | struct imx334 *imx334 = to_imx334(subdev: sd); |
937 | int ret; |
938 | |
939 | ret = cci_write(map: imx334->cci, IMX334_REG_MODE_SELECT, |
940 | IMX334_MODE_STANDBY, NULL); |
941 | if (ret) |
942 | dev_err(imx334->dev, "%s failed to stop stream\n", __func__); |
943 | |
944 | pm_runtime_put(dev: imx334->dev); |
945 | |
946 | return ret; |
947 | } |
948 | |
949 | /** |
950 | * imx334_detect() - Detect imx334 sensor |
951 | * @imx334: pointer to imx334 device |
952 | * |
953 | * Return: 0 if successful, -EIO if sensor id does not match |
954 | */ |
955 | static int imx334_detect(struct imx334 *imx334) |
956 | { |
957 | int ret; |
958 | u64 val; |
959 | |
960 | ret = cci_read(map: imx334->cci, IMX334_REG_ID, val: &val, NULL); |
961 | if (ret) |
962 | return ret; |
963 | |
964 | if (val != IMX334_ID) { |
965 | dev_err(imx334->dev, "chip id mismatch: %x!=%llx\n", |
966 | IMX334_ID, val); |
967 | return -ENXIO; |
968 | } |
969 | |
970 | return 0; |
971 | } |
972 | |
973 | /** |
974 | * imx334_parse_hw_config() - Parse HW configuration and check if supported |
975 | * @imx334: pointer to imx334 device |
976 | * |
977 | * Return: 0 if successful, error code otherwise. |
978 | */ |
979 | static int imx334_parse_hw_config(struct imx334 *imx334) |
980 | { |
981 | struct fwnode_handle *fwnode = dev_fwnode(imx334->dev); |
982 | struct v4l2_fwnode_endpoint bus_cfg = { |
983 | .bus_type = V4L2_MBUS_CSI2_DPHY |
984 | }; |
985 | struct fwnode_handle *ep; |
986 | unsigned long rate; |
987 | int ret; |
988 | |
989 | if (!fwnode) |
990 | return -ENXIO; |
991 | |
992 | /* Request optional reset pin */ |
993 | imx334->reset_gpio = devm_gpiod_get_optional(dev: imx334->dev, con_id: "reset", |
994 | flags: GPIOD_OUT_LOW); |
995 | if (IS_ERR(ptr: imx334->reset_gpio)) |
996 | return dev_err_probe(dev: imx334->dev, err: PTR_ERR(ptr: imx334->reset_gpio), |
997 | fmt: "failed to get reset gpio\n"); |
998 | |
999 | /* Get sensor input clock */ |
1000 | imx334->inclk = devm_clk_get(dev: imx334->dev, NULL); |
1001 | if (IS_ERR(ptr: imx334->inclk)) |
1002 | return dev_err_probe(dev: imx334->dev, err: PTR_ERR(ptr: imx334->inclk), |
1003 | fmt: "could not get inclk\n"); |
1004 | |
1005 | rate = clk_get_rate(clk: imx334->inclk); |
1006 | if (rate != IMX334_INCLK_RATE) |
1007 | return dev_err_probe(dev: imx334->dev, err: -EINVAL, |
1008 | fmt: "inclk frequency mismatch\n"); |
1009 | |
1010 | ep = fwnode_graph_get_next_endpoint(fwnode, NULL); |
1011 | if (!ep) |
1012 | return -ENXIO; |
1013 | |
1014 | ret = v4l2_fwnode_endpoint_alloc_parse(fwnode: ep, vep: &bus_cfg); |
1015 | fwnode_handle_put(fwnode: ep); |
1016 | if (ret) |
1017 | return ret; |
1018 | |
1019 | if (bus_cfg.bus.mipi_csi2.num_data_lanes != IMX334_NUM_DATA_LANES) { |
1020 | dev_err(imx334->dev, |
1021 | "number of CSI2 data lanes %d is not supported\n", |
1022 | bus_cfg.bus.mipi_csi2.num_data_lanes); |
1023 | ret = -EINVAL; |
1024 | goto done_endpoint_free; |
1025 | } |
1026 | |
1027 | ret = v4l2_link_freq_to_bitmap(dev: imx334->dev, fw_link_freqs: bus_cfg.link_frequencies, |
1028 | num_of_fw_link_freqs: bus_cfg.nr_of_link_frequencies, |
1029 | driver_link_freqs: link_freq, ARRAY_SIZE(link_freq), |
1030 | bitmap: &imx334->link_freq_bitmap); |
1031 | |
1032 | done_endpoint_free: |
1033 | v4l2_fwnode_endpoint_free(vep: &bus_cfg); |
1034 | |
1035 | return ret; |
1036 | } |
1037 | |
1038 | /* V4l2 subdevice ops */ |
1039 | static const struct v4l2_subdev_video_ops imx334_video_ops = { |
1040 | .s_stream = v4l2_subdev_s_stream_helper, |
1041 | }; |
1042 | |
1043 | static const struct v4l2_subdev_pad_ops imx334_pad_ops = { |
1044 | .enum_mbus_code = imx334_enum_mbus_code, |
1045 | .enum_frame_size = imx334_enum_frame_size, |
1046 | .get_fmt = imx334_get_pad_format, |
1047 | .set_fmt = imx334_set_pad_format, |
1048 | .enable_streams = imx334_enable_streams, |
1049 | .disable_streams = imx334_disable_streams, |
1050 | }; |
1051 | |
1052 | static const struct v4l2_subdev_ops imx334_subdev_ops = { |
1053 | .video = &imx334_video_ops, |
1054 | .pad = &imx334_pad_ops, |
1055 | }; |
1056 | |
1057 | static const struct v4l2_subdev_internal_ops imx334_internal_ops = { |
1058 | .init_state = imx334_init_state, |
1059 | }; |
1060 | |
1061 | /** |
1062 | * imx334_power_on() - Sensor power on sequence |
1063 | * @dev: pointer to i2c device |
1064 | * |
1065 | * Return: 0 if successful, error code otherwise. |
1066 | */ |
1067 | static int imx334_power_on(struct device *dev) |
1068 | { |
1069 | struct v4l2_subdev *sd = dev_get_drvdata(dev); |
1070 | struct imx334 *imx334 = to_imx334(subdev: sd); |
1071 | int ret; |
1072 | |
1073 | gpiod_set_value_cansleep(desc: imx334->reset_gpio, value: 1); |
1074 | |
1075 | ret = clk_prepare_enable(clk: imx334->inclk); |
1076 | if (ret) { |
1077 | dev_err(imx334->dev, "fail to enable inclk\n"); |
1078 | goto error_reset; |
1079 | } |
1080 | |
1081 | usleep_range(min: 18000, max: 20000); |
1082 | |
1083 | return 0; |
1084 | |
1085 | error_reset: |
1086 | gpiod_set_value_cansleep(desc: imx334->reset_gpio, value: 0); |
1087 | |
1088 | return ret; |
1089 | } |
1090 | |
1091 | /** |
1092 | * imx334_power_off() - Sensor power off sequence |
1093 | * @dev: pointer to i2c device |
1094 | * |
1095 | * Return: 0 if successful, error code otherwise. |
1096 | */ |
1097 | static int imx334_power_off(struct device *dev) |
1098 | { |
1099 | struct v4l2_subdev *sd = dev_get_drvdata(dev); |
1100 | struct imx334 *imx334 = to_imx334(subdev: sd); |
1101 | |
1102 | gpiod_set_value_cansleep(desc: imx334->reset_gpio, value: 0); |
1103 | |
1104 | clk_disable_unprepare(clk: imx334->inclk); |
1105 | |
1106 | return 0; |
1107 | } |
1108 | |
1109 | /** |
1110 | * imx334_init_controls() - Initialize sensor subdevice controls |
1111 | * @imx334: pointer to imx334 device |
1112 | * |
1113 | * Return: 0 if successful, error code otherwise. |
1114 | */ |
1115 | static int imx334_init_controls(struct imx334 *imx334) |
1116 | { |
1117 | struct v4l2_ctrl_handler *ctrl_hdlr = &imx334->ctrl_handler; |
1118 | const struct imx334_mode *mode = imx334->cur_mode; |
1119 | u32 lpfr; |
1120 | int ret; |
1121 | |
1122 | ret = v4l2_ctrl_handler_init(ctrl_hdlr, 7); |
1123 | if (ret) |
1124 | return ret; |
1125 | |
1126 | /* Initialize exposure and gain */ |
1127 | lpfr = mode->vblank + mode->height; |
1128 | imx334->exp_ctrl = v4l2_ctrl_new_std(hdl: ctrl_hdlr, |
1129 | ops: &imx334_ctrl_ops, |
1130 | V4L2_CID_EXPOSURE, |
1131 | IMX334_EXPOSURE_MIN, |
1132 | max: lpfr - IMX334_EXPOSURE_OFFSET, |
1133 | IMX334_EXPOSURE_STEP, |
1134 | IMX334_EXPOSURE_DEFAULT); |
1135 | |
1136 | imx334->again_ctrl = v4l2_ctrl_new_std(hdl: ctrl_hdlr, |
1137 | ops: &imx334_ctrl_ops, |
1138 | V4L2_CID_ANALOGUE_GAIN, |
1139 | IMX334_AGAIN_MIN, |
1140 | IMX334_AGAIN_MAX, |
1141 | IMX334_AGAIN_STEP, |
1142 | IMX334_AGAIN_DEFAULT); |
1143 | |
1144 | v4l2_ctrl_cluster(ncontrols: 2, controls: &imx334->exp_ctrl); |
1145 | |
1146 | imx334->vblank_ctrl = v4l2_ctrl_new_std(hdl: ctrl_hdlr, |
1147 | ops: &imx334_ctrl_ops, |
1148 | V4L2_CID_VBLANK, |
1149 | min: mode->vblank_min, |
1150 | max: mode->vblank_max, |
1151 | step: 1, def: mode->vblank); |
1152 | |
1153 | /* Read only controls */ |
1154 | imx334->pclk_ctrl = v4l2_ctrl_new_std(hdl: ctrl_hdlr, |
1155 | ops: &imx334_ctrl_ops, |
1156 | V4L2_CID_PIXEL_RATE, |
1157 | min: mode->pclk, max: mode->pclk, |
1158 | step: 1, def: mode->pclk); |
1159 | |
1160 | imx334->link_freq_ctrl = v4l2_ctrl_new_int_menu(hdl: ctrl_hdlr, |
1161 | ops: &imx334_ctrl_ops, |
1162 | V4L2_CID_LINK_FREQ, |
1163 | max: __fls(word: imx334->link_freq_bitmap), |
1164 | __ffs(imx334->link_freq_bitmap), |
1165 | qmenu_int: link_freq); |
1166 | |
1167 | if (imx334->link_freq_ctrl) |
1168 | imx334->link_freq_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
1169 | |
1170 | imx334->hblank_ctrl = v4l2_ctrl_new_std(hdl: ctrl_hdlr, |
1171 | ops: &imx334_ctrl_ops, |
1172 | V4L2_CID_HBLANK, |
1173 | IMX334_REG_MIN, |
1174 | IMX334_REG_MAX, |
1175 | step: 1, def: mode->hblank); |
1176 | if (imx334->hblank_ctrl) |
1177 | imx334->hblank_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; |
1178 | |
1179 | v4l2_ctrl_new_std_menu_items(hdl: ctrl_hdlr, ops: &imx334_ctrl_ops, |
1180 | V4L2_CID_TEST_PATTERN, |
1181 | ARRAY_SIZE(imx334_test_pattern_menu) - 1, |
1182 | mask: 0, def: 0, qmenu: imx334_test_pattern_menu); |
1183 | |
1184 | if (ctrl_hdlr->error) { |
1185 | dev_err(imx334->dev, "control init failed: %d", |
1186 | ctrl_hdlr->error); |
1187 | v4l2_ctrl_handler_free(hdl: ctrl_hdlr); |
1188 | return ctrl_hdlr->error; |
1189 | } |
1190 | |
1191 | imx334->sd.ctrl_handler = ctrl_hdlr; |
1192 | |
1193 | return 0; |
1194 | } |
1195 | |
1196 | /** |
1197 | * imx334_probe() - I2C client device binding |
1198 | * @client: pointer to i2c client device |
1199 | * |
1200 | * Return: 0 if successful, error code otherwise. |
1201 | */ |
1202 | static int imx334_probe(struct i2c_client *client) |
1203 | { |
1204 | struct imx334 *imx334; |
1205 | int ret; |
1206 | |
1207 | imx334 = devm_kzalloc(dev: &client->dev, size: sizeof(*imx334), GFP_KERNEL); |
1208 | if (!imx334) |
1209 | return -ENOMEM; |
1210 | |
1211 | imx334->dev = &client->dev; |
1212 | imx334->cci = devm_cci_regmap_init_i2c(client, reg_addr_bits: 16); |
1213 | if (IS_ERR(ptr: imx334->cci)) { |
1214 | dev_err(imx334->dev, "Unable to initialize I2C\n"); |
1215 | return -ENODEV; |
1216 | } |
1217 | |
1218 | /* Initialize subdev */ |
1219 | v4l2_i2c_subdev_init(sd: &imx334->sd, client, ops: &imx334_subdev_ops); |
1220 | imx334->sd.internal_ops = &imx334_internal_ops; |
1221 | |
1222 | ret = imx334_parse_hw_config(imx334); |
1223 | if (ret) |
1224 | return dev_err_probe(dev: imx334->dev, err: ret, |
1225 | fmt: "HW configuration is not supported\n"); |
1226 | |
1227 | ret = imx334_power_on(dev: imx334->dev); |
1228 | if (ret) { |
1229 | dev_err_probe(dev: imx334->dev, err: ret, fmt: "failed to power-on the sensor\n"); |
1230 | return ret; |
1231 | } |
1232 | |
1233 | /* Check module identity */ |
1234 | ret = imx334_detect(imx334); |
1235 | if (ret) { |
1236 | dev_err(imx334->dev, "failed to find sensor: %d\n", ret); |
1237 | goto error_power_off; |
1238 | } |
1239 | |
1240 | /* Set default mode to max resolution */ |
1241 | imx334->cur_mode = &supported_modes[__ffs(imx334->link_freq_bitmap)]; |
1242 | imx334->cur_code = imx334_mbus_codes[0]; |
1243 | imx334->vblank = imx334->cur_mode->vblank; |
1244 | |
1245 | ret = imx334_init_controls(imx334); |
1246 | if (ret) { |
1247 | dev_err(imx334->dev, "failed to init controls: %d\n", ret); |
1248 | goto error_power_off; |
1249 | } |
1250 | |
1251 | /* Initialize subdev */ |
1252 | imx334->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
1253 | imx334->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; |
1254 | |
1255 | /* Initialize source pad */ |
1256 | imx334->pad.flags = MEDIA_PAD_FL_SOURCE; |
1257 | ret = media_entity_pads_init(entity: &imx334->sd.entity, num_pads: 1, pads: &imx334->pad); |
1258 | if (ret) { |
1259 | dev_err(imx334->dev, "failed to init entity pads: %d\n", ret); |
1260 | goto error_handler_free; |
1261 | } |
1262 | |
1263 | imx334->sd.state_lock = imx334->ctrl_handler.lock; |
1264 | ret = v4l2_subdev_init_finalize(&imx334->sd); |
1265 | if (ret < 0) { |
1266 | dev_err(imx334->dev, "subdev init error: %d\n", ret); |
1267 | goto error_media_entity; |
1268 | } |
1269 | |
1270 | pm_runtime_set_active(dev: imx334->dev); |
1271 | pm_runtime_enable(dev: imx334->dev); |
1272 | |
1273 | ret = v4l2_async_register_subdev_sensor(sd: &imx334->sd); |
1274 | if (ret < 0) { |
1275 | dev_err(imx334->dev, |
1276 | "failed to register async subdev: %d\n", ret); |
1277 | goto error_subdev_cleanup; |
1278 | } |
1279 | |
1280 | pm_runtime_idle(dev: imx334->dev); |
1281 | |
1282 | return 0; |
1283 | |
1284 | error_subdev_cleanup: |
1285 | v4l2_subdev_cleanup(sd: &imx334->sd); |
1286 | pm_runtime_disable(dev: imx334->dev); |
1287 | pm_runtime_set_suspended(dev: imx334->dev); |
1288 | |
1289 | error_media_entity: |
1290 | media_entity_cleanup(entity: &imx334->sd.entity); |
1291 | |
1292 | error_handler_free: |
1293 | v4l2_ctrl_handler_free(hdl: imx334->sd.ctrl_handler); |
1294 | |
1295 | error_power_off: |
1296 | imx334_power_off(dev: imx334->dev); |
1297 | |
1298 | return ret; |
1299 | } |
1300 | |
1301 | /** |
1302 | * imx334_remove() - I2C client device unbinding |
1303 | * @client: pointer to I2C client device |
1304 | * |
1305 | * Return: 0 if successful, error code otherwise. |
1306 | */ |
1307 | static void imx334_remove(struct i2c_client *client) |
1308 | { |
1309 | struct v4l2_subdev *sd = i2c_get_clientdata(client); |
1310 | |
1311 | v4l2_async_unregister_subdev(sd); |
1312 | v4l2_subdev_cleanup(sd); |
1313 | media_entity_cleanup(entity: &sd->entity); |
1314 | v4l2_ctrl_handler_free(hdl: sd->ctrl_handler); |
1315 | |
1316 | pm_runtime_disable(dev: &client->dev); |
1317 | if (!pm_runtime_status_suspended(dev: &client->dev)) { |
1318 | imx334_power_off(dev: &client->dev); |
1319 | pm_runtime_set_suspended(dev: &client->dev); |
1320 | } |
1321 | } |
1322 | |
1323 | static const struct dev_pm_ops imx334_pm_ops = { |
1324 | SET_RUNTIME_PM_OPS(imx334_power_off, imx334_power_on, NULL) |
1325 | }; |
1326 | |
1327 | static const struct of_device_id imx334_of_match[] = { |
1328 | { .compatible = "sony,imx334"}, |
1329 | { } |
1330 | }; |
1331 | |
1332 | MODULE_DEVICE_TABLE(of, imx334_of_match); |
1333 | |
1334 | static struct i2c_driver imx334_driver = { |
1335 | .probe = imx334_probe, |
1336 | .remove = imx334_remove, |
1337 | .driver = { |
1338 | .name = "imx334", |
1339 | .pm = &imx334_pm_ops, |
1340 | .of_match_table = imx334_of_match, |
1341 | }, |
1342 | }; |
1343 | |
1344 | module_i2c_driver(imx334_driver); |
1345 | |
1346 | MODULE_DESCRIPTION("Sony imx334 sensor driver"); |
1347 | MODULE_LICENSE("GPL"); |
1348 |
Definitions
- imx334_reg_list
- imx334_mode
- imx334
- link_freq
- common_mode_regs
- mode_640x480_regs
- mode_1280x720_regs
- mode_1920x1080_regs
- mode_3840x2160_regs
- imx334_test_pattern_menu
- imx334_test_pattern_val
- raw10_framefmt_regs
- raw12_framefmt_regs
- imx334_mbus_codes
- supported_modes
- to_imx334
- imx334_update_controls
- imx334_update_exp_gain
- imx334_set_ctrl
- imx334_ctrl_ops
- imx334_get_format_code
- imx334_enum_mbus_code
- imx334_enum_frame_size
- imx334_fill_pad_format
- imx334_get_pad_format
- imx334_set_pad_format
- imx334_init_state
- imx334_set_framefmt
- imx334_enable_streams
- imx334_disable_streams
- imx334_detect
- imx334_parse_hw_config
- imx334_video_ops
- imx334_pad_ops
- imx334_subdev_ops
- imx334_internal_ops
- imx334_power_on
- imx334_power_off
- imx334_init_controls
- imx334_probe
- imx334_remove
- imx334_pm_ops
- imx334_of_match
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