1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for the OV5645 camera sensor.
4 *
5 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
6 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
7 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
8 *
9 * Based on:
10 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
11 * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
12 * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
13 * - the OV5640 driver posted on linux-media:
14 * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
15 */
16
17#include <linux/bitops.h>
18#include <linux/clk.h>
19#include <linux/delay.h>
20#include <linux/device.h>
21#include <linux/gpio/consumer.h>
22#include <linux/i2c.h>
23#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/of.h>
26#include <linux/of_graph.h>
27#include <linux/pm_runtime.h>
28#include <linux/regulator/consumer.h>
29#include <linux/slab.h>
30#include <linux/types.h>
31#include <media/v4l2-ctrls.h>
32#include <media/v4l2-fwnode.h>
33#include <media/v4l2-subdev.h>
34
35#define OV5645_SYSTEM_CTRL0 0x3008
36#define OV5645_SYSTEM_CTRL0_START 0x02
37#define OV5645_SYSTEM_CTRL0_STOP 0x42
38#define OV5645_CHIP_ID_HIGH 0x300a
39#define OV5645_CHIP_ID_HIGH_BYTE 0x56
40#define OV5645_CHIP_ID_LOW 0x300b
41#define OV5645_CHIP_ID_LOW_BYTE 0x45
42#define OV5645_IO_MIPI_CTRL00 0x300e
43#define OV5645_PAD_OUTPUT00 0x3019
44#define OV5645_AWB_MANUAL_CONTROL 0x3406
45#define OV5645_AWB_MANUAL_ENABLE BIT(0)
46#define OV5645_AEC_PK_MANUAL 0x3503
47#define OV5645_AEC_MANUAL_ENABLE BIT(0)
48#define OV5645_AGC_MANUAL_ENABLE BIT(1)
49#define OV5645_TIMING_TC_REG20 0x3820
50#define OV5645_SENSOR_VFLIP BIT(1)
51#define OV5645_ISP_VFLIP BIT(2)
52#define OV5645_TIMING_TC_REG21 0x3821
53#define OV5645_SENSOR_MIRROR BIT(1)
54#define OV5645_MIPI_CTRL00 0x4800
55#define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
56#define OV5645_TEST_PATTERN_MASK 0x3
57#define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
58#define OV5645_TEST_PATTERN_ENABLE BIT(7)
59#define OV5645_SDE_SAT_U 0x5583
60#define OV5645_SDE_SAT_V 0x5584
61
62/* regulator supplies */
63static const char * const ov5645_supply_name[] = {
64 "vdddo", /* Digital I/O (1.8V) supply */
65 "vdda", /* Analog (2.8V) supply */
66 "vddd", /* Digital Core (1.5V) supply */
67};
68
69#define OV5645_NUM_SUPPLIES ARRAY_SIZE(ov5645_supply_name)
70
71struct reg_value {
72 u16 reg;
73 u8 val;
74};
75
76struct ov5645_mode_info {
77 u32 width;
78 u32 height;
79 const struct reg_value *data;
80 u32 data_size;
81 u32 pixel_clock;
82 u32 link_freq;
83};
84
85struct ov5645 {
86 struct i2c_client *i2c_client;
87 struct device *dev;
88 struct v4l2_subdev sd;
89 struct media_pad pad;
90 struct v4l2_fwnode_endpoint ep;
91 struct v4l2_mbus_framefmt fmt;
92 struct v4l2_rect crop;
93 struct clk *xclk;
94
95 struct regulator_bulk_data supplies[OV5645_NUM_SUPPLIES];
96
97 const struct ov5645_mode_info *current_mode;
98
99 struct v4l2_ctrl_handler ctrls;
100 struct v4l2_ctrl *pixel_clock;
101 struct v4l2_ctrl *link_freq;
102
103 /* Cached register values */
104 u8 aec_pk_manual;
105 u8 timing_tc_reg20;
106 u8 timing_tc_reg21;
107
108 struct mutex power_lock; /* lock to protect power state */
109
110 struct gpio_desc *enable_gpio;
111 struct gpio_desc *rst_gpio;
112};
113
114static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
115{
116 return container_of(sd, struct ov5645, sd);
117}
118
119static const struct reg_value ov5645_global_init_setting[] = {
120 { 0x3103, 0x11 },
121 { 0x3008, 0x42 },
122 { 0x3103, 0x03 },
123 { 0x3503, 0x07 },
124 { 0x3002, 0x1c },
125 { 0x3006, 0xc3 },
126 { 0x3017, 0x00 },
127 { 0x3018, 0x00 },
128 { 0x302e, 0x0b },
129 { 0x3037, 0x13 },
130 { 0x3108, 0x01 },
131 { 0x3611, 0x06 },
132 { 0x3500, 0x00 },
133 { 0x3501, 0x01 },
134 { 0x3502, 0x00 },
135 { 0x350a, 0x00 },
136 { 0x350b, 0x3f },
137 { 0x3620, 0x33 },
138 { 0x3621, 0xe0 },
139 { 0x3622, 0x01 },
140 { 0x3630, 0x2e },
141 { 0x3631, 0x00 },
142 { 0x3632, 0x32 },
143 { 0x3633, 0x52 },
144 { 0x3634, 0x70 },
145 { 0x3635, 0x13 },
146 { 0x3636, 0x03 },
147 { 0x3703, 0x5a },
148 { 0x3704, 0xa0 },
149 { 0x3705, 0x1a },
150 { 0x3709, 0x12 },
151 { 0x370b, 0x61 },
152 { 0x370f, 0x10 },
153 { 0x3715, 0x78 },
154 { 0x3717, 0x01 },
155 { 0x371b, 0x20 },
156 { 0x3731, 0x12 },
157 { 0x3901, 0x0a },
158 { 0x3905, 0x02 },
159 { 0x3906, 0x10 },
160 { 0x3719, 0x86 },
161 { 0x3810, 0x00 },
162 { 0x3811, 0x10 },
163 { 0x3812, 0x00 },
164 { 0x3821, 0x01 },
165 { 0x3824, 0x01 },
166 { 0x3826, 0x03 },
167 { 0x3828, 0x08 },
168 { 0x3a19, 0xf8 },
169 { 0x3c01, 0x34 },
170 { 0x3c04, 0x28 },
171 { 0x3c05, 0x98 },
172 { 0x3c07, 0x07 },
173 { 0x3c09, 0xc2 },
174 { 0x3c0a, 0x9c },
175 { 0x3c0b, 0x40 },
176 { 0x3c01, 0x34 },
177 { 0x4001, 0x02 },
178 { 0x4514, 0x00 },
179 { 0x4520, 0xb0 },
180 { 0x460b, 0x37 },
181 { 0x460c, 0x20 },
182 { 0x4818, 0x01 },
183 { 0x481d, 0xf0 },
184 { 0x481f, 0x50 },
185 { 0x4823, 0x70 },
186 { 0x4831, 0x14 },
187 { 0x5000, 0xa7 },
188 { 0x5001, 0x83 },
189 { 0x501d, 0x00 },
190 { 0x501f, 0x00 },
191 { 0x503d, 0x00 },
192 { 0x505c, 0x30 },
193 { 0x5181, 0x59 },
194 { 0x5183, 0x00 },
195 { 0x5191, 0xf0 },
196 { 0x5192, 0x03 },
197 { 0x5684, 0x10 },
198 { 0x5685, 0xa0 },
199 { 0x5686, 0x0c },
200 { 0x5687, 0x78 },
201 { 0x5a00, 0x08 },
202 { 0x5a21, 0x00 },
203 { 0x5a24, 0x00 },
204 { 0x3008, 0x02 },
205 { 0x3503, 0x00 },
206 { 0x5180, 0xff },
207 { 0x5181, 0xf2 },
208 { 0x5182, 0x00 },
209 { 0x5183, 0x14 },
210 { 0x5184, 0x25 },
211 { 0x5185, 0x24 },
212 { 0x5186, 0x09 },
213 { 0x5187, 0x09 },
214 { 0x5188, 0x0a },
215 { 0x5189, 0x75 },
216 { 0x518a, 0x52 },
217 { 0x518b, 0xea },
218 { 0x518c, 0xa8 },
219 { 0x518d, 0x42 },
220 { 0x518e, 0x38 },
221 { 0x518f, 0x56 },
222 { 0x5190, 0x42 },
223 { 0x5191, 0xf8 },
224 { 0x5192, 0x04 },
225 { 0x5193, 0x70 },
226 { 0x5194, 0xf0 },
227 { 0x5195, 0xf0 },
228 { 0x5196, 0x03 },
229 { 0x5197, 0x01 },
230 { 0x5198, 0x04 },
231 { 0x5199, 0x12 },
232 { 0x519a, 0x04 },
233 { 0x519b, 0x00 },
234 { 0x519c, 0x06 },
235 { 0x519d, 0x82 },
236 { 0x519e, 0x38 },
237 { 0x5381, 0x1e },
238 { 0x5382, 0x5b },
239 { 0x5383, 0x08 },
240 { 0x5384, 0x0a },
241 { 0x5385, 0x7e },
242 { 0x5386, 0x88 },
243 { 0x5387, 0x7c },
244 { 0x5388, 0x6c },
245 { 0x5389, 0x10 },
246 { 0x538a, 0x01 },
247 { 0x538b, 0x98 },
248 { 0x5300, 0x08 },
249 { 0x5301, 0x30 },
250 { 0x5302, 0x10 },
251 { 0x5303, 0x00 },
252 { 0x5304, 0x08 },
253 { 0x5305, 0x30 },
254 { 0x5306, 0x08 },
255 { 0x5307, 0x16 },
256 { 0x5309, 0x08 },
257 { 0x530a, 0x30 },
258 { 0x530b, 0x04 },
259 { 0x530c, 0x06 },
260 { 0x5480, 0x01 },
261 { 0x5481, 0x08 },
262 { 0x5482, 0x14 },
263 { 0x5483, 0x28 },
264 { 0x5484, 0x51 },
265 { 0x5485, 0x65 },
266 { 0x5486, 0x71 },
267 { 0x5487, 0x7d },
268 { 0x5488, 0x87 },
269 { 0x5489, 0x91 },
270 { 0x548a, 0x9a },
271 { 0x548b, 0xaa },
272 { 0x548c, 0xb8 },
273 { 0x548d, 0xcd },
274 { 0x548e, 0xdd },
275 { 0x548f, 0xea },
276 { 0x5490, 0x1d },
277 { 0x5580, 0x02 },
278 { 0x5583, 0x40 },
279 { 0x5584, 0x10 },
280 { 0x5589, 0x10 },
281 { 0x558a, 0x00 },
282 { 0x558b, 0xf8 },
283 { 0x5800, 0x3f },
284 { 0x5801, 0x16 },
285 { 0x5802, 0x0e },
286 { 0x5803, 0x0d },
287 { 0x5804, 0x17 },
288 { 0x5805, 0x3f },
289 { 0x5806, 0x0b },
290 { 0x5807, 0x06 },
291 { 0x5808, 0x04 },
292 { 0x5809, 0x04 },
293 { 0x580a, 0x06 },
294 { 0x580b, 0x0b },
295 { 0x580c, 0x09 },
296 { 0x580d, 0x03 },
297 { 0x580e, 0x00 },
298 { 0x580f, 0x00 },
299 { 0x5810, 0x03 },
300 { 0x5811, 0x08 },
301 { 0x5812, 0x0a },
302 { 0x5813, 0x03 },
303 { 0x5814, 0x00 },
304 { 0x5815, 0x00 },
305 { 0x5816, 0x04 },
306 { 0x5817, 0x09 },
307 { 0x5818, 0x0f },
308 { 0x5819, 0x08 },
309 { 0x581a, 0x06 },
310 { 0x581b, 0x06 },
311 { 0x581c, 0x08 },
312 { 0x581d, 0x0c },
313 { 0x581e, 0x3f },
314 { 0x581f, 0x1e },
315 { 0x5820, 0x12 },
316 { 0x5821, 0x13 },
317 { 0x5822, 0x21 },
318 { 0x5823, 0x3f },
319 { 0x5824, 0x68 },
320 { 0x5825, 0x28 },
321 { 0x5826, 0x2c },
322 { 0x5827, 0x28 },
323 { 0x5828, 0x08 },
324 { 0x5829, 0x48 },
325 { 0x582a, 0x64 },
326 { 0x582b, 0x62 },
327 { 0x582c, 0x64 },
328 { 0x582d, 0x28 },
329 { 0x582e, 0x46 },
330 { 0x582f, 0x62 },
331 { 0x5830, 0x60 },
332 { 0x5831, 0x62 },
333 { 0x5832, 0x26 },
334 { 0x5833, 0x48 },
335 { 0x5834, 0x66 },
336 { 0x5835, 0x44 },
337 { 0x5836, 0x64 },
338 { 0x5837, 0x28 },
339 { 0x5838, 0x66 },
340 { 0x5839, 0x48 },
341 { 0x583a, 0x2c },
342 { 0x583b, 0x28 },
343 { 0x583c, 0x26 },
344 { 0x583d, 0xae },
345 { 0x5025, 0x00 },
346 { 0x3a0f, 0x30 },
347 { 0x3a10, 0x28 },
348 { 0x3a1b, 0x30 },
349 { 0x3a1e, 0x26 },
350 { 0x3a11, 0x60 },
351 { 0x3a1f, 0x14 },
352 { 0x0601, 0x02 },
353 { 0x3008, 0x42 },
354 { 0x3008, 0x02 },
355 { OV5645_IO_MIPI_CTRL00, 0x40 },
356 { OV5645_MIPI_CTRL00, 0x24 },
357 { OV5645_PAD_OUTPUT00, 0x70 }
358};
359
360static const struct reg_value ov5645_setting_sxga[] = {
361 { 0x3612, 0xa9 },
362 { 0x3614, 0x50 },
363 { 0x3618, 0x00 },
364 { 0x3034, 0x18 },
365 { 0x3035, 0x21 },
366 { 0x3036, 0x70 },
367 { 0x3600, 0x09 },
368 { 0x3601, 0x43 },
369 { 0x3708, 0x66 },
370 { 0x370c, 0xc3 },
371 { 0x3800, 0x00 },
372 { 0x3801, 0x00 },
373 { 0x3802, 0x00 },
374 { 0x3803, 0x06 },
375 { 0x3804, 0x0a },
376 { 0x3805, 0x3f },
377 { 0x3806, 0x07 },
378 { 0x3807, 0x9d },
379 { 0x3808, 0x05 },
380 { 0x3809, 0x00 },
381 { 0x380a, 0x03 },
382 { 0x380b, 0xc0 },
383 { 0x380c, 0x07 },
384 { 0x380d, 0x68 },
385 { 0x380e, 0x03 },
386 { 0x380f, 0xd8 },
387 { 0x3813, 0x06 },
388 { 0x3814, 0x31 },
389 { 0x3815, 0x31 },
390 { 0x3820, 0x47 },
391 { 0x3a02, 0x03 },
392 { 0x3a03, 0xd8 },
393 { 0x3a08, 0x01 },
394 { 0x3a09, 0xf8 },
395 { 0x3a0a, 0x01 },
396 { 0x3a0b, 0xa4 },
397 { 0x3a0e, 0x02 },
398 { 0x3a0d, 0x02 },
399 { 0x3a14, 0x03 },
400 { 0x3a15, 0xd8 },
401 { 0x3a18, 0x00 },
402 { 0x4004, 0x02 },
403 { 0x4005, 0x18 },
404 { 0x4300, 0x32 },
405 { 0x4202, 0x00 }
406};
407
408static const struct reg_value ov5645_setting_1080p[] = {
409 { 0x3612, 0xab },
410 { 0x3614, 0x50 },
411 { 0x3618, 0x04 },
412 { 0x3034, 0x18 },
413 { 0x3035, 0x11 },
414 { 0x3036, 0x54 },
415 { 0x3600, 0x08 },
416 { 0x3601, 0x33 },
417 { 0x3708, 0x63 },
418 { 0x370c, 0xc0 },
419 { 0x3800, 0x01 },
420 { 0x3801, 0x50 },
421 { 0x3802, 0x01 },
422 { 0x3803, 0xb2 },
423 { 0x3804, 0x08 },
424 { 0x3805, 0xef },
425 { 0x3806, 0x05 },
426 { 0x3807, 0xf1 },
427 { 0x3808, 0x07 },
428 { 0x3809, 0x80 },
429 { 0x380a, 0x04 },
430 { 0x380b, 0x38 },
431 { 0x380c, 0x09 },
432 { 0x380d, 0xc4 },
433 { 0x380e, 0x04 },
434 { 0x380f, 0x60 },
435 { 0x3813, 0x04 },
436 { 0x3814, 0x11 },
437 { 0x3815, 0x11 },
438 { 0x3820, 0x47 },
439 { 0x4514, 0x88 },
440 { 0x3a02, 0x04 },
441 { 0x3a03, 0x60 },
442 { 0x3a08, 0x01 },
443 { 0x3a09, 0x50 },
444 { 0x3a0a, 0x01 },
445 { 0x3a0b, 0x18 },
446 { 0x3a0e, 0x03 },
447 { 0x3a0d, 0x04 },
448 { 0x3a14, 0x04 },
449 { 0x3a15, 0x60 },
450 { 0x3a18, 0x00 },
451 { 0x4004, 0x06 },
452 { 0x4005, 0x18 },
453 { 0x4300, 0x32 },
454 { 0x4202, 0x00 },
455 { 0x4837, 0x0b }
456};
457
458static const struct reg_value ov5645_setting_full[] = {
459 { 0x3612, 0xab },
460 { 0x3614, 0x50 },
461 { 0x3618, 0x04 },
462 { 0x3034, 0x18 },
463 { 0x3035, 0x11 },
464 { 0x3036, 0x54 },
465 { 0x3600, 0x08 },
466 { 0x3601, 0x33 },
467 { 0x3708, 0x63 },
468 { 0x370c, 0xc0 },
469 { 0x3800, 0x00 },
470 { 0x3801, 0x00 },
471 { 0x3802, 0x00 },
472 { 0x3803, 0x00 },
473 { 0x3804, 0x0a },
474 { 0x3805, 0x3f },
475 { 0x3806, 0x07 },
476 { 0x3807, 0x9f },
477 { 0x3808, 0x0a },
478 { 0x3809, 0x20 },
479 { 0x380a, 0x07 },
480 { 0x380b, 0x98 },
481 { 0x380c, 0x0b },
482 { 0x380d, 0x1c },
483 { 0x380e, 0x07 },
484 { 0x380f, 0xb0 },
485 { 0x3813, 0x06 },
486 { 0x3814, 0x11 },
487 { 0x3815, 0x11 },
488 { 0x3820, 0x47 },
489 { 0x4514, 0x88 },
490 { 0x3a02, 0x07 },
491 { 0x3a03, 0xb0 },
492 { 0x3a08, 0x01 },
493 { 0x3a09, 0x27 },
494 { 0x3a0a, 0x00 },
495 { 0x3a0b, 0xf6 },
496 { 0x3a0e, 0x06 },
497 { 0x3a0d, 0x08 },
498 { 0x3a14, 0x07 },
499 { 0x3a15, 0xb0 },
500 { 0x3a18, 0x01 },
501 { 0x4004, 0x06 },
502 { 0x4005, 0x18 },
503 { 0x4300, 0x32 },
504 { 0x4837, 0x0b },
505 { 0x4202, 0x00 }
506};
507
508static const s64 link_freq[] = {
509 224000000,
510 336000000
511};
512
513static const struct ov5645_mode_info ov5645_mode_info_data[] = {
514 {
515 .width = 1280,
516 .height = 960,
517 .data = ov5645_setting_sxga,
518 .data_size = ARRAY_SIZE(ov5645_setting_sxga),
519 .pixel_clock = 112000000,
520 .link_freq = 0 /* an index in link_freq[] */
521 },
522 {
523 .width = 1920,
524 .height = 1080,
525 .data = ov5645_setting_1080p,
526 .data_size = ARRAY_SIZE(ov5645_setting_1080p),
527 .pixel_clock = 168000000,
528 .link_freq = 1 /* an index in link_freq[] */
529 },
530 {
531 .width = 2592,
532 .height = 1944,
533 .data = ov5645_setting_full,
534 .data_size = ARRAY_SIZE(ov5645_setting_full),
535 .pixel_clock = 168000000,
536 .link_freq = 1 /* an index in link_freq[] */
537 },
538};
539
540static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
541{
542 u8 regbuf[3];
543 int ret;
544
545 regbuf[0] = reg >> 8;
546 regbuf[1] = reg & 0xff;
547 regbuf[2] = val;
548
549 ret = i2c_master_send(client: ov5645->i2c_client, buf: regbuf, count: 3);
550 if (ret < 0) {
551 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
552 __func__, ret, reg, val);
553 return ret;
554 }
555
556 return 0;
557}
558
559static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
560{
561 u8 regbuf[2];
562 int ret;
563
564 regbuf[0] = reg >> 8;
565 regbuf[1] = reg & 0xff;
566
567 ret = i2c_master_send(client: ov5645->i2c_client, buf: regbuf, count: 2);
568 if (ret < 0) {
569 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
570 __func__, ret, reg);
571 return ret;
572 }
573
574 ret = i2c_master_recv(client: ov5645->i2c_client, buf: val, count: 1);
575 if (ret < 0) {
576 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
577 __func__, ret, reg);
578 return ret;
579 }
580
581 return 0;
582}
583
584static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
585{
586 u8 val = ov5645->aec_pk_manual;
587 int ret;
588
589 if (mode == V4L2_EXPOSURE_AUTO)
590 val &= ~OV5645_AEC_MANUAL_ENABLE;
591 else /* V4L2_EXPOSURE_MANUAL */
592 val |= OV5645_AEC_MANUAL_ENABLE;
593
594 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
595 if (!ret)
596 ov5645->aec_pk_manual = val;
597
598 return ret;
599}
600
601static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
602{
603 u8 val = ov5645->aec_pk_manual;
604 int ret;
605
606 if (enable)
607 val &= ~OV5645_AGC_MANUAL_ENABLE;
608 else
609 val |= OV5645_AGC_MANUAL_ENABLE;
610
611 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
612 if (!ret)
613 ov5645->aec_pk_manual = val;
614
615 return ret;
616}
617
618static int ov5645_set_register_array(struct ov5645 *ov5645,
619 const struct reg_value *settings,
620 unsigned int num_settings)
621{
622 unsigned int i;
623 int ret;
624
625 for (i = 0; i < num_settings; ++i, ++settings) {
626 ret = ov5645_write_reg(ov5645, reg: settings->reg, val: settings->val);
627 if (ret < 0)
628 return ret;
629
630 if (settings->reg == OV5645_SYSTEM_CTRL0 &&
631 settings->val == OV5645_SYSTEM_CTRL0_START)
632 usleep_range(min: 1000, max: 2000);
633 }
634
635 return 0;
636}
637
638static int ov5645_set_power_off(struct device *dev)
639{
640 struct v4l2_subdev *sd = dev_get_drvdata(dev);
641 struct ov5645 *ov5645 = to_ov5645(sd);
642
643 ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, val: 0x58);
644 gpiod_set_value_cansleep(desc: ov5645->rst_gpio, value: 1);
645 gpiod_set_value_cansleep(desc: ov5645->enable_gpio, value: 0);
646 clk_disable_unprepare(clk: ov5645->xclk);
647 regulator_bulk_disable(OV5645_NUM_SUPPLIES, consumers: ov5645->supplies);
648
649 return 0;
650}
651
652static int ov5645_set_power_on(struct device *dev)
653{
654 struct v4l2_subdev *sd = dev_get_drvdata(dev);
655 struct ov5645 *ov5645 = to_ov5645(sd);
656 int ret;
657
658 ret = regulator_bulk_enable(OV5645_NUM_SUPPLIES, consumers: ov5645->supplies);
659 if (ret < 0)
660 return ret;
661
662 ret = clk_prepare_enable(clk: ov5645->xclk);
663 if (ret < 0) {
664 dev_err(ov5645->dev, "clk prepare enable failed\n");
665 regulator_bulk_disable(OV5645_NUM_SUPPLIES, consumers: ov5645->supplies);
666 return ret;
667 }
668
669 usleep_range(min: 5000, max: 15000);
670 gpiod_set_value_cansleep(desc: ov5645->enable_gpio, value: 1);
671
672 usleep_range(min: 1000, max: 2000);
673 gpiod_set_value_cansleep(desc: ov5645->rst_gpio, value: 0);
674
675 msleep(msecs: 20);
676
677 ret = ov5645_set_register_array(ov5645, settings: ov5645_global_init_setting,
678 ARRAY_SIZE(ov5645_global_init_setting));
679 if (ret < 0) {
680 dev_err(ov5645->dev, "could not set init registers\n");
681 goto exit;
682 }
683
684 usleep_range(min: 500, max: 1000);
685
686 return 0;
687
688exit:
689 ov5645_set_power_off(dev);
690 return ret;
691}
692
693static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
694{
695 u32 reg_value = (value * 0x10) + 0x40;
696 int ret;
697
698 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, val: reg_value);
699 if (ret < 0)
700 return ret;
701
702 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, val: reg_value);
703}
704
705static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
706{
707 u8 val = ov5645->timing_tc_reg21;
708 int ret;
709
710 if (value == 0)
711 val &= ~(OV5645_SENSOR_MIRROR);
712 else
713 val |= (OV5645_SENSOR_MIRROR);
714
715 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
716 if (!ret)
717 ov5645->timing_tc_reg21 = val;
718
719 return ret;
720}
721
722static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
723{
724 u8 val = ov5645->timing_tc_reg20;
725 int ret;
726
727 if (value == 0)
728 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
729 else
730 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
731
732 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
733 if (!ret)
734 ov5645->timing_tc_reg20 = val;
735
736 return ret;
737}
738
739static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
740{
741 u8 val = 0;
742
743 if (value) {
744 val = OV5645_SET_TEST_PATTERN(value - 1);
745 val |= OV5645_TEST_PATTERN_ENABLE;
746 }
747
748 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
749}
750
751static const char * const ov5645_test_pattern_menu[] = {
752 "Disabled",
753 "Vertical Color Bars",
754 "Pseudo-Random Data",
755 "Color Square",
756 "Black Image",
757};
758
759static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
760{
761 u8 val = 0;
762
763 if (!enable_auto)
764 val = OV5645_AWB_MANUAL_ENABLE;
765
766 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
767}
768
769static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
770{
771 struct ov5645 *ov5645 = container_of(ctrl->handler,
772 struct ov5645, ctrls);
773 int ret;
774
775 mutex_lock(&ov5645->power_lock);
776 if (!pm_runtime_get_if_in_use(dev: ov5645->dev)) {
777 mutex_unlock(lock: &ov5645->power_lock);
778 return 0;
779 }
780
781 switch (ctrl->id) {
782 case V4L2_CID_SATURATION:
783 ret = ov5645_set_saturation(ov5645, value: ctrl->val);
784 break;
785 case V4L2_CID_AUTO_WHITE_BALANCE:
786 ret = ov5645_set_awb(ov5645, enable_auto: ctrl->val);
787 break;
788 case V4L2_CID_AUTOGAIN:
789 ret = ov5645_set_agc_mode(ov5645, enable: ctrl->val);
790 break;
791 case V4L2_CID_EXPOSURE_AUTO:
792 ret = ov5645_set_aec_mode(ov5645, mode: ctrl->val);
793 break;
794 case V4L2_CID_TEST_PATTERN:
795 ret = ov5645_set_test_pattern(ov5645, value: ctrl->val);
796 break;
797 case V4L2_CID_HFLIP:
798 ret = ov5645_set_hflip(ov5645, value: ctrl->val);
799 break;
800 case V4L2_CID_VFLIP:
801 ret = ov5645_set_vflip(ov5645, value: ctrl->val);
802 break;
803 default:
804 ret = -EINVAL;
805 break;
806 }
807
808 pm_runtime_mark_last_busy(dev: ov5645->dev);
809 pm_runtime_put_autosuspend(dev: ov5645->dev);
810 mutex_unlock(lock: &ov5645->power_lock);
811
812 return ret;
813}
814
815static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
816 .s_ctrl = ov5645_s_ctrl,
817};
818
819static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
820 struct v4l2_subdev_state *sd_state,
821 struct v4l2_subdev_mbus_code_enum *code)
822{
823 if (code->index > 0)
824 return -EINVAL;
825
826 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
827
828 return 0;
829}
830
831static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
832 struct v4l2_subdev_state *sd_state,
833 struct v4l2_subdev_frame_size_enum *fse)
834{
835 if (fse->code != MEDIA_BUS_FMT_UYVY8_1X16)
836 return -EINVAL;
837
838 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
839 return -EINVAL;
840
841 fse->min_width = ov5645_mode_info_data[fse->index].width;
842 fse->max_width = ov5645_mode_info_data[fse->index].width;
843 fse->min_height = ov5645_mode_info_data[fse->index].height;
844 fse->max_height = ov5645_mode_info_data[fse->index].height;
845
846 return 0;
847}
848
849static struct v4l2_mbus_framefmt *
850__ov5645_get_pad_format(struct ov5645 *ov5645,
851 struct v4l2_subdev_state *sd_state,
852 unsigned int pad,
853 enum v4l2_subdev_format_whence which)
854{
855 switch (which) {
856 case V4L2_SUBDEV_FORMAT_TRY:
857 return v4l2_subdev_state_get_format(sd_state, pad);
858 case V4L2_SUBDEV_FORMAT_ACTIVE:
859 return &ov5645->fmt;
860 default:
861 return NULL;
862 }
863}
864
865static int ov5645_get_format(struct v4l2_subdev *sd,
866 struct v4l2_subdev_state *sd_state,
867 struct v4l2_subdev_format *format)
868{
869 struct ov5645 *ov5645 = to_ov5645(sd);
870
871 format->format = *__ov5645_get_pad_format(ov5645, sd_state,
872 pad: format->pad,
873 which: format->which);
874 return 0;
875}
876
877static struct v4l2_rect *
878__ov5645_get_pad_crop(struct ov5645 *ov5645,
879 struct v4l2_subdev_state *sd_state,
880 unsigned int pad, enum v4l2_subdev_format_whence which)
881{
882 switch (which) {
883 case V4L2_SUBDEV_FORMAT_TRY:
884 return v4l2_subdev_state_get_crop(sd_state, pad);
885 case V4L2_SUBDEV_FORMAT_ACTIVE:
886 return &ov5645->crop;
887 default:
888 return NULL;
889 }
890}
891
892static int ov5645_set_format(struct v4l2_subdev *sd,
893 struct v4l2_subdev_state *sd_state,
894 struct v4l2_subdev_format *format)
895{
896 struct ov5645 *ov5645 = to_ov5645(sd);
897 struct v4l2_mbus_framefmt *__format;
898 struct v4l2_rect *__crop;
899 const struct ov5645_mode_info *new_mode;
900 int ret;
901
902 __crop = __ov5645_get_pad_crop(ov5645, sd_state, pad: format->pad,
903 which: format->which);
904
905 new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
906 ARRAY_SIZE(ov5645_mode_info_data),
907 width, height,
908 format->format.width, format->format.height);
909
910 __crop->width = new_mode->width;
911 __crop->height = new_mode->height;
912
913 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
914 ret = v4l2_ctrl_s_ctrl_int64(ctrl: ov5645->pixel_clock,
915 val: new_mode->pixel_clock);
916 if (ret < 0)
917 return ret;
918
919 ret = v4l2_ctrl_s_ctrl(ctrl: ov5645->link_freq,
920 val: new_mode->link_freq);
921 if (ret < 0)
922 return ret;
923
924 ov5645->current_mode = new_mode;
925 }
926
927 __format = __ov5645_get_pad_format(ov5645, sd_state, pad: format->pad,
928 which: format->which);
929 __format->width = __crop->width;
930 __format->height = __crop->height;
931 __format->code = MEDIA_BUS_FMT_UYVY8_1X16;
932 __format->field = V4L2_FIELD_NONE;
933 __format->colorspace = V4L2_COLORSPACE_SRGB;
934
935 format->format = *__format;
936
937 return 0;
938}
939
940static int ov5645_init_state(struct v4l2_subdev *subdev,
941 struct v4l2_subdev_state *sd_state)
942{
943 struct v4l2_subdev_format fmt = { 0 };
944
945 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
946 fmt.format.width = 1920;
947 fmt.format.height = 1080;
948
949 ov5645_set_format(sd: subdev, sd_state, format: &fmt);
950
951 return 0;
952}
953
954static int ov5645_get_selection(struct v4l2_subdev *sd,
955 struct v4l2_subdev_state *sd_state,
956 struct v4l2_subdev_selection *sel)
957{
958 struct ov5645 *ov5645 = to_ov5645(sd);
959
960 if (sel->target != V4L2_SEL_TGT_CROP)
961 return -EINVAL;
962
963 sel->r = *__ov5645_get_pad_crop(ov5645, sd_state, pad: sel->pad,
964 which: sel->which);
965 return 0;
966}
967
968static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
969{
970 struct ov5645 *ov5645 = to_ov5645(sd: subdev);
971 int ret;
972
973 if (enable) {
974 ret = pm_runtime_resume_and_get(dev: ov5645->dev);
975 if (ret < 0)
976 return ret;
977
978 ret = ov5645_set_register_array(ov5645,
979 settings: ov5645->current_mode->data,
980 num_settings: ov5645->current_mode->data_size);
981 if (ret < 0) {
982 dev_err(ov5645->dev, "could not set mode %dx%d\n",
983 ov5645->current_mode->width,
984 ov5645->current_mode->height);
985 goto err_rpm_put;
986 }
987 ret = v4l2_ctrl_handler_setup(hdl: &ov5645->ctrls);
988 if (ret < 0) {
989 dev_err(ov5645->dev, "could not sync v4l2 controls\n");
990 goto err_rpm_put;
991 }
992
993 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, val: 0x45);
994 if (ret < 0)
995 goto err_rpm_put;
996
997 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
998 OV5645_SYSTEM_CTRL0_START);
999 if (ret < 0)
1000 goto err_rpm_put;
1001 } else {
1002 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, val: 0x40);
1003 if (ret < 0)
1004 goto stream_off_rpm_put;
1005
1006 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1007 OV5645_SYSTEM_CTRL0_STOP);
1008
1009 goto stream_off_rpm_put;
1010 }
1011
1012 return 0;
1013
1014err_rpm_put:
1015 pm_runtime_put_sync(dev: ov5645->dev);
1016 return ret;
1017
1018stream_off_rpm_put:
1019 pm_runtime_mark_last_busy(dev: ov5645->dev);
1020 pm_runtime_put_autosuspend(dev: ov5645->dev);
1021 return ret;
1022}
1023
1024static const struct v4l2_subdev_video_ops ov5645_video_ops = {
1025 .s_stream = ov5645_s_stream,
1026};
1027
1028static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
1029 .enum_mbus_code = ov5645_enum_mbus_code,
1030 .enum_frame_size = ov5645_enum_frame_size,
1031 .get_fmt = ov5645_get_format,
1032 .set_fmt = ov5645_set_format,
1033 .get_selection = ov5645_get_selection,
1034};
1035
1036static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1037 .video = &ov5645_video_ops,
1038 .pad = &ov5645_subdev_pad_ops,
1039};
1040
1041static const struct v4l2_subdev_internal_ops ov5645_internal_ops = {
1042 .init_state = ov5645_init_state,
1043};
1044
1045static int ov5645_probe(struct i2c_client *client)
1046{
1047 struct device *dev = &client->dev;
1048 struct device_node *endpoint;
1049 struct ov5645 *ov5645;
1050 u8 chip_id_high, chip_id_low;
1051 unsigned int i;
1052 u32 xclk_freq;
1053 int ret;
1054
1055 ov5645 = devm_kzalloc(dev, size: sizeof(struct ov5645), GFP_KERNEL);
1056 if (!ov5645)
1057 return -ENOMEM;
1058
1059 ov5645->i2c_client = client;
1060 ov5645->dev = dev;
1061
1062 endpoint = of_graph_get_endpoint_by_regs(parent: dev->of_node, port_reg: 0, reg: -1);
1063 if (!endpoint) {
1064 dev_err(dev, "endpoint node not found\n");
1065 return -EINVAL;
1066 }
1067
1068 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1069 vep: &ov5645->ep);
1070
1071 of_node_put(node: endpoint);
1072
1073 if (ret < 0) {
1074 dev_err(dev, "parsing endpoint node failed\n");
1075 return ret;
1076 }
1077
1078 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
1079 dev_err(dev, "invalid bus type, must be CSI2\n");
1080 return -EINVAL;
1081 }
1082
1083 /* get system clock (xclk) */
1084 ov5645->xclk = devm_clk_get(dev, NULL);
1085 if (IS_ERR(ptr: ov5645->xclk)) {
1086 dev_err(dev, "could not get xclk");
1087 return PTR_ERR(ptr: ov5645->xclk);
1088 }
1089
1090 ret = of_property_read_u32(np: dev->of_node, propname: "clock-frequency", out_value: &xclk_freq);
1091 if (ret) {
1092 dev_err(dev, "could not get xclk frequency\n");
1093 return ret;
1094 }
1095
1096 /* external clock must be 24MHz, allow 1% tolerance */
1097 if (xclk_freq < 23760000 || xclk_freq > 24240000) {
1098 dev_err(dev, "external clock frequency %u is not supported\n",
1099 xclk_freq);
1100 return -EINVAL;
1101 }
1102
1103 ret = clk_set_rate(clk: ov5645->xclk, rate: xclk_freq);
1104 if (ret) {
1105 dev_err(dev, "could not set xclk frequency\n");
1106 return ret;
1107 }
1108
1109 for (i = 0; i < OV5645_NUM_SUPPLIES; i++)
1110 ov5645->supplies[i].supply = ov5645_supply_name[i];
1111
1112 ret = devm_regulator_bulk_get(dev, OV5645_NUM_SUPPLIES,
1113 consumers: ov5645->supplies);
1114 if (ret < 0)
1115 return ret;
1116
1117 ov5645->enable_gpio = devm_gpiod_get(dev, con_id: "enable", flags: GPIOD_OUT_HIGH);
1118 if (IS_ERR(ptr: ov5645->enable_gpio)) {
1119 dev_err(dev, "cannot get enable gpio\n");
1120 return PTR_ERR(ptr: ov5645->enable_gpio);
1121 }
1122
1123 ov5645->rst_gpio = devm_gpiod_get(dev, con_id: "reset", flags: GPIOD_OUT_HIGH);
1124 if (IS_ERR(ptr: ov5645->rst_gpio)) {
1125 dev_err(dev, "cannot get reset gpio\n");
1126 return PTR_ERR(ptr: ov5645->rst_gpio);
1127 }
1128
1129 mutex_init(&ov5645->power_lock);
1130
1131 v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1132 v4l2_ctrl_new_std(hdl: &ov5645->ctrls, ops: &ov5645_ctrl_ops,
1133 V4L2_CID_SATURATION, min: -4, max: 4, step: 1, def: 0);
1134 v4l2_ctrl_new_std(hdl: &ov5645->ctrls, ops: &ov5645_ctrl_ops,
1135 V4L2_CID_HFLIP, min: 0, max: 1, step: 1, def: 0);
1136 v4l2_ctrl_new_std(hdl: &ov5645->ctrls, ops: &ov5645_ctrl_ops,
1137 V4L2_CID_VFLIP, min: 0, max: 1, step: 1, def: 0);
1138 v4l2_ctrl_new_std(hdl: &ov5645->ctrls, ops: &ov5645_ctrl_ops,
1139 V4L2_CID_AUTOGAIN, min: 0, max: 1, step: 1, def: 1);
1140 v4l2_ctrl_new_std(hdl: &ov5645->ctrls, ops: &ov5645_ctrl_ops,
1141 V4L2_CID_AUTO_WHITE_BALANCE, min: 0, max: 1, step: 1, def: 1);
1142 v4l2_ctrl_new_std_menu(hdl: &ov5645->ctrls, ops: &ov5645_ctrl_ops,
1143 V4L2_CID_EXPOSURE_AUTO, max: V4L2_EXPOSURE_MANUAL,
1144 mask: 0, def: V4L2_EXPOSURE_AUTO);
1145 v4l2_ctrl_new_std_menu_items(hdl: &ov5645->ctrls, ops: &ov5645_ctrl_ops,
1146 V4L2_CID_TEST_PATTERN,
1147 ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1148 mask: 0, def: 0, qmenu: ov5645_test_pattern_menu);
1149 ov5645->pixel_clock = v4l2_ctrl_new_std(hdl: &ov5645->ctrls,
1150 ops: &ov5645_ctrl_ops,
1151 V4L2_CID_PIXEL_RATE,
1152 min: 1, INT_MAX, step: 1, def: 1);
1153 ov5645->link_freq = v4l2_ctrl_new_int_menu(hdl: &ov5645->ctrls,
1154 ops: &ov5645_ctrl_ops,
1155 V4L2_CID_LINK_FREQ,
1156 ARRAY_SIZE(link_freq) - 1,
1157 def: 0, qmenu_int: link_freq);
1158 if (ov5645->link_freq)
1159 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1160
1161 ov5645->sd.ctrl_handler = &ov5645->ctrls;
1162
1163 if (ov5645->ctrls.error) {
1164 dev_err(dev, "%s: control initialization error %d\n",
1165 __func__, ov5645->ctrls.error);
1166 ret = ov5645->ctrls.error;
1167 goto free_ctrl;
1168 }
1169
1170 v4l2_i2c_subdev_init(sd: &ov5645->sd, client, ops: &ov5645_subdev_ops);
1171 ov5645->sd.internal_ops = &ov5645_internal_ops;
1172 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1173 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1174 ov5645->sd.dev = &client->dev;
1175 ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1176
1177 ret = media_entity_pads_init(entity: &ov5645->sd.entity, num_pads: 1, pads: &ov5645->pad);
1178 if (ret < 0) {
1179 dev_err(dev, "could not register media entity\n");
1180 goto free_ctrl;
1181 }
1182
1183 ret = ov5645_set_power_on(dev);
1184 if (ret)
1185 goto free_entity;
1186
1187 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, val: &chip_id_high);
1188 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1189 dev_err(dev, "could not read ID high\n");
1190 ret = -ENODEV;
1191 goto power_down;
1192 }
1193 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, val: &chip_id_low);
1194 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1195 dev_err(dev, "could not read ID low\n");
1196 ret = -ENODEV;
1197 goto power_down;
1198 }
1199
1200 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1201
1202 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1203 val: &ov5645->aec_pk_manual);
1204 if (ret < 0) {
1205 dev_err(dev, "could not read AEC/AGC mode\n");
1206 ret = -ENODEV;
1207 goto power_down;
1208 }
1209
1210 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1211 val: &ov5645->timing_tc_reg20);
1212 if (ret < 0) {
1213 dev_err(dev, "could not read vflip value\n");
1214 ret = -ENODEV;
1215 goto power_down;
1216 }
1217
1218 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1219 val: &ov5645->timing_tc_reg21);
1220 if (ret < 0) {
1221 dev_err(dev, "could not read hflip value\n");
1222 ret = -ENODEV;
1223 goto power_down;
1224 }
1225
1226 pm_runtime_set_active(dev);
1227 pm_runtime_get_noresume(dev);
1228 pm_runtime_enable(dev);
1229
1230 ov5645_init_state(subdev: &ov5645->sd, NULL);
1231
1232 ret = v4l2_async_register_subdev(sd: &ov5645->sd);
1233 if (ret < 0) {
1234 dev_err(dev, "could not register v4l2 device\n");
1235 goto err_pm_runtime;
1236 }
1237
1238 pm_runtime_set_autosuspend_delay(dev, delay: 1000);
1239 pm_runtime_use_autosuspend(dev);
1240 pm_runtime_mark_last_busy(dev);
1241 pm_runtime_put_autosuspend(dev);
1242
1243 return 0;
1244
1245err_pm_runtime:
1246 pm_runtime_disable(dev);
1247 pm_runtime_put_noidle(dev);
1248power_down:
1249 ov5645_set_power_off(dev);
1250free_entity:
1251 media_entity_cleanup(entity: &ov5645->sd.entity);
1252free_ctrl:
1253 v4l2_ctrl_handler_free(hdl: &ov5645->ctrls);
1254 mutex_destroy(lock: &ov5645->power_lock);
1255
1256 return ret;
1257}
1258
1259static void ov5645_remove(struct i2c_client *client)
1260{
1261 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1262 struct ov5645 *ov5645 = to_ov5645(sd);
1263
1264 v4l2_async_unregister_subdev(sd: &ov5645->sd);
1265 media_entity_cleanup(entity: &ov5645->sd.entity);
1266 v4l2_ctrl_handler_free(hdl: &ov5645->ctrls);
1267 pm_runtime_disable(dev: ov5645->dev);
1268 if (!pm_runtime_status_suspended(dev: ov5645->dev))
1269 ov5645_set_power_off(dev: ov5645->dev);
1270 pm_runtime_set_suspended(dev: ov5645->dev);
1271 mutex_destroy(lock: &ov5645->power_lock);
1272}
1273
1274static const struct i2c_device_id ov5645_id[] = {
1275 { "ov5645", 0 },
1276 {}
1277};
1278MODULE_DEVICE_TABLE(i2c, ov5645_id);
1279
1280static const struct of_device_id ov5645_of_match[] = {
1281 { .compatible = "ovti,ov5645" },
1282 { /* sentinel */ }
1283};
1284MODULE_DEVICE_TABLE(of, ov5645_of_match);
1285
1286static const struct dev_pm_ops ov5645_pm_ops = {
1287 SET_RUNTIME_PM_OPS(ov5645_set_power_off, ov5645_set_power_on, NULL)
1288};
1289
1290static struct i2c_driver ov5645_i2c_driver = {
1291 .driver = {
1292 .of_match_table = ov5645_of_match,
1293 .name = "ov5645",
1294 .pm = &ov5645_pm_ops,
1295 },
1296 .probe = ov5645_probe,
1297 .remove = ov5645_remove,
1298 .id_table = ov5645_id,
1299};
1300
1301module_i2c_driver(ov5645_i2c_driver);
1302
1303MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1304MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
1305MODULE_LICENSE("GPL v2");
1306

source code of linux/drivers/media/i2c/ov5645.c