1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2019 Intel Corporation.
3
4#include <linux/acpi.h>
5#include <linux/clk.h>
6#include <linux/delay.h>
7#include <linux/gpio/consumer.h>
8#include <linux/i2c.h>
9#include <linux/module.h>
10#include <linux/pm_runtime.h>
11#include <linux/regulator/consumer.h>
12#include <linux/unaligned.h>
13
14#include <media/v4l2-ctrls.h>
15#include <media/v4l2-device.h>
16#include <media/v4l2-fwnode.h>
17
18#define OV8856_REG_VALUE_08BIT 1
19#define OV8856_REG_VALUE_16BIT 2
20#define OV8856_REG_VALUE_24BIT 3
21
22#define OV8856_SCLK 144000000ULL
23#define OV8856_XVCLK_19_2 19200000
24#define OV8856_DATA_LANES 4
25#define OV8856_RGB_DEPTH 10
26
27#define OV8856_REG_CHIP_ID 0x300a
28#define OV8856_CHIP_ID 0x00885a
29
30#define OV8856_REG_MODE_SELECT 0x0100
31#define OV8856_MODE_STANDBY 0x00
32#define OV8856_MODE_STREAMING 0x01
33
34/* module revisions */
35#define OV8856_2A_MODULE 0x01
36#define OV8856_1B_MODULE 0x02
37
38/* the OTP read-out buffer is at 0x7000 and 0xf is the offset
39 * of the byte in the OTP that means the module revision
40 */
41#define OV8856_MODULE_REVISION 0x700f
42#define OV8856_OTP_MODE_CTRL 0x3d84
43#define OV8856_OTP_LOAD_CTRL 0x3d81
44#define OV8856_OTP_MODE_AUTO 0x00
45#define OV8856_OTP_LOAD_CTRL_ENABLE BIT(0)
46
47/* vertical-timings from sensor */
48#define OV8856_REG_VTS 0x380e
49#define OV8856_VTS_MAX 0x7fff
50
51/* horizontal-timings from sensor */
52#define OV8856_REG_HTS 0x380c
53
54/* Exposure controls from sensor */
55#define OV8856_REG_EXPOSURE 0x3500
56#define OV8856_EXPOSURE_MIN 6
57#define OV8856_EXPOSURE_MAX_MARGIN 6
58#define OV8856_EXPOSURE_STEP 1
59
60/* Analog gain controls from sensor */
61#define OV8856_REG_ANALOG_GAIN 0x3508
62#define OV8856_ANAL_GAIN_MIN 128
63#define OV8856_ANAL_GAIN_MAX 2047
64#define OV8856_ANAL_GAIN_STEP 1
65
66/* Digital gain controls from sensor */
67#define OV8856_REG_DIGITAL_GAIN 0x350a
68#define OV8856_REG_MWB_R_GAIN 0x5019
69#define OV8856_REG_MWB_G_GAIN 0x501b
70#define OV8856_REG_MWB_B_GAIN 0x501d
71#define OV8856_DGTL_GAIN_MIN 0
72#define OV8856_DGTL_GAIN_MAX 4095
73#define OV8856_DGTL_GAIN_STEP 1
74#define OV8856_DGTL_GAIN_DEFAULT 1024
75
76/* Test Pattern Control */
77#define OV8856_REG_TEST_PATTERN 0x5e00
78#define OV8856_TEST_PATTERN_ENABLE BIT(7)
79#define OV8856_TEST_PATTERN_BAR_SHIFT 2
80
81#define NUM_REGS 7
82#define NUM_MODE_REGS 187
83#define NUM_MODE_REGS_2 200
84
85/* Flip Mirror Controls from sensor */
86#define OV8856_REG_FORMAT1 0x3820
87#define OV8856_REG_FORMAT2 0x3821
88#define OV8856_REG_FORMAT1_OP_1 BIT(1)
89#define OV8856_REG_FORMAT1_OP_2 BIT(2)
90#define OV8856_REG_FORMAT1_OP_3 BIT(6)
91#define OV8856_REG_FORMAT2_OP_1 BIT(1)
92#define OV8856_REG_FORMAT2_OP_2 BIT(2)
93#define OV8856_REG_FORMAT2_OP_3 BIT(6)
94#define OV8856_REG_FLIP_OPT_1 0x376b
95#define OV8856_REG_FLIP_OPT_2 0x5001
96#define OV8856_REG_FLIP_OPT_3 0x502e
97#define OV8856_REG_MIRROR_OPT_1 0x5004
98#define OV8856_REG_FLIP_OP_0 BIT(0)
99#define OV8856_REG_FLIP_OP_1 BIT(1)
100#define OV8856_REG_FLIP_OP_2 BIT(2)
101#define OV8856_REG_MIRROR_OP_1 BIT(1)
102#define OV8856_REG_MIRROR_OP_2 BIT(2)
103
104#define to_ov8856(_sd) container_of(_sd, struct ov8856, sd)
105
106static const char * const ov8856_supply_names[] = {
107 "dovdd", /* Digital I/O power */
108 "avdd", /* Analog power */
109 "dvdd", /* Digital core power */
110};
111
112enum {
113 OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
114 OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
115};
116
117struct ov8856_reg {
118 u16 address;
119 u8 val;
120};
121
122struct ov8856_reg_list {
123 u32 num_of_regs;
124 const struct ov8856_reg *regs;
125};
126
127struct ov8856_link_freq_config {
128 const struct ov8856_reg_list reg_list;
129};
130
131struct ov8856_mode {
132 /* Frame width in pixels */
133 u32 width;
134
135 /* Frame height in pixels */
136 u32 height;
137
138 /* Horizontal timining size */
139 u32 hts;
140
141 /* Default vertical timining size */
142 u32 vts_def;
143
144 /* Min vertical timining size */
145 u32 vts_min;
146
147 /* Link frequency needed for this resolution */
148 u32 link_freq_index;
149
150 /* Sensor register settings for this resolution */
151 const struct ov8856_reg_list reg_list;
152
153 /* Number of data lanes */
154 u8 data_lanes;
155
156 /* Default MEDIA_BUS_FMT for this mode */
157 u32 default_mbus_index;
158};
159
160struct ov8856_mipi_data_rates {
161 const struct ov8856_reg regs_0[NUM_REGS];
162 const struct ov8856_reg regs_1[NUM_REGS];
163};
164
165static const struct ov8856_mipi_data_rates mipi_data_rate_lane_2 = {
166 //mipi_data_rate_1440mbps
167 {
168 {0x0103, 0x01},
169 {0x0100, 0x00},
170 {0x0302, 0x43},
171 {0x0303, 0x00},
172 {0x030b, 0x02},
173 {0x030d, 0x4b},
174 {0x031e, 0x0c}
175 },
176 //mipi_data_rate_720mbps
177 {
178 {0x0103, 0x01},
179 {0x0100, 0x00},
180 {0x0302, 0x4b},
181 {0x0303, 0x01},
182 {0x030b, 0x02},
183 {0x030d, 0x4b},
184 {0x031e, 0x0c}
185 }
186};
187
188static const struct ov8856_mipi_data_rates mipi_data_rate_lane_4 = {
189 //mipi_data_rate_720mbps
190 {
191 {0x0103, 0x01},
192 {0x0100, 0x00},
193 {0x0302, 0x4b},
194 {0x0303, 0x01},
195 {0x030b, 0x02},
196 {0x030d, 0x4b},
197 {0x031e, 0x0c}
198 },
199 //mipi_data_rate_360mbps
200 {
201 {0x0103, 0x01},
202 {0x0100, 0x00},
203 {0x0302, 0x4b},
204 {0x0303, 0x03},
205 {0x030b, 0x02},
206 {0x030d, 0x4b},
207 {0x031e, 0x0c}
208 }
209};
210
211static const struct ov8856_reg lane_2_mode_3280x2464[] = {
212 /* 3280x2464 resolution */
213 {0x3000, 0x20},
214 {0x3003, 0x08},
215 {0x300e, 0x20},
216 {0x3010, 0x00},
217 {0x3015, 0x84},
218 {0x3018, 0x32},
219 {0x3021, 0x23},
220 {0x3033, 0x24},
221 {0x3500, 0x00},
222 {0x3501, 0x9a},
223 {0x3502, 0x20},
224 {0x3503, 0x08},
225 {0x3505, 0x83},
226 {0x3508, 0x01},
227 {0x3509, 0x80},
228 {0x350c, 0x00},
229 {0x350d, 0x80},
230 {0x350e, 0x04},
231 {0x350f, 0x00},
232 {0x3510, 0x00},
233 {0x3511, 0x02},
234 {0x3512, 0x00},
235 {0x3600, 0x72},
236 {0x3601, 0x40},
237 {0x3602, 0x30},
238 {0x3610, 0xc5},
239 {0x3611, 0x58},
240 {0x3612, 0x5c},
241 {0x3613, 0xca},
242 {0x3614, 0x50},
243 {0x3628, 0xff},
244 {0x3629, 0xff},
245 {0x362a, 0xff},
246 {0x3633, 0x10},
247 {0x3634, 0x10},
248 {0x3635, 0x10},
249 {0x3636, 0x10},
250 {0x3663, 0x08},
251 {0x3669, 0x34},
252 {0x366e, 0x10},
253 {0x3706, 0x86},
254 {0x370b, 0x7e},
255 {0x3714, 0x23},
256 {0x3730, 0x12},
257 {0x3733, 0x10},
258 {0x3764, 0x00},
259 {0x3765, 0x00},
260 {0x3769, 0x62},
261 {0x376a, 0x2a},
262 {0x376b, 0x30},
263 {0x3780, 0x00},
264 {0x3781, 0x24},
265 {0x3782, 0x00},
266 {0x3783, 0x23},
267 {0x3798, 0x2f},
268 {0x37a1, 0x60},
269 {0x37a8, 0x6a},
270 {0x37ab, 0x3f},
271 {0x37c2, 0x04},
272 {0x37c3, 0xf1},
273 {0x37c9, 0x80},
274 {0x37cb, 0x16},
275 {0x37cc, 0x16},
276 {0x37cd, 0x16},
277 {0x37ce, 0x16},
278 {0x3800, 0x00},
279 {0x3801, 0x00},
280 {0x3802, 0x00},
281 {0x3803, 0x06},
282 {0x3804, 0x0c},
283 {0x3805, 0xdf},
284 {0x3806, 0x09},
285 {0x3807, 0xa7},
286 {0x3808, 0x0c},
287 {0x3809, 0xd0},
288 {0x380a, 0x09},
289 {0x380b, 0xa0},
290 {0x380c, 0x07},
291 {0x380d, 0x88},
292 {0x380e, 0x09},
293 {0x380f, 0xb8},
294 {0x3810, 0x00},
295 {0x3811, 0x00},
296 {0x3812, 0x00},
297 {0x3813, 0x01},
298 {0x3814, 0x01},
299 {0x3815, 0x01},
300 {0x3816, 0x00},
301 {0x3817, 0x00},
302 {0x3818, 0x00},
303 {0x3819, 0x00},
304 {0x3820, 0x80},
305 {0x3821, 0x46},
306 {0x382a, 0x01},
307 {0x382b, 0x01},
308 {0x3830, 0x06},
309 {0x3836, 0x02},
310 {0x3837, 0x10},
311 {0x3862, 0x04},
312 {0x3863, 0x08},
313 {0x3cc0, 0x33},
314 {0x3d85, 0x14},
315 {0x3d8c, 0x73},
316 {0x3d8d, 0xde},
317 {0x4001, 0xe0},
318 {0x4003, 0x40},
319 {0x4008, 0x00},
320 {0x4009, 0x0b},
321 {0x400a, 0x00},
322 {0x400b, 0x84},
323 {0x400f, 0x80},
324 {0x4010, 0xf0},
325 {0x4011, 0xff},
326 {0x4012, 0x02},
327 {0x4013, 0x01},
328 {0x4014, 0x01},
329 {0x4015, 0x01},
330 {0x4042, 0x00},
331 {0x4043, 0x80},
332 {0x4044, 0x00},
333 {0x4045, 0x80},
334 {0x4046, 0x00},
335 {0x4047, 0x80},
336 {0x4048, 0x00},
337 {0x4049, 0x80},
338 {0x4041, 0x03},
339 {0x404c, 0x20},
340 {0x404d, 0x00},
341 {0x404e, 0x20},
342 {0x4203, 0x80},
343 {0x4307, 0x30},
344 {0x4317, 0x00},
345 {0x4503, 0x08},
346 {0x4601, 0x80},
347 {0x4800, 0x44},
348 {0x4816, 0x53},
349 {0x481b, 0x58},
350 {0x481f, 0x27},
351 {0x4837, 0x0c},
352 {0x483c, 0x0f},
353 {0x484b, 0x05},
354 {0x5000, 0x57},
355 {0x5001, 0x0a},
356 {0x5004, 0x06},
357 {0x502e, 0x03},
358 {0x5030, 0x41},
359 {0x5795, 0x02},
360 {0x5796, 0x20},
361 {0x5797, 0x20},
362 {0x5798, 0xd5},
363 {0x5799, 0xd5},
364 {0x579a, 0x00},
365 {0x579b, 0x50},
366 {0x579c, 0x00},
367 {0x579d, 0x2c},
368 {0x579e, 0x0c},
369 {0x579f, 0x40},
370 {0x57a0, 0x09},
371 {0x57a1, 0x40},
372 {0x5780, 0x14},
373 {0x5781, 0x0f},
374 {0x5782, 0x44},
375 {0x5783, 0x02},
376 {0x5784, 0x01},
377 {0x5785, 0x01},
378 {0x5786, 0x00},
379 {0x5787, 0x04},
380 {0x5788, 0x02},
381 {0x5789, 0x0f},
382 {0x578a, 0xfd},
383 {0x578b, 0xf5},
384 {0x578c, 0xf5},
385 {0x578d, 0x03},
386 {0x578e, 0x08},
387 {0x578f, 0x0c},
388 {0x5790, 0x08},
389 {0x5791, 0x04},
390 {0x5792, 0x00},
391 {0x5793, 0x52},
392 {0x5794, 0xa3},
393 {0x59f8, 0x3d},
394 {0x5a08, 0x02},
395 {0x5b00, 0x02},
396 {0x5b01, 0x10},
397 {0x5b02, 0x03},
398 {0x5b03, 0xcf},
399 {0x5b05, 0x6c},
400 {0x5e00, 0x00}
401};
402
403static const struct ov8856_reg lane_2_mode_1640x1232[] = {
404 /* 1640x1232 resolution */
405 {0x3000, 0x20},
406 {0x3003, 0x08},
407 {0x300e, 0x20},
408 {0x3010, 0x00},
409 {0x3015, 0x84},
410 {0x3018, 0x32},
411 {0x3021, 0x23},
412 {0x3033, 0x24},
413 {0x3500, 0x00},
414 {0x3501, 0x4c},
415 {0x3502, 0xe0},
416 {0x3503, 0x08},
417 {0x3505, 0x83},
418 {0x3508, 0x01},
419 {0x3509, 0x80},
420 {0x350c, 0x00},
421 {0x350d, 0x80},
422 {0x350e, 0x04},
423 {0x350f, 0x00},
424 {0x3510, 0x00},
425 {0x3511, 0x02},
426 {0x3512, 0x00},
427 {0x3600, 0x72},
428 {0x3601, 0x40},
429 {0x3602, 0x30},
430 {0x3610, 0xc5},
431 {0x3611, 0x58},
432 {0x3612, 0x5c},
433 {0x3613, 0xca},
434 {0x3614, 0x50},
435 {0x3628, 0xff},
436 {0x3629, 0xff},
437 {0x362a, 0xff},
438 {0x3633, 0x10},
439 {0x3634, 0x10},
440 {0x3635, 0x10},
441 {0x3636, 0x10},
442 {0x3663, 0x08},
443 {0x3669, 0x34},
444 {0x366e, 0x08},
445 {0x3706, 0x86},
446 {0x370b, 0x7e},
447 {0x3714, 0x27},
448 {0x3730, 0x12},
449 {0x3733, 0x10},
450 {0x3764, 0x00},
451 {0x3765, 0x00},
452 {0x3769, 0x62},
453 {0x376a, 0x2a},
454 {0x376b, 0x30},
455 {0x3780, 0x00},
456 {0x3781, 0x24},
457 {0x3782, 0x00},
458 {0x3783, 0x23},
459 {0x3798, 0x2f},
460 {0x37a1, 0x60},
461 {0x37a8, 0x6a},
462 {0x37ab, 0x3f},
463 {0x37c2, 0x14},
464 {0x37c3, 0xf1},
465 {0x37c9, 0x80},
466 {0x37cb, 0x16},
467 {0x37cc, 0x16},
468 {0x37cd, 0x16},
469 {0x37ce, 0x16},
470 {0x3800, 0x00},
471 {0x3801, 0x00},
472 {0x3802, 0x00},
473 {0x3803, 0x00},
474 {0x3804, 0x0c},
475 {0x3805, 0xdf},
476 {0x3806, 0x09},
477 {0x3807, 0xaf},
478 {0x3808, 0x06},
479 {0x3809, 0x68},
480 {0x380a, 0x04},
481 {0x380b, 0xd0},
482 {0x380c, 0x0c},
483 {0x380d, 0x60},
484 {0x380e, 0x05},
485 {0x380f, 0xea},
486 {0x3810, 0x00},
487 {0x3811, 0x04},
488 {0x3812, 0x00},
489 {0x3813, 0x05},
490 {0x3814, 0x03},
491 {0x3815, 0x01},
492 {0x3816, 0x00},
493 {0x3817, 0x00},
494 {0x3818, 0x00},
495 {0x3819, 0x00},
496 {0x3820, 0x90},
497 {0x3821, 0x67},
498 {0x382a, 0x03},
499 {0x382b, 0x01},
500 {0x3830, 0x06},
501 {0x3836, 0x02},
502 {0x3837, 0x10},
503 {0x3862, 0x04},
504 {0x3863, 0x08},
505 {0x3cc0, 0x33},
506 {0x3d85, 0x14},
507 {0x3d8c, 0x73},
508 {0x3d8d, 0xde},
509 {0x4001, 0xe0},
510 {0x4003, 0x40},
511 {0x4008, 0x00},
512 {0x4009, 0x05},
513 {0x400a, 0x00},
514 {0x400b, 0x84},
515 {0x400f, 0x80},
516 {0x4010, 0xf0},
517 {0x4011, 0xff},
518 {0x4012, 0x02},
519 {0x4013, 0x01},
520 {0x4014, 0x01},
521 {0x4015, 0x01},
522 {0x4042, 0x00},
523 {0x4043, 0x80},
524 {0x4044, 0x00},
525 {0x4045, 0x80},
526 {0x4046, 0x00},
527 {0x4047, 0x80},
528 {0x4048, 0x00},
529 {0x4049, 0x80},
530 {0x4041, 0x03},
531 {0x404c, 0x20},
532 {0x404d, 0x00},
533 {0x404e, 0x20},
534 {0x4203, 0x80},
535 {0x4307, 0x30},
536 {0x4317, 0x00},
537 {0x4503, 0x08},
538 {0x4601, 0x80},
539 {0x4800, 0x44},
540 {0x4816, 0x53},
541 {0x481b, 0x58},
542 {0x481f, 0x27},
543 {0x4837, 0x16},
544 {0x483c, 0x0f},
545 {0x484b, 0x05},
546 {0x5000, 0x57},
547 {0x5001, 0x0a},
548 {0x5004, 0x06},
549 {0x502e, 0x03},
550 {0x5030, 0x41},
551 {0x5795, 0x00},
552 {0x5796, 0x10},
553 {0x5797, 0x10},
554 {0x5798, 0x73},
555 {0x5799, 0x73},
556 {0x579a, 0x00},
557 {0x579b, 0x28},
558 {0x579c, 0x00},
559 {0x579d, 0x16},
560 {0x579e, 0x06},
561 {0x579f, 0x20},
562 {0x57a0, 0x04},
563 {0x57a1, 0xa0},
564 {0x5780, 0x14},
565 {0x5781, 0x0f},
566 {0x5782, 0x44},
567 {0x5783, 0x02},
568 {0x5784, 0x01},
569 {0x5785, 0x01},
570 {0x5786, 0x00},
571 {0x5787, 0x04},
572 {0x5788, 0x02},
573 {0x5789, 0x0f},
574 {0x578a, 0xfd},
575 {0x578b, 0xf5},
576 {0x578c, 0xf5},
577 {0x578d, 0x03},
578 {0x578e, 0x08},
579 {0x578f, 0x0c},
580 {0x5790, 0x08},
581 {0x5791, 0x04},
582 {0x5792, 0x00},
583 {0x5793, 0x52},
584 {0x5794, 0xa3},
585 {0x59f8, 0x3d},
586 {0x5a08, 0x02},
587 {0x5b00, 0x02},
588 {0x5b01, 0x10},
589 {0x5b02, 0x03},
590 {0x5b03, 0xcf},
591 {0x5b05, 0x6c},
592 {0x5e00, 0x00}
593};
594
595static const struct ov8856_reg lane_4_mode_3280x2464[] = {
596 /* 3280x2464 resolution */
597 {0x3000, 0x20},
598 {0x3003, 0x08},
599 {0x300e, 0x20},
600 {0x3010, 0x00},
601 {0x3015, 0x84},
602 {0x3018, 0x72},
603 {0x3021, 0x23},
604 {0x3033, 0x24},
605 {0x3500, 0x00},
606 {0x3501, 0x9a},
607 {0x3502, 0x20},
608 {0x3503, 0x08},
609 {0x3505, 0x83},
610 {0x3508, 0x01},
611 {0x3509, 0x80},
612 {0x350c, 0x00},
613 {0x350d, 0x80},
614 {0x350e, 0x04},
615 {0x350f, 0x00},
616 {0x3510, 0x00},
617 {0x3511, 0x02},
618 {0x3512, 0x00},
619 {0x3600, 0x72},
620 {0x3601, 0x40},
621 {0x3602, 0x30},
622 {0x3610, 0xc5},
623 {0x3611, 0x58},
624 {0x3612, 0x5c},
625 {0x3613, 0xca},
626 {0x3614, 0x20},
627 {0x3628, 0xff},
628 {0x3629, 0xff},
629 {0x362a, 0xff},
630 {0x3633, 0x10},
631 {0x3634, 0x10},
632 {0x3635, 0x10},
633 {0x3636, 0x10},
634 {0x3663, 0x08},
635 {0x3669, 0x34},
636 {0x366e, 0x10},
637 {0x3706, 0x86},
638 {0x370b, 0x7e},
639 {0x3714, 0x23},
640 {0x3730, 0x12},
641 {0x3733, 0x10},
642 {0x3764, 0x00},
643 {0x3765, 0x00},
644 {0x3769, 0x62},
645 {0x376a, 0x2a},
646 {0x376b, 0x30},
647 {0x3780, 0x00},
648 {0x3781, 0x24},
649 {0x3782, 0x00},
650 {0x3783, 0x23},
651 {0x3798, 0x2f},
652 {0x37a1, 0x60},
653 {0x37a8, 0x6a},
654 {0x37ab, 0x3f},
655 {0x37c2, 0x04},
656 {0x37c3, 0xf1},
657 {0x37c9, 0x80},
658 {0x37cb, 0x16},
659 {0x37cc, 0x16},
660 {0x37cd, 0x16},
661 {0x37ce, 0x16},
662 {0x3800, 0x00},
663 {0x3801, 0x00},
664 {0x3802, 0x00},
665 {0x3803, 0x06},
666 {0x3804, 0x0c},
667 {0x3805, 0xdf},
668 {0x3806, 0x09},
669 {0x3807, 0xa7},
670 {0x3808, 0x0c},
671 {0x3809, 0xd0},
672 {0x380a, 0x09},
673 {0x380b, 0xa0},
674 {0x380c, 0x07},
675 {0x380d, 0x88},
676 {0x380e, 0x09},
677 {0x380f, 0xb8},
678 {0x3810, 0x00},
679 {0x3811, 0x00},
680 {0x3812, 0x00},
681 {0x3813, 0x01},
682 {0x3814, 0x01},
683 {0x3815, 0x01},
684 {0x3816, 0x00},
685 {0x3817, 0x00},
686 {0x3818, 0x00},
687 {0x3819, 0x10},
688 {0x3820, 0x80},
689 {0x3821, 0x46},
690 {0x382a, 0x01},
691 {0x382b, 0x01},
692 {0x3830, 0x06},
693 {0x3836, 0x02},
694 {0x3862, 0x04},
695 {0x3863, 0x08},
696 {0x3cc0, 0x33},
697 {0x3d85, 0x17},
698 {0x3d8c, 0x73},
699 {0x3d8d, 0xde},
700 {0x4001, 0xe0},
701 {0x4003, 0x40},
702 {0x4008, 0x00},
703 {0x4009, 0x0b},
704 {0x400a, 0x00},
705 {0x400b, 0x84},
706 {0x400f, 0x80},
707 {0x4010, 0xf0},
708 {0x4011, 0xff},
709 {0x4012, 0x02},
710 {0x4013, 0x01},
711 {0x4014, 0x01},
712 {0x4015, 0x01},
713 {0x4042, 0x00},
714 {0x4043, 0x80},
715 {0x4044, 0x00},
716 {0x4045, 0x80},
717 {0x4046, 0x00},
718 {0x4047, 0x80},
719 {0x4048, 0x00},
720 {0x4049, 0x80},
721 {0x4041, 0x03},
722 {0x404c, 0x20},
723 {0x404d, 0x00},
724 {0x404e, 0x20},
725 {0x4203, 0x80},
726 {0x4307, 0x30},
727 {0x4317, 0x00},
728 {0x4503, 0x08},
729 {0x4601, 0x80},
730 {0x4800, 0x44},
731 {0x4816, 0x53},
732 {0x481b, 0x58},
733 {0x481f, 0x27},
734 {0x4837, 0x16},
735 {0x483c, 0x0f},
736 {0x484b, 0x05},
737 {0x5000, 0x57},
738 {0x5001, 0x0a},
739 {0x5004, 0x06},
740 {0x502e, 0x03},
741 {0x5030, 0x41},
742 {0x5780, 0x14},
743 {0x5781, 0x0f},
744 {0x5782, 0x44},
745 {0x5783, 0x02},
746 {0x5784, 0x01},
747 {0x5785, 0x01},
748 {0x5786, 0x00},
749 {0x5787, 0x04},
750 {0x5788, 0x02},
751 {0x5789, 0x0f},
752 {0x578a, 0xfd},
753 {0x578b, 0xf5},
754 {0x578c, 0xf5},
755 {0x578d, 0x03},
756 {0x578e, 0x08},
757 {0x578f, 0x0c},
758 {0x5790, 0x08},
759 {0x5791, 0x04},
760 {0x5792, 0x00},
761 {0x5793, 0x52},
762 {0x5794, 0xa3},
763 {0x5795, 0x02},
764 {0x5796, 0x20},
765 {0x5797, 0x20},
766 {0x5798, 0xd5},
767 {0x5799, 0xd5},
768 {0x579a, 0x00},
769 {0x579b, 0x50},
770 {0x579c, 0x00},
771 {0x579d, 0x2c},
772 {0x579e, 0x0c},
773 {0x579f, 0x40},
774 {0x57a0, 0x09},
775 {0x57a1, 0x40},
776 {0x59f8, 0x3d},
777 {0x5a08, 0x02},
778 {0x5b00, 0x02},
779 {0x5b01, 0x10},
780 {0x5b02, 0x03},
781 {0x5b03, 0xcf},
782 {0x5b05, 0x6c},
783 {0x5e00, 0x00}
784};
785
786static const struct ov8856_reg lane_4_mode_1640x1232[] = {
787 /* 1640x1232 resolution */
788 {0x3000, 0x20},
789 {0x3003, 0x08},
790 {0x300e, 0x20},
791 {0x3010, 0x00},
792 {0x3015, 0x84},
793 {0x3018, 0x72},
794 {0x3021, 0x23},
795 {0x3033, 0x24},
796 {0x3500, 0x00},
797 {0x3501, 0x4c},
798 {0x3502, 0xe0},
799 {0x3503, 0x08},
800 {0x3505, 0x83},
801 {0x3508, 0x01},
802 {0x3509, 0x80},
803 {0x350c, 0x00},
804 {0x350d, 0x80},
805 {0x350e, 0x04},
806 {0x350f, 0x00},
807 {0x3510, 0x00},
808 {0x3511, 0x02},
809 {0x3512, 0x00},
810 {0x3600, 0x72},
811 {0x3601, 0x40},
812 {0x3602, 0x30},
813 {0x3610, 0xc5},
814 {0x3611, 0x58},
815 {0x3612, 0x5c},
816 {0x3613, 0xca},
817 {0x3614, 0x20},
818 {0x3628, 0xff},
819 {0x3629, 0xff},
820 {0x362a, 0xff},
821 {0x3633, 0x10},
822 {0x3634, 0x10},
823 {0x3635, 0x10},
824 {0x3636, 0x10},
825 {0x3663, 0x08},
826 {0x3669, 0x34},
827 {0x366e, 0x08},
828 {0x3706, 0x86},
829 {0x370b, 0x7e},
830 {0x3714, 0x27},
831 {0x3730, 0x12},
832 {0x3733, 0x10},
833 {0x3764, 0x00},
834 {0x3765, 0x00},
835 {0x3769, 0x62},
836 {0x376a, 0x2a},
837 {0x376b, 0x30},
838 {0x3780, 0x00},
839 {0x3781, 0x24},
840 {0x3782, 0x00},
841 {0x3783, 0x23},
842 {0x3798, 0x2f},
843 {0x37a1, 0x60},
844 {0x37a8, 0x6a},
845 {0x37ab, 0x3f},
846 {0x37c2, 0x14},
847 {0x37c3, 0xf1},
848 {0x37c9, 0x80},
849 {0x37cb, 0x16},
850 {0x37cc, 0x16},
851 {0x37cd, 0x16},
852 {0x37ce, 0x16},
853 {0x3800, 0x00},
854 {0x3801, 0x00},
855 {0x3802, 0x00},
856 {0x3803, 0x00},
857 {0x3804, 0x0c},
858 {0x3805, 0xdf},
859 {0x3806, 0x09},
860 {0x3807, 0xaf},
861 {0x3808, 0x06},
862 {0x3809, 0x68},
863 {0x380a, 0x04},
864 {0x380b, 0xd0},
865 {0x380c, 0x0e},
866 {0x380d, 0xec},
867 {0x380e, 0x04},
868 {0x380f, 0xe8},
869 {0x3810, 0x00},
870 {0x3811, 0x04},
871 {0x3812, 0x00},
872 {0x3813, 0x05},
873 {0x3814, 0x03},
874 {0x3815, 0x01},
875 {0x3816, 0x00},
876 {0x3817, 0x00},
877 {0x3818, 0x00},
878 {0x3819, 0x10},
879 {0x3820, 0x90},
880 {0x3821, 0x67},
881 {0x382a, 0x03},
882 {0x382b, 0x01},
883 {0x3830, 0x06},
884 {0x3836, 0x02},
885 {0x3862, 0x04},
886 {0x3863, 0x08},
887 {0x3cc0, 0x33},
888 {0x3d85, 0x17},
889 {0x3d8c, 0x73},
890 {0x3d8d, 0xde},
891 {0x4001, 0xe0},
892 {0x4003, 0x40},
893 {0x4008, 0x00},
894 {0x4009, 0x05},
895 {0x400a, 0x00},
896 {0x400b, 0x84},
897 {0x400f, 0x80},
898 {0x4010, 0xf0},
899 {0x4011, 0xff},
900 {0x4012, 0x02},
901 {0x4013, 0x01},
902 {0x4014, 0x01},
903 {0x4015, 0x01},
904 {0x4042, 0x00},
905 {0x4043, 0x80},
906 {0x4044, 0x00},
907 {0x4045, 0x80},
908 {0x4046, 0x00},
909 {0x4047, 0x80},
910 {0x4048, 0x00},
911 {0x4049, 0x80},
912 {0x4041, 0x03},
913 {0x404c, 0x20},
914 {0x404d, 0x00},
915 {0x404e, 0x20},
916 {0x4203, 0x80},
917 {0x4307, 0x30},
918 {0x4317, 0x00},
919 {0x4503, 0x08},
920 {0x4601, 0x80},
921 {0x4800, 0x44},
922 {0x4816, 0x53},
923 {0x481b, 0x58},
924 {0x481f, 0x27},
925 {0x4837, 0x16},
926 {0x483c, 0x0f},
927 {0x484b, 0x05},
928 {0x5000, 0x57},
929 {0x5001, 0x0a},
930 {0x5004, 0x06},
931 {0x502e, 0x03},
932 {0x5030, 0x41},
933 {0x5780, 0x14},
934 {0x5781, 0x0f},
935 {0x5782, 0x44},
936 {0x5783, 0x02},
937 {0x5784, 0x01},
938 {0x5785, 0x01},
939 {0x5786, 0x00},
940 {0x5787, 0x04},
941 {0x5788, 0x02},
942 {0x5789, 0x0f},
943 {0x578a, 0xfd},
944 {0x578b, 0xf5},
945 {0x578c, 0xf5},
946 {0x578d, 0x03},
947 {0x578e, 0x08},
948 {0x578f, 0x0c},
949 {0x5790, 0x08},
950 {0x5791, 0x04},
951 {0x5792, 0x00},
952 {0x5793, 0x52},
953 {0x5794, 0xa3},
954 {0x5795, 0x00},
955 {0x5796, 0x10},
956 {0x5797, 0x10},
957 {0x5798, 0x73},
958 {0x5799, 0x73},
959 {0x579a, 0x00},
960 {0x579b, 0x28},
961 {0x579c, 0x00},
962 {0x579d, 0x16},
963 {0x579e, 0x06},
964 {0x579f, 0x20},
965 {0x57a0, 0x04},
966 {0x57a1, 0xa0},
967 {0x59f8, 0x3d},
968 {0x5a08, 0x02},
969 {0x5b00, 0x02},
970 {0x5b01, 0x10},
971 {0x5b02, 0x03},
972 {0x5b03, 0xcf},
973 {0x5b05, 0x6c},
974 {0x5e00, 0x00}
975};
976
977static const struct ov8856_reg lane_4_mode_3264x2448[] = {
978 /* 3264x2448 resolution */
979 {0x0103, 0x01},
980 {0x0302, 0x3c},
981 {0x0303, 0x01},
982 {0x031e, 0x0c},
983 {0x3000, 0x20},
984 {0x3003, 0x08},
985 {0x300e, 0x20},
986 {0x3010, 0x00},
987 {0x3015, 0x84},
988 {0x3018, 0x72},
989 {0x3021, 0x23},
990 {0x3033, 0x24},
991 {0x3500, 0x00},
992 {0x3501, 0x9a},
993 {0x3502, 0x20},
994 {0x3503, 0x08},
995 {0x3505, 0x83},
996 {0x3508, 0x01},
997 {0x3509, 0x80},
998 {0x350c, 0x00},
999 {0x350d, 0x80},
1000 {0x350e, 0x04},
1001 {0x350f, 0x00},
1002 {0x3510, 0x00},
1003 {0x3511, 0x02},
1004 {0x3512, 0x00},
1005 {0x3600, 0x72},
1006 {0x3601, 0x40},
1007 {0x3602, 0x30},
1008 {0x3610, 0xc5},
1009 {0x3611, 0x58},
1010 {0x3612, 0x5c},
1011 {0x3613, 0xca},
1012 {0x3614, 0x60},
1013 {0x3628, 0xff},
1014 {0x3629, 0xff},
1015 {0x362a, 0xff},
1016 {0x3633, 0x10},
1017 {0x3634, 0x10},
1018 {0x3635, 0x10},
1019 {0x3636, 0x10},
1020 {0x3663, 0x08},
1021 {0x3669, 0x34},
1022 {0x366d, 0x00},
1023 {0x366e, 0x10},
1024 {0x3706, 0x86},
1025 {0x370b, 0x7e},
1026 {0x3714, 0x23},
1027 {0x3730, 0x12},
1028 {0x3733, 0x10},
1029 {0x3764, 0x00},
1030 {0x3765, 0x00},
1031 {0x3769, 0x62},
1032 {0x376a, 0x2a},
1033 {0x376b, 0x30},
1034 {0x3780, 0x00},
1035 {0x3781, 0x24},
1036 {0x3782, 0x00},
1037 {0x3783, 0x23},
1038 {0x3798, 0x2f},
1039 {0x37a1, 0x60},
1040 {0x37a8, 0x6a},
1041 {0x37ab, 0x3f},
1042 {0x37c2, 0x04},
1043 {0x37c3, 0xf1},
1044 {0x37c9, 0x80},
1045 {0x37cb, 0x16},
1046 {0x37cc, 0x16},
1047 {0x37cd, 0x16},
1048 {0x37ce, 0x16},
1049 {0x3800, 0x00},
1050 {0x3801, 0x00},
1051 {0x3802, 0x00},
1052 {0x3803, 0x0c},
1053 {0x3804, 0x0c},
1054 {0x3805, 0xdf},
1055 {0x3806, 0x09},
1056 {0x3807, 0xa3},
1057 {0x3808, 0x0c},
1058 {0x3809, 0xc0},
1059 {0x380a, 0x09},
1060 {0x380b, 0x90},
1061 {0x380c, 0x07},
1062 {0x380d, 0x8c},
1063 {0x380e, 0x09},
1064 {0x380f, 0xb2},
1065 {0x3810, 0x00},
1066 {0x3811, 0x04},
1067 {0x3812, 0x00},
1068 {0x3813, 0x02},
1069 {0x3814, 0x01},
1070 {0x3815, 0x01},
1071 {0x3816, 0x00},
1072 {0x3817, 0x00},
1073 {0x3818, 0x00},
1074 {0x3819, 0x10},
1075 {0x3820, 0x80},
1076 {0x3821, 0x46},
1077 {0x382a, 0x01},
1078 {0x382b, 0x01},
1079 {0x3830, 0x06},
1080 {0x3836, 0x02},
1081 {0x3862, 0x04},
1082 {0x3863, 0x08},
1083 {0x3cc0, 0x33},
1084 {0x3d85, 0x17},
1085 {0x3d8c, 0x73},
1086 {0x3d8d, 0xde},
1087 {0x4001, 0xe0},
1088 {0x4003, 0x40},
1089 {0x4008, 0x00},
1090 {0x4009, 0x0b},
1091 {0x400a, 0x00},
1092 {0x400b, 0x84},
1093 {0x400f, 0x80},
1094 {0x4010, 0xf0},
1095 {0x4011, 0xff},
1096 {0x4012, 0x02},
1097 {0x4013, 0x01},
1098 {0x4014, 0x01},
1099 {0x4015, 0x01},
1100 {0x4042, 0x00},
1101 {0x4043, 0x80},
1102 {0x4044, 0x00},
1103 {0x4045, 0x80},
1104 {0x4046, 0x00},
1105 {0x4047, 0x80},
1106 {0x4048, 0x00},
1107 {0x4049, 0x80},
1108 {0x4041, 0x03},
1109 {0x404c, 0x20},
1110 {0x404d, 0x00},
1111 {0x404e, 0x20},
1112 {0x4203, 0x80},
1113 {0x4307, 0x30},
1114 {0x4317, 0x00},
1115 {0x4502, 0x50},
1116 {0x4503, 0x08},
1117 {0x4601, 0x80},
1118 {0x4800, 0x44},
1119 {0x4816, 0x53},
1120 {0x481b, 0x50},
1121 {0x481f, 0x27},
1122 {0x4823, 0x3c},
1123 {0x482b, 0x00},
1124 {0x4831, 0x66},
1125 {0x4837, 0x16},
1126 {0x483c, 0x0f},
1127 {0x484b, 0x05},
1128 {0x5000, 0x77},
1129 {0x5001, 0x0a},
1130 {0x5003, 0xc8},
1131 {0x5004, 0x04},
1132 {0x5006, 0x00},
1133 {0x5007, 0x00},
1134 {0x502e, 0x03},
1135 {0x5030, 0x41},
1136 {0x5780, 0x14},
1137 {0x5781, 0x0f},
1138 {0x5782, 0x44},
1139 {0x5783, 0x02},
1140 {0x5784, 0x01},
1141 {0x5785, 0x01},
1142 {0x5786, 0x00},
1143 {0x5787, 0x04},
1144 {0x5788, 0x02},
1145 {0x5789, 0x0f},
1146 {0x578a, 0xfd},
1147 {0x578b, 0xf5},
1148 {0x578c, 0xf5},
1149 {0x578d, 0x03},
1150 {0x578e, 0x08},
1151 {0x578f, 0x0c},
1152 {0x5790, 0x08},
1153 {0x5791, 0x04},
1154 {0x5792, 0x00},
1155 {0x5793, 0x52},
1156 {0x5794, 0xa3},
1157 {0x5795, 0x02},
1158 {0x5796, 0x20},
1159 {0x5797, 0x20},
1160 {0x5798, 0xd5},
1161 {0x5799, 0xd5},
1162 {0x579a, 0x00},
1163 {0x579b, 0x50},
1164 {0x579c, 0x00},
1165 {0x579d, 0x2c},
1166 {0x579e, 0x0c},
1167 {0x579f, 0x40},
1168 {0x57a0, 0x09},
1169 {0x57a1, 0x40},
1170 {0x59f8, 0x3d},
1171 {0x5a08, 0x02},
1172 {0x5b00, 0x02},
1173 {0x5b01, 0x10},
1174 {0x5b02, 0x03},
1175 {0x5b03, 0xcf},
1176 {0x5b05, 0x6c},
1177 {0x5e00, 0x00},
1178 {0x5e10, 0xfc}
1179};
1180
1181static const struct ov8856_reg lane_4_mode_1632x1224[] = {
1182 /* 1632x1224 resolution */
1183 {0x0103, 0x01},
1184 {0x0302, 0x3c},
1185 {0x0303, 0x01},
1186 {0x031e, 0x0c},
1187 {0x3000, 0x20},
1188 {0x3003, 0x08},
1189 {0x300e, 0x20},
1190 {0x3010, 0x00},
1191 {0x3015, 0x84},
1192 {0x3018, 0x72},
1193 {0x3021, 0x23},
1194 {0x3033, 0x24},
1195 {0x3500, 0x00},
1196 {0x3501, 0x4c},
1197 {0x3502, 0xe0},
1198 {0x3503, 0x08},
1199 {0x3505, 0x83},
1200 {0x3508, 0x01},
1201 {0x3509, 0x80},
1202 {0x350c, 0x00},
1203 {0x350d, 0x80},
1204 {0x350e, 0x04},
1205 {0x350f, 0x00},
1206 {0x3510, 0x00},
1207 {0x3511, 0x02},
1208 {0x3512, 0x00},
1209 {0x3600, 0x72},
1210 {0x3601, 0x40},
1211 {0x3602, 0x30},
1212 {0x3610, 0xc5},
1213 {0x3611, 0x58},
1214 {0x3612, 0x5c},
1215 {0x3613, 0xca},
1216 {0x3614, 0x60},
1217 {0x3628, 0xff},
1218 {0x3629, 0xff},
1219 {0x362a, 0xff},
1220 {0x3633, 0x10},
1221 {0x3634, 0x10},
1222 {0x3635, 0x10},
1223 {0x3636, 0x10},
1224 {0x3663, 0x08},
1225 {0x3669, 0x34},
1226 {0x366d, 0x00},
1227 {0x366e, 0x08},
1228 {0x3706, 0x86},
1229 {0x370b, 0x7e},
1230 {0x3714, 0x27},
1231 {0x3730, 0x12},
1232 {0x3733, 0x10},
1233 {0x3764, 0x00},
1234 {0x3765, 0x00},
1235 {0x3769, 0x62},
1236 {0x376a, 0x2a},
1237 {0x376b, 0x30},
1238 {0x3780, 0x00},
1239 {0x3781, 0x24},
1240 {0x3782, 0x00},
1241 {0x3783, 0x23},
1242 {0x3798, 0x2f},
1243 {0x37a1, 0x60},
1244 {0x37a8, 0x6a},
1245 {0x37ab, 0x3f},
1246 {0x37c2, 0x14},
1247 {0x37c3, 0xf1},
1248 {0x37c9, 0x80},
1249 {0x37cb, 0x16},
1250 {0x37cc, 0x16},
1251 {0x37cd, 0x16},
1252 {0x37ce, 0x16},
1253 {0x3800, 0x00},
1254 {0x3801, 0x00},
1255 {0x3802, 0x00},
1256 {0x3803, 0x0c},
1257 {0x3804, 0x0c},
1258 {0x3805, 0xdf},
1259 {0x3806, 0x09},
1260 {0x3807, 0xa3},
1261 {0x3808, 0x06},
1262 {0x3809, 0x60},
1263 {0x380a, 0x04},
1264 {0x380b, 0xc8},
1265 {0x380c, 0x07},
1266 {0x380d, 0x8c},
1267 {0x380e, 0x09},
1268 {0x380f, 0xb2},
1269 {0x3810, 0x00},
1270 {0x3811, 0x02},
1271 {0x3812, 0x00},
1272 {0x3813, 0x02},
1273 {0x3814, 0x03},
1274 {0x3815, 0x01},
1275 {0x3816, 0x00},
1276 {0x3817, 0x00},
1277 {0x3818, 0x00},
1278 {0x3819, 0x10},
1279 {0x3820, 0x80},
1280 {0x3821, 0x47},
1281 {0x382a, 0x03},
1282 {0x382b, 0x01},
1283 {0x3830, 0x06},
1284 {0x3836, 0x02},
1285 {0x3862, 0x04},
1286 {0x3863, 0x08},
1287 {0x3cc0, 0x33},
1288 {0x3d85, 0x17},
1289 {0x3d8c, 0x73},
1290 {0x3d8d, 0xde},
1291 {0x4001, 0xe0},
1292 {0x4003, 0x40},
1293 {0x4008, 0x00},
1294 {0x4009, 0x05},
1295 {0x400a, 0x00},
1296 {0x400b, 0x84},
1297 {0x400f, 0x80},
1298 {0x4010, 0xf0},
1299 {0x4011, 0xff},
1300 {0x4012, 0x02},
1301 {0x4013, 0x01},
1302 {0x4014, 0x01},
1303 {0x4015, 0x01},
1304 {0x4042, 0x00},
1305 {0x4043, 0x80},
1306 {0x4044, 0x00},
1307 {0x4045, 0x80},
1308 {0x4046, 0x00},
1309 {0x4047, 0x80},
1310 {0x4048, 0x00},
1311 {0x4049, 0x80},
1312 {0x4041, 0x03},
1313 {0x404c, 0x20},
1314 {0x404d, 0x00},
1315 {0x404e, 0x20},
1316 {0x4203, 0x80},
1317 {0x4307, 0x30},
1318 {0x4317, 0x00},
1319 {0x4502, 0x50},
1320 {0x4503, 0x08},
1321 {0x4601, 0x80},
1322 {0x4800, 0x44},
1323 {0x4816, 0x53},
1324 {0x481b, 0x50},
1325 {0x481f, 0x27},
1326 {0x4823, 0x3c},
1327 {0x482b, 0x00},
1328 {0x4831, 0x66},
1329 {0x4837, 0x16},
1330 {0x483c, 0x0f},
1331 {0x484b, 0x05},
1332 {0x5000, 0x77},
1333 {0x5001, 0x0a},
1334 {0x5003, 0xc8},
1335 {0x5004, 0x04},
1336 {0x5006, 0x00},
1337 {0x5007, 0x00},
1338 {0x502e, 0x03},
1339 {0x5030, 0x41},
1340 {0x5795, 0x00},
1341 {0x5796, 0x10},
1342 {0x5797, 0x10},
1343 {0x5798, 0x73},
1344 {0x5799, 0x73},
1345 {0x579a, 0x00},
1346 {0x579b, 0x28},
1347 {0x579c, 0x00},
1348 {0x579d, 0x16},
1349 {0x579e, 0x06},
1350 {0x579f, 0x20},
1351 {0x57a0, 0x04},
1352 {0x57a1, 0xa0},
1353 {0x5780, 0x14},
1354 {0x5781, 0x0f},
1355 {0x5782, 0x44},
1356 {0x5783, 0x02},
1357 {0x5784, 0x01},
1358 {0x5785, 0x01},
1359 {0x5786, 0x00},
1360 {0x5787, 0x04},
1361 {0x5788, 0x02},
1362 {0x5789, 0x0f},
1363 {0x578a, 0xfd},
1364 {0x578b, 0xf5},
1365 {0x578c, 0xf5},
1366 {0x578d, 0x03},
1367 {0x578e, 0x08},
1368 {0x578f, 0x0c},
1369 {0x5790, 0x08},
1370 {0x5791, 0x04},
1371 {0x5792, 0x00},
1372 {0x5793, 0x52},
1373 {0x5794, 0xa3},
1374 {0x59f8, 0x3d},
1375 {0x5a08, 0x02},
1376 {0x5b00, 0x02},
1377 {0x5b01, 0x10},
1378 {0x5b02, 0x03},
1379 {0x5b03, 0xcf},
1380 {0x5b05, 0x6c},
1381 {0x5e00, 0x00},
1382 {0x5e10, 0xfc}
1383};
1384
1385static const struct ov8856_reg mipi_data_mbus_sbggr10_1x10[] = {
1386 {0x3813, 0x02},
1387};
1388
1389static const struct ov8856_reg mipi_data_mbus_sgrbg10_1x10[] = {
1390 {0x3813, 0x01},
1391};
1392
1393static const u32 ov8856_mbus_codes[] = {
1394 MEDIA_BUS_FMT_SBGGR10_1X10,
1395 MEDIA_BUS_FMT_SGRBG10_1X10
1396};
1397
1398static const char * const ov8856_test_pattern_menu[] = {
1399 "Disabled",
1400 "Standard Color Bar",
1401 "Top-Bottom Darker Color Bar",
1402 "Right-Left Darker Color Bar",
1403 "Bottom-Top Darker Color Bar"
1404};
1405
1406static const struct ov8856_reg_list bayer_offset_configs[] = {
1407 [OV8856_MEDIA_BUS_FMT_SBGGR10_1X10] = {
1408 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sbggr10_1x10),
1409 .regs = mipi_data_mbus_sbggr10_1x10,
1410 },
1411 [OV8856_MEDIA_BUS_FMT_SGRBG10_1X10] = {
1412 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sgrbg10_1x10),
1413 .regs = mipi_data_mbus_sgrbg10_1x10,
1414 }
1415};
1416
1417struct ov8856 {
1418 struct device *dev;
1419
1420 struct v4l2_subdev sd;
1421 struct media_pad pad;
1422 struct v4l2_ctrl_handler ctrl_handler;
1423
1424 struct clk *xvclk;
1425 struct gpio_desc *reset_gpio;
1426 struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)];
1427
1428 /* V4L2 Controls */
1429 struct v4l2_ctrl *link_freq;
1430 struct v4l2_ctrl *pixel_rate;
1431 struct v4l2_ctrl *vblank;
1432 struct v4l2_ctrl *hblank;
1433 struct v4l2_ctrl *exposure;
1434
1435 /* Current mode */
1436 const struct ov8856_mode *cur_mode;
1437
1438 /* Application specified mbus format */
1439 u32 cur_mbus_index;
1440
1441 /* To serialize asynchronous callbacks */
1442 struct mutex mutex;
1443
1444 /* lanes index */
1445 u8 nlanes;
1446
1447 const struct ov8856_lane_cfg *priv_lane;
1448 u8 modes_size;
1449
1450 /* True if the device has been identified */
1451 bool identified;
1452};
1453
1454struct ov8856_lane_cfg {
1455 const s64 link_freq_menu_items[2];
1456 const struct ov8856_link_freq_config link_freq_configs[2];
1457 const struct ov8856_mode supported_modes[4];
1458};
1459
1460static const struct ov8856_lane_cfg lane_cfg_2 = {
1461 {
1462 720000000,
1463 360000000,
1464 },
1465 {{
1466 .reg_list = {
1467 .num_of_regs =
1468 ARRAY_SIZE(mipi_data_rate_lane_2.regs_0),
1469 .regs = mipi_data_rate_lane_2.regs_0,
1470 }
1471 },
1472 {
1473 .reg_list = {
1474 .num_of_regs =
1475 ARRAY_SIZE(mipi_data_rate_lane_2.regs_1),
1476 .regs = mipi_data_rate_lane_2.regs_1,
1477 }
1478 }},
1479 {{
1480 .width = 3280,
1481 .height = 2464,
1482 .hts = 1928,
1483 .vts_def = 2488,
1484 .vts_min = 2488,
1485 .reg_list = {
1486 .num_of_regs =
1487 ARRAY_SIZE(lane_2_mode_3280x2464),
1488 .regs = lane_2_mode_3280x2464,
1489 },
1490 .link_freq_index = 0,
1491 .data_lanes = 2,
1492 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1493 },
1494 {
1495 .width = 1640,
1496 .height = 1232,
1497 .hts = 3168,
1498 .vts_def = 1514,
1499 .vts_min = 1514,
1500 .reg_list = {
1501 .num_of_regs =
1502 ARRAY_SIZE(lane_2_mode_1640x1232),
1503 .regs = lane_2_mode_1640x1232,
1504 },
1505 .link_freq_index = 1,
1506 .data_lanes = 2,
1507 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1508 }}
1509};
1510
1511static const struct ov8856_lane_cfg lane_cfg_4 = {
1512 {
1513 360000000,
1514 180000000,
1515 },
1516 {{
1517 .reg_list = {
1518 .num_of_regs =
1519 ARRAY_SIZE(mipi_data_rate_lane_4.regs_0),
1520 .regs = mipi_data_rate_lane_4.regs_0,
1521 }
1522 },
1523 {
1524 .reg_list = {
1525 .num_of_regs =
1526 ARRAY_SIZE(mipi_data_rate_lane_4.regs_1),
1527 .regs = mipi_data_rate_lane_4.regs_1,
1528 }
1529 }},
1530 {{
1531 .width = 3280,
1532 .height = 2464,
1533 .hts = 1928,
1534 .vts_def = 2488,
1535 .vts_min = 2488,
1536 .reg_list = {
1537 .num_of_regs =
1538 ARRAY_SIZE(lane_4_mode_3280x2464),
1539 .regs = lane_4_mode_3280x2464,
1540 },
1541 .link_freq_index = 0,
1542 .data_lanes = 4,
1543 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1544 },
1545 {
1546 .width = 1640,
1547 .height = 1232,
1548 .hts = 3820,
1549 .vts_def = 1256,
1550 .vts_min = 1256,
1551 .reg_list = {
1552 .num_of_regs =
1553 ARRAY_SIZE(lane_4_mode_1640x1232),
1554 .regs = lane_4_mode_1640x1232,
1555 },
1556 .link_freq_index = 1,
1557 .data_lanes = 4,
1558 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1559 },
1560 {
1561 .width = 3264,
1562 .height = 2448,
1563 .hts = 1932,
1564 .vts_def = 2482,
1565 .vts_min = 2482,
1566 .reg_list = {
1567 .num_of_regs =
1568 ARRAY_SIZE(lane_4_mode_3264x2448),
1569 .regs = lane_4_mode_3264x2448,
1570 },
1571 .link_freq_index = 0,
1572 .data_lanes = 4,
1573 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
1574 },
1575 {
1576 .width = 1632,
1577 .height = 1224,
1578 .hts = 1932,
1579 .vts_def = 2482,
1580 .vts_min = 2482,
1581 .reg_list = {
1582 .num_of_regs =
1583 ARRAY_SIZE(lane_4_mode_1632x1224),
1584 .regs = lane_4_mode_1632x1224,
1585 },
1586 .link_freq_index = 1,
1587 .data_lanes = 4,
1588 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
1589 }}
1590};
1591
1592static unsigned int ov8856_modes_num(const struct ov8856 *ov8856)
1593{
1594 unsigned int i, count = 0;
1595
1596 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->supported_modes); i++) {
1597 if (ov8856->priv_lane->supported_modes[i].width == 0)
1598 break;
1599 count++;
1600 }
1601
1602 return count;
1603}
1604
1605static u64 to_rate(const s64 *link_freq_menu_items,
1606 u32 f_index, u8 nlanes)
1607{
1608 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * nlanes;
1609
1610 do_div(pixel_rate, OV8856_RGB_DEPTH);
1611
1612 return pixel_rate;
1613}
1614
1615static u64 to_pixels_per_line(const s64 *link_freq_menu_items, u32 hts,
1616 u32 f_index, u8 nlanes)
1617{
1618 u64 ppl = hts * to_rate(link_freq_menu_items, f_index, nlanes);
1619
1620 do_div(ppl, OV8856_SCLK);
1621
1622 return ppl;
1623}
1624
1625static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val)
1626{
1627 struct i2c_client *client = v4l2_get_subdevdata(sd: &ov8856->sd);
1628 struct i2c_msg msgs[2];
1629 u8 addr_buf[2];
1630 u8 data_buf[4] = {0};
1631 int ret;
1632
1633 if (len > 4)
1634 return -EINVAL;
1635
1636 put_unaligned_be16(val: reg, p: addr_buf);
1637 msgs[0].addr = client->addr;
1638 msgs[0].flags = 0;
1639 msgs[0].len = sizeof(addr_buf);
1640 msgs[0].buf = addr_buf;
1641 msgs[1].addr = client->addr;
1642 msgs[1].flags = I2C_M_RD;
1643 msgs[1].len = len;
1644 msgs[1].buf = &data_buf[4 - len];
1645
1646 ret = i2c_transfer(adap: client->adapter, msgs, ARRAY_SIZE(msgs));
1647 if (ret != ARRAY_SIZE(msgs))
1648 return -EIO;
1649
1650 *val = get_unaligned_be32(p: data_buf);
1651
1652 return 0;
1653}
1654
1655static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val)
1656{
1657 struct i2c_client *client = v4l2_get_subdevdata(sd: &ov8856->sd);
1658 u8 buf[6];
1659
1660 if (len > 4)
1661 return -EINVAL;
1662
1663 put_unaligned_be16(val: reg, p: buf);
1664 put_unaligned_be32(val: val << 8 * (4 - len), p: buf + 2);
1665 if (i2c_master_send(client, buf, count: len + 2) != len + 2)
1666 return -EIO;
1667
1668 return 0;
1669}
1670
1671static int ov8856_write_reg_list(struct ov8856 *ov8856,
1672 const struct ov8856_reg_list *r_list)
1673{
1674 unsigned int i;
1675 int ret;
1676
1677 for (i = 0; i < r_list->num_of_regs; i++) {
1678 ret = ov8856_write_reg(ov8856, reg: r_list->regs[i].address, len: 1,
1679 val: r_list->regs[i].val);
1680 if (ret) {
1681 dev_err_ratelimited(ov8856->dev,
1682 "failed to write reg 0x%4.4x. error = %d",
1683 r_list->regs[i].address, ret);
1684 return ret;
1685 }
1686 }
1687
1688 return 0;
1689}
1690
1691static int ov8856_identify_module(struct ov8856 *ov8856)
1692{
1693 int ret;
1694 u32 val;
1695
1696 if (ov8856->identified)
1697 return 0;
1698
1699 ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID,
1700 OV8856_REG_VALUE_24BIT, val: &val);
1701 if (ret)
1702 return ret;
1703
1704 if (val != OV8856_CHIP_ID) {
1705 dev_err(ov8856->dev, "chip id mismatch: %x!=%x",
1706 OV8856_CHIP_ID, val);
1707 return -ENXIO;
1708 }
1709
1710 ov8856->identified = true;
1711
1712 return 0;
1713}
1714
1715static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain)
1716{
1717 return ov8856_write_reg(ov8856, OV8856_REG_DIGITAL_GAIN,
1718 OV8856_REG_VALUE_16BIT, val: d_gain);
1719}
1720
1721static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern)
1722{
1723 if (pattern)
1724 pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT |
1725 OV8856_TEST_PATTERN_ENABLE;
1726
1727 return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN,
1728 OV8856_REG_VALUE_08BIT, val: pattern);
1729}
1730
1731static int ov8856_set_ctrl_hflip(struct ov8856 *ov8856, u32 ctrl_val)
1732{
1733 int ret;
1734 u32 val;
1735
1736 ret = ov8856_read_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1737 OV8856_REG_VALUE_08BIT, val: &val);
1738 if (ret)
1739 return ret;
1740
1741 ret = ov8856_write_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1742 OV8856_REG_VALUE_08BIT,
1743 val: ctrl_val ? val & ~OV8856_REG_MIRROR_OP_2 :
1744 val | OV8856_REG_MIRROR_OP_2);
1745
1746 if (ret)
1747 return ret;
1748
1749 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT2,
1750 OV8856_REG_VALUE_08BIT, val: &val);
1751 if (ret)
1752 return ret;
1753
1754 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT2,
1755 OV8856_REG_VALUE_08BIT,
1756 val: ctrl_val ? val & ~OV8856_REG_FORMAT2_OP_1 &
1757 ~OV8856_REG_FORMAT2_OP_2 &
1758 ~OV8856_REG_FORMAT2_OP_3 :
1759 val | OV8856_REG_FORMAT2_OP_1 |
1760 OV8856_REG_FORMAT2_OP_2 |
1761 OV8856_REG_FORMAT2_OP_3);
1762}
1763
1764static int ov8856_set_ctrl_vflip(struct ov8856 *ov8856, u8 ctrl_val)
1765{
1766 int ret;
1767 u32 val;
1768
1769 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1770 OV8856_REG_VALUE_08BIT, val: &val);
1771 if (ret)
1772 return ret;
1773
1774 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1775 OV8856_REG_VALUE_08BIT,
1776 val: ctrl_val ? val | OV8856_REG_FLIP_OP_1 |
1777 OV8856_REG_FLIP_OP_2 :
1778 val & ~OV8856_REG_FLIP_OP_1 &
1779 ~OV8856_REG_FLIP_OP_2);
1780
1781 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1782 OV8856_REG_VALUE_08BIT, val: &val);
1783 if (ret)
1784 return ret;
1785
1786 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1787 OV8856_REG_VALUE_08BIT,
1788 val: ctrl_val ? val | OV8856_REG_FLIP_OP_2 :
1789 val & ~OV8856_REG_FLIP_OP_2);
1790
1791 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1792 OV8856_REG_VALUE_08BIT, val: &val);
1793 if (ret)
1794 return ret;
1795
1796 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1797 OV8856_REG_VALUE_08BIT,
1798 val: ctrl_val ? val & ~OV8856_REG_FLIP_OP_0 &
1799 ~OV8856_REG_FLIP_OP_1 :
1800 val | OV8856_REG_FLIP_OP_0 |
1801 OV8856_REG_FLIP_OP_1);
1802
1803 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT1,
1804 OV8856_REG_VALUE_08BIT, val: &val);
1805 if (ret)
1806 return ret;
1807
1808 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT1,
1809 OV8856_REG_VALUE_08BIT,
1810 val: ctrl_val ? val | OV8856_REG_FORMAT1_OP_1 |
1811 OV8856_REG_FORMAT1_OP_3 |
1812 OV8856_REG_FORMAT1_OP_2 :
1813 val & ~OV8856_REG_FORMAT1_OP_1 &
1814 ~OV8856_REG_FORMAT1_OP_3 &
1815 ~OV8856_REG_FORMAT1_OP_2);
1816}
1817
1818static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl)
1819{
1820 struct ov8856 *ov8856 = container_of(ctrl->handler,
1821 struct ov8856, ctrl_handler);
1822 s64 exposure_max;
1823 int ret = 0;
1824
1825 /* Propagate change of current control to all related controls */
1826 if (ctrl->id == V4L2_CID_VBLANK) {
1827 /* Update max exposure while meeting expected vblanking */
1828 exposure_max = ov8856->cur_mode->height + ctrl->val -
1829 OV8856_EXPOSURE_MAX_MARGIN;
1830 __v4l2_ctrl_modify_range(ctrl: ov8856->exposure,
1831 min: ov8856->exposure->minimum,
1832 max: exposure_max, step: ov8856->exposure->step,
1833 def: exposure_max);
1834 }
1835
1836 /* V4L2 controls values will be applied only when power is already up */
1837 if (!pm_runtime_get_if_in_use(dev: ov8856->dev))
1838 return 0;
1839
1840 switch (ctrl->id) {
1841 case V4L2_CID_ANALOGUE_GAIN:
1842 ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN,
1843 OV8856_REG_VALUE_16BIT, val: ctrl->val);
1844 break;
1845
1846 case V4L2_CID_DIGITAL_GAIN:
1847 ret = ov8856_update_digital_gain(ov8856, d_gain: ctrl->val);
1848 break;
1849
1850 case V4L2_CID_EXPOSURE:
1851 /* 4 least significant bits of expsoure are fractional part */
1852 ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE,
1853 OV8856_REG_VALUE_24BIT, val: ctrl->val << 4);
1854 break;
1855
1856 case V4L2_CID_VBLANK:
1857 ret = ov8856_write_reg(ov8856, OV8856_REG_VTS,
1858 OV8856_REG_VALUE_16BIT,
1859 val: ov8856->cur_mode->height + ctrl->val);
1860 break;
1861
1862 case V4L2_CID_TEST_PATTERN:
1863 ret = ov8856_test_pattern(ov8856, pattern: ctrl->val);
1864 break;
1865
1866 case V4L2_CID_HFLIP:
1867 ret = ov8856_set_ctrl_hflip(ov8856, ctrl_val: ctrl->val);
1868 break;
1869
1870 case V4L2_CID_VFLIP:
1871 ret = ov8856_set_ctrl_vflip(ov8856, ctrl_val: ctrl->val);
1872 break;
1873
1874 default:
1875 ret = -EINVAL;
1876 break;
1877 }
1878
1879 pm_runtime_put(dev: ov8856->dev);
1880
1881 return ret;
1882}
1883
1884static const struct v4l2_ctrl_ops ov8856_ctrl_ops = {
1885 .s_ctrl = ov8856_set_ctrl,
1886};
1887
1888static int ov8856_init_controls(struct ov8856 *ov8856)
1889{
1890 struct v4l2_ctrl_handler *ctrl_hdlr;
1891 s64 exposure_max, h_blank;
1892 int ret;
1893
1894 ctrl_hdlr = &ov8856->ctrl_handler;
1895 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
1896 if (ret)
1897 return ret;
1898
1899 ctrl_hdlr->lock = &ov8856->mutex;
1900 ov8856->link_freq = v4l2_ctrl_new_int_menu(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops,
1901 V4L2_CID_LINK_FREQ,
1902 ARRAY_SIZE
1903 (ov8856->priv_lane->link_freq_menu_items)
1904 - 1,
1905 def: 0, qmenu_int: ov8856->priv_lane->link_freq_menu_items);
1906 if (ov8856->link_freq)
1907 ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1908
1909 ov8856->pixel_rate = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops,
1910 V4L2_CID_PIXEL_RATE, min: 0,
1911 max: to_rate(link_freq_menu_items: ov8856->priv_lane->link_freq_menu_items,
1912 f_index: 0,
1913 nlanes: ov8856->cur_mode->data_lanes), step: 1,
1914 def: to_rate(link_freq_menu_items: ov8856->priv_lane->link_freq_menu_items,
1915 f_index: 0,
1916 nlanes: ov8856->cur_mode->data_lanes));
1917 ov8856->vblank = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops,
1918 V4L2_CID_VBLANK,
1919 min: ov8856->cur_mode->vts_min - ov8856->cur_mode->height,
1920 OV8856_VTS_MAX - ov8856->cur_mode->height, step: 1,
1921 def: ov8856->cur_mode->vts_def -
1922 ov8856->cur_mode->height);
1923 h_blank = to_pixels_per_line(link_freq_menu_items: ov8856->priv_lane->link_freq_menu_items,
1924 hts: ov8856->cur_mode->hts,
1925 f_index: ov8856->cur_mode->link_freq_index,
1926 nlanes: ov8856->cur_mode->data_lanes) -
1927 ov8856->cur_mode->width;
1928 ov8856->hblank = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops,
1929 V4L2_CID_HBLANK, min: h_blank, max: h_blank, step: 1,
1930 def: h_blank);
1931 if (ov8856->hblank)
1932 ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1933
1934 v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1935 OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX,
1936 OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN);
1937 v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1938 OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX,
1939 OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT);
1940 exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN;
1941 ov8856->exposure = v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops,
1942 V4L2_CID_EXPOSURE,
1943 OV8856_EXPOSURE_MIN, max: exposure_max,
1944 OV8856_EXPOSURE_STEP,
1945 def: exposure_max);
1946 v4l2_ctrl_new_std_menu_items(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops,
1947 V4L2_CID_TEST_PATTERN,
1948 ARRAY_SIZE(ov8856_test_pattern_menu) - 1,
1949 mask: 0, def: 0, qmenu: ov8856_test_pattern_menu);
1950 v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops,
1951 V4L2_CID_HFLIP, min: 0, max: 1, step: 1, def: 0);
1952 v4l2_ctrl_new_std(hdl: ctrl_hdlr, ops: &ov8856_ctrl_ops,
1953 V4L2_CID_VFLIP, min: 0, max: 1, step: 1, def: 0);
1954 if (ctrl_hdlr->error)
1955 return ctrl_hdlr->error;
1956
1957 ov8856->sd.ctrl_handler = ctrl_hdlr;
1958
1959 return 0;
1960}
1961
1962static void ov8856_update_pad_format(struct ov8856 *ov8856,
1963 const struct ov8856_mode *mode,
1964 struct v4l2_mbus_framefmt *fmt)
1965{
1966 int index;
1967
1968 fmt->width = mode->width;
1969 fmt->height = mode->height;
1970 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index)
1971 if (ov8856_mbus_codes[index] == fmt->code)
1972 break;
1973 if (index == ARRAY_SIZE(ov8856_mbus_codes))
1974 index = mode->default_mbus_index;
1975 fmt->code = ov8856_mbus_codes[index];
1976 ov8856->cur_mbus_index = index;
1977 fmt->field = V4L2_FIELD_NONE;
1978}
1979
1980static int ov8856_start_streaming(struct ov8856 *ov8856)
1981{
1982 const struct ov8856_reg_list *reg_list;
1983 int link_freq_index, ret;
1984
1985 ret = ov8856_identify_module(ov8856);
1986 if (ret)
1987 return ret;
1988
1989 link_freq_index = ov8856->cur_mode->link_freq_index;
1990 reg_list = &ov8856->priv_lane->link_freq_configs[link_freq_index].reg_list;
1991
1992 ret = ov8856_write_reg_list(ov8856, r_list: reg_list);
1993 if (ret) {
1994 dev_err(ov8856->dev, "failed to set plls");
1995 return ret;
1996 }
1997
1998 reg_list = &ov8856->cur_mode->reg_list;
1999 ret = ov8856_write_reg_list(ov8856, r_list: reg_list);
2000 if (ret) {
2001 dev_err(ov8856->dev, "failed to set mode");
2002 return ret;
2003 }
2004
2005 reg_list = &bayer_offset_configs[ov8856->cur_mbus_index];
2006 ret = ov8856_write_reg_list(ov8856, r_list: reg_list);
2007 if (ret) {
2008 dev_err(ov8856->dev, "failed to set mbus format");
2009 return ret;
2010 }
2011
2012 ret = __v4l2_ctrl_handler_setup(hdl: ov8856->sd.ctrl_handler);
2013 if (ret)
2014 return ret;
2015
2016 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2017 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING);
2018 if (ret) {
2019 dev_err(ov8856->dev, "failed to set stream");
2020 return ret;
2021 }
2022
2023 return 0;
2024}
2025
2026static void ov8856_stop_streaming(struct ov8856 *ov8856)
2027{
2028 if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2029 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY))
2030 dev_err(ov8856->dev, "failed to set stream");
2031}
2032
2033static int ov8856_set_stream(struct v4l2_subdev *sd, int enable)
2034{
2035 struct ov8856 *ov8856 = to_ov8856(sd);
2036 int ret = 0;
2037
2038 mutex_lock(&ov8856->mutex);
2039 if (enable) {
2040 ret = pm_runtime_resume_and_get(dev: ov8856->dev);
2041 if (ret < 0) {
2042 mutex_unlock(lock: &ov8856->mutex);
2043 return ret;
2044 }
2045
2046 ret = ov8856_start_streaming(ov8856);
2047 if (ret) {
2048 enable = 0;
2049 ov8856_stop_streaming(ov8856);
2050 pm_runtime_put(dev: ov8856->dev);
2051 }
2052 } else {
2053 ov8856_stop_streaming(ov8856);
2054 pm_runtime_put(dev: ov8856->dev);
2055 }
2056
2057 mutex_unlock(lock: &ov8856->mutex);
2058
2059 return ret;
2060}
2061
2062static int ov8856_power_on(struct device *dev)
2063{
2064 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2065 struct ov8856 *ov8856 = to_ov8856(sd);
2066 int ret;
2067
2068 if (is_acpi_node(dev_fwnode(dev)))
2069 return 0;
2070
2071 ret = clk_prepare_enable(clk: ov8856->xvclk);
2072 if (ret < 0) {
2073 dev_err(dev, "failed to enable xvclk\n");
2074 return ret;
2075 }
2076
2077 if (ov8856->reset_gpio) {
2078 gpiod_set_value_cansleep(desc: ov8856->reset_gpio, value: 1);
2079 usleep_range(min: 1000, max: 2000);
2080 }
2081
2082 ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names),
2083 consumers: ov8856->supplies);
2084 if (ret < 0) {
2085 dev_err(dev, "failed to enable regulators\n");
2086 goto disable_clk;
2087 }
2088
2089 gpiod_set_value_cansleep(desc: ov8856->reset_gpio, value: 0);
2090 usleep_range(min: 1500, max: 1800);
2091
2092 return 0;
2093
2094disable_clk:
2095 gpiod_set_value_cansleep(desc: ov8856->reset_gpio, value: 1);
2096 clk_disable_unprepare(clk: ov8856->xvclk);
2097
2098 return ret;
2099}
2100
2101static int ov8856_power_off(struct device *dev)
2102{
2103 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2104 struct ov8856 *ov8856 = to_ov8856(sd);
2105
2106 if (is_acpi_node(dev_fwnode(dev)))
2107 return 0;
2108
2109 gpiod_set_value_cansleep(desc: ov8856->reset_gpio, value: 1);
2110 regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names),
2111 consumers: ov8856->supplies);
2112 clk_disable_unprepare(clk: ov8856->xvclk);
2113
2114 return 0;
2115}
2116
2117static int ov8856_set_format(struct v4l2_subdev *sd,
2118 struct v4l2_subdev_state *sd_state,
2119 struct v4l2_subdev_format *fmt)
2120{
2121 struct ov8856 *ov8856 = to_ov8856(sd);
2122 const struct ov8856_mode *mode;
2123 s32 vblank_def, h_blank;
2124
2125 mode = v4l2_find_nearest_size(ov8856->priv_lane->supported_modes,
2126 ov8856->modes_size,
2127 width, height, fmt->format.width,
2128 fmt->format.height);
2129
2130 mutex_lock(&ov8856->mutex);
2131 ov8856_update_pad_format(ov8856, mode, fmt: &fmt->format);
2132 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2133 *v4l2_subdev_state_get_format(sd_state, fmt->pad) = fmt->format;
2134 } else {
2135 ov8856->cur_mode = mode;
2136 __v4l2_ctrl_s_ctrl(ctrl: ov8856->link_freq, val: mode->link_freq_index);
2137 __v4l2_ctrl_s_ctrl_int64(ctrl: ov8856->pixel_rate,
2138 val: to_rate(link_freq_menu_items: ov8856->priv_lane->link_freq_menu_items,
2139 f_index: mode->link_freq_index,
2140 nlanes: ov8856->cur_mode->data_lanes));
2141
2142 /* Update limits and set FPS to default */
2143 vblank_def = mode->vts_def - mode->height;
2144 __v4l2_ctrl_modify_range(ctrl: ov8856->vblank,
2145 min: mode->vts_min - mode->height,
2146 OV8856_VTS_MAX - mode->height, step: 1,
2147 def: vblank_def);
2148 __v4l2_ctrl_s_ctrl(ctrl: ov8856->vblank, val: vblank_def);
2149 h_blank = to_pixels_per_line(link_freq_menu_items: ov8856->priv_lane->link_freq_menu_items,
2150 hts: mode->hts,
2151 f_index: mode->link_freq_index,
2152 nlanes: ov8856->cur_mode->data_lanes)
2153 - mode->width;
2154 __v4l2_ctrl_modify_range(ctrl: ov8856->hblank, min: h_blank, max: h_blank, step: 1,
2155 def: h_blank);
2156 }
2157
2158 mutex_unlock(lock: &ov8856->mutex);
2159
2160 return 0;
2161}
2162
2163static int ov8856_get_format(struct v4l2_subdev *sd,
2164 struct v4l2_subdev_state *sd_state,
2165 struct v4l2_subdev_format *fmt)
2166{
2167 struct ov8856 *ov8856 = to_ov8856(sd);
2168
2169 mutex_lock(&ov8856->mutex);
2170 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
2171 fmt->format = *v4l2_subdev_state_get_format(sd_state,
2172 fmt->pad);
2173 else
2174 ov8856_update_pad_format(ov8856, mode: ov8856->cur_mode, fmt: &fmt->format);
2175
2176 mutex_unlock(lock: &ov8856->mutex);
2177
2178 return 0;
2179}
2180
2181static int ov8856_enum_mbus_code(struct v4l2_subdev *sd,
2182 struct v4l2_subdev_state *sd_state,
2183 struct v4l2_subdev_mbus_code_enum *code)
2184{
2185 if (code->index >= ARRAY_SIZE(ov8856_mbus_codes))
2186 return -EINVAL;
2187
2188 code->code = ov8856_mbus_codes[code->index];
2189
2190 return 0;
2191}
2192
2193static int ov8856_enum_frame_size(struct v4l2_subdev *sd,
2194 struct v4l2_subdev_state *sd_state,
2195 struct v4l2_subdev_frame_size_enum *fse)
2196{
2197 struct ov8856 *ov8856 = to_ov8856(sd);
2198 int index;
2199
2200 if (fse->index >= ov8856->modes_size)
2201 return -EINVAL;
2202
2203 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index)
2204 if (fse->code == ov8856_mbus_codes[index])
2205 break;
2206 if (index == ARRAY_SIZE(ov8856_mbus_codes))
2207 return -EINVAL;
2208
2209 fse->min_width = ov8856->priv_lane->supported_modes[fse->index].width;
2210 fse->max_width = fse->min_width;
2211 fse->min_height = ov8856->priv_lane->supported_modes[fse->index].height;
2212 fse->max_height = fse->min_height;
2213
2214 return 0;
2215}
2216
2217static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2218{
2219 struct ov8856 *ov8856 = to_ov8856(sd);
2220
2221 mutex_lock(&ov8856->mutex);
2222 ov8856_update_pad_format(ov8856, mode: &ov8856->priv_lane->supported_modes[0],
2223 v4l2_subdev_state_get_format(fh->state, 0));
2224 mutex_unlock(lock: &ov8856->mutex);
2225
2226 return 0;
2227}
2228
2229static const struct v4l2_subdev_video_ops ov8856_video_ops = {
2230 .s_stream = ov8856_set_stream,
2231};
2232
2233static const struct v4l2_subdev_pad_ops ov8856_pad_ops = {
2234 .set_fmt = ov8856_set_format,
2235 .get_fmt = ov8856_get_format,
2236 .enum_mbus_code = ov8856_enum_mbus_code,
2237 .enum_frame_size = ov8856_enum_frame_size,
2238};
2239
2240static const struct v4l2_subdev_ops ov8856_subdev_ops = {
2241 .video = &ov8856_video_ops,
2242 .pad = &ov8856_pad_ops,
2243};
2244
2245static const struct media_entity_operations ov8856_subdev_entity_ops = {
2246 .link_validate = v4l2_subdev_link_validate,
2247};
2248
2249static const struct v4l2_subdev_internal_ops ov8856_internal_ops = {
2250 .open = ov8856_open,
2251};
2252
2253
2254static int ov8856_get_hwcfg(struct ov8856 *ov8856)
2255{
2256 struct device *dev = ov8856->dev;
2257 struct fwnode_handle *ep;
2258 struct fwnode_handle *fwnode = dev_fwnode(dev);
2259 struct v4l2_fwnode_endpoint bus_cfg = {
2260 .bus_type = V4L2_MBUS_CSI2_DPHY
2261 };
2262 u32 xvclk_rate;
2263 int ret;
2264 unsigned int i, j;
2265
2266 if (!fwnode)
2267 return -ENXIO;
2268
2269 ov8856->xvclk = devm_v4l2_sensor_clk_get_legacy(dev, id: "xvclk", fixed_rate: false, clk_rate: 0);
2270 if (IS_ERR(ptr: ov8856->xvclk))
2271 return dev_err_probe(dev, err: PTR_ERR(ptr: ov8856->xvclk),
2272 fmt: "could not get xvclk clock\n");
2273
2274 xvclk_rate = clk_get_rate(clk: ov8856->xvclk);
2275 if (xvclk_rate != OV8856_XVCLK_19_2)
2276 dev_warn(dev, "external clock rate %u is unsupported",
2277 xvclk_rate);
2278
2279 if (!is_acpi_node(fwnode)) {
2280 ov8856->reset_gpio = devm_gpiod_get_optional(dev, con_id: "reset",
2281 flags: GPIOD_OUT_LOW);
2282 if (IS_ERR(ptr: ov8856->reset_gpio))
2283 return PTR_ERR(ptr: ov8856->reset_gpio);
2284
2285 for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++)
2286 ov8856->supplies[i].supply = ov8856_supply_names[i];
2287
2288 ret = devm_regulator_bulk_get(dev,
2289 ARRAY_SIZE(ov8856_supply_names),
2290 consumers: ov8856->supplies);
2291 if (ret)
2292 return ret;
2293 }
2294
2295 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
2296 if (!ep)
2297 return -ENXIO;
2298
2299 ret = v4l2_fwnode_endpoint_alloc_parse(fwnode: ep, vep: &bus_cfg);
2300 fwnode_handle_put(fwnode: ep);
2301 if (ret)
2302 return ret;
2303
2304 /* Get number of data lanes */
2305 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2 &&
2306 bus_cfg.bus.mipi_csi2.num_data_lanes != 4) {
2307 dev_err(dev, "number of CSI2 data lanes %d is not supported",
2308 bus_cfg.bus.mipi_csi2.num_data_lanes);
2309 ret = -EINVAL;
2310 goto check_hwcfg_error;
2311 }
2312
2313 dev_dbg(dev, "Using %u data lanes\n", ov8856->cur_mode->data_lanes);
2314
2315 if (bus_cfg.bus.mipi_csi2.num_data_lanes == 2)
2316 ov8856->priv_lane = &lane_cfg_2;
2317 else
2318 ov8856->priv_lane = &lane_cfg_4;
2319
2320 ov8856->modes_size = ov8856_modes_num(ov8856);
2321
2322 if (!bus_cfg.nr_of_link_frequencies) {
2323 dev_err(dev, "no link frequencies defined");
2324 ret = -EINVAL;
2325 goto check_hwcfg_error;
2326 }
2327
2328 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->link_freq_menu_items); i++) {
2329 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
2330 if (ov8856->priv_lane->link_freq_menu_items[i] ==
2331 bus_cfg.link_frequencies[j])
2332 break;
2333 }
2334
2335 if (j == bus_cfg.nr_of_link_frequencies) {
2336 dev_err(dev, "no link frequency %lld supported",
2337 ov8856->priv_lane->link_freq_menu_items[i]);
2338 ret = -EINVAL;
2339 goto check_hwcfg_error;
2340 }
2341 }
2342
2343check_hwcfg_error:
2344 v4l2_fwnode_endpoint_free(vep: &bus_cfg);
2345
2346 return ret;
2347}
2348
2349static void ov8856_remove(struct i2c_client *client)
2350{
2351 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2352 struct ov8856 *ov8856 = to_ov8856(sd);
2353
2354 v4l2_async_unregister_subdev(sd);
2355 media_entity_cleanup(entity: &sd->entity);
2356 v4l2_ctrl_handler_free(hdl: sd->ctrl_handler);
2357 pm_runtime_disable(dev: ov8856->dev);
2358 mutex_destroy(lock: &ov8856->mutex);
2359
2360 ov8856_power_off(dev: ov8856->dev);
2361}
2362
2363static int ov8856_probe(struct i2c_client *client)
2364{
2365 struct ov8856 *ov8856;
2366 int ret;
2367 bool full_power;
2368
2369 ov8856 = devm_kzalloc(dev: &client->dev, size: sizeof(*ov8856), GFP_KERNEL);
2370 if (!ov8856)
2371 return -ENOMEM;
2372
2373 ov8856->dev = &client->dev;
2374
2375 ret = ov8856_get_hwcfg(ov8856);
2376 if (ret)
2377 return ret;
2378
2379 v4l2_i2c_subdev_init(sd: &ov8856->sd, client, ops: &ov8856_subdev_ops);
2380
2381 full_power = acpi_dev_state_d0(dev: ov8856->dev);
2382 if (full_power) {
2383 ret = ov8856_power_on(dev: ov8856->dev);
2384 if (ret) {
2385 dev_err(ov8856->dev, "failed to power on\n");
2386 return ret;
2387 }
2388
2389 ret = ov8856_identify_module(ov8856);
2390 if (ret) {
2391 dev_err(ov8856->dev, "failed to find sensor: %d", ret);
2392 goto probe_power_off;
2393 }
2394 }
2395
2396 mutex_init(&ov8856->mutex);
2397 ov8856->cur_mode = &ov8856->priv_lane->supported_modes[0];
2398 ov8856->cur_mbus_index = ov8856->cur_mode->default_mbus_index;
2399 ret = ov8856_init_controls(ov8856);
2400 if (ret) {
2401 dev_err(ov8856->dev, "failed to init controls: %d", ret);
2402 goto probe_error_v4l2_ctrl_handler_free;
2403 }
2404
2405 ov8856->sd.internal_ops = &ov8856_internal_ops;
2406 ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2407 ov8856->sd.entity.ops = &ov8856_subdev_entity_ops;
2408 ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2409 ov8856->pad.flags = MEDIA_PAD_FL_SOURCE;
2410 ret = media_entity_pads_init(entity: &ov8856->sd.entity, num_pads: 1, pads: &ov8856->pad);
2411 if (ret) {
2412 dev_err(ov8856->dev, "failed to init entity pads: %d", ret);
2413 goto probe_error_v4l2_ctrl_handler_free;
2414 }
2415
2416 ret = v4l2_async_register_subdev_sensor(sd: &ov8856->sd);
2417 if (ret < 0) {
2418 dev_err(ov8856->dev, "failed to register V4L2 subdev: %d",
2419 ret);
2420 goto probe_error_media_entity_cleanup;
2421 }
2422
2423 /* Set the device's state to active if it's in D0 state. */
2424 if (full_power)
2425 pm_runtime_set_active(dev: ov8856->dev);
2426 pm_runtime_enable(dev: ov8856->dev);
2427 pm_runtime_idle(dev: ov8856->dev);
2428
2429 return 0;
2430
2431probe_error_media_entity_cleanup:
2432 media_entity_cleanup(entity: &ov8856->sd.entity);
2433
2434probe_error_v4l2_ctrl_handler_free:
2435 v4l2_ctrl_handler_free(hdl: ov8856->sd.ctrl_handler);
2436 mutex_destroy(lock: &ov8856->mutex);
2437
2438probe_power_off:
2439 ov8856_power_off(dev: ov8856->dev);
2440
2441 return ret;
2442}
2443
2444static const struct dev_pm_ops ov8856_pm_ops = {
2445 SET_RUNTIME_PM_OPS(ov8856_power_off, ov8856_power_on, NULL)
2446};
2447
2448#ifdef CONFIG_ACPI
2449static const struct acpi_device_id ov8856_acpi_ids[] = {
2450 {"OVTI8856"},
2451 {}
2452};
2453
2454MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids);
2455#endif
2456
2457static const struct of_device_id ov8856_of_match[] = {
2458 { .compatible = "ovti,ov8856" },
2459 { /* sentinel */ }
2460};
2461MODULE_DEVICE_TABLE(of, ov8856_of_match);
2462
2463static struct i2c_driver ov8856_i2c_driver = {
2464 .driver = {
2465 .name = "ov8856",
2466 .pm = &ov8856_pm_ops,
2467 .acpi_match_table = ACPI_PTR(ov8856_acpi_ids),
2468 .of_match_table = ov8856_of_match,
2469 },
2470 .probe = ov8856_probe,
2471 .remove = ov8856_remove,
2472 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
2473};
2474
2475module_i2c_driver(ov8856_i2c_driver);
2476
2477MODULE_AUTHOR("Ben Kao <ben.kao@intel.com>");
2478MODULE_DESCRIPTION("OmniVision OV8856 sensor driver");
2479MODULE_LICENSE("GPL v2");
2480

source code of linux/drivers/media/i2c/ov8856.c