1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * cobalt driver initialization and card probing |
4 | * |
5 | * Derived from cx18-driver.c |
6 | * |
7 | * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates. |
8 | * All rights reserved. |
9 | */ |
10 | |
11 | #include <linux/bitfield.h> |
12 | #include <linux/delay.h> |
13 | #include <media/i2c/adv7604.h> |
14 | #include <media/i2c/adv7842.h> |
15 | #include <media/i2c/adv7511.h> |
16 | #include <media/v4l2-event.h> |
17 | #include <media/v4l2-ctrls.h> |
18 | |
19 | #include "cobalt-driver.h" |
20 | #include "cobalt-irq.h" |
21 | #include "cobalt-i2c.h" |
22 | #include "cobalt-v4l2.h" |
23 | #include "cobalt-flash.h" |
24 | #include "cobalt-alsa.h" |
25 | #include "cobalt-omnitek.h" |
26 | |
27 | /* add your revision and whatnot here */ |
28 | static const struct pci_device_id cobalt_pci_tbl[] = { |
29 | {PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_COBALT, |
30 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
31 | {0,} |
32 | }; |
33 | |
34 | MODULE_DEVICE_TABLE(pci, cobalt_pci_tbl); |
35 | |
36 | static atomic_t cobalt_instance = ATOMIC_INIT(0); |
37 | |
38 | int cobalt_debug; |
39 | module_param_named(debug, cobalt_debug, int, 0644); |
40 | MODULE_PARM_DESC(debug, "Debug level. Default: 0\n" ); |
41 | |
42 | int cobalt_ignore_err; |
43 | module_param_named(ignore_err, cobalt_ignore_err, int, 0644); |
44 | MODULE_PARM_DESC(ignore_err, |
45 | "If set then ignore missing i2c adapters/receivers. Default: 0\n" ); |
46 | |
47 | MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com> & Morten Hestnes" ); |
48 | MODULE_DESCRIPTION("cobalt driver" ); |
49 | MODULE_LICENSE("GPL" ); |
50 | |
51 | static u8 edid[256] = { |
52 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, |
53 | 0x50, 0x21, 0x32, 0x27, 0x00, 0x00, 0x00, 0x00, |
54 | 0x22, 0x1a, 0x01, 0x03, 0x80, 0x30, 0x1b, 0x78, |
55 | 0x0f, 0xee, 0x91, 0xa3, 0x54, 0x4c, 0x99, 0x26, |
56 | 0x0f, 0x50, 0x54, 0x2f, 0xcf, 0x00, 0x31, 0x59, |
57 | 0x45, 0x59, 0x61, 0x59, 0x81, 0x99, 0x01, 0x01, |
58 | 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a, |
59 | 0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c, |
60 | 0x45, 0x00, 0xe0, 0x0e, 0x11, 0x00, 0x00, 0x1e, |
61 | 0x00, 0x00, 0x00, 0xfd, 0x00, 0x18, 0x55, 0x18, |
62 | 0x5e, 0x11, 0x00, 0x0a, 0x20, 0x20, 0x20, 0x20, |
63 | 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x63, |
64 | 0x6f, 0x62, 0x61, 0x6c, 0x74, 0x0a, 0x20, 0x20, |
65 | 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0x10, |
66 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
67 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x9d, |
68 | |
69 | 0x02, 0x03, 0x1f, 0xf1, 0x4a, 0x10, 0x1f, 0x04, |
70 | 0x13, 0x22, 0x21, 0x20, 0x02, 0x11, 0x01, 0x23, |
71 | 0x09, 0x07, 0x07, 0x68, 0x03, 0x0c, 0x00, 0x10, |
72 | 0x00, 0x00, 0x22, 0x0f, 0xe2, 0x00, 0xca, 0x00, |
73 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
74 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
75 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
76 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
77 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
78 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
79 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
80 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
81 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
82 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
83 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
84 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, |
85 | }; |
86 | |
87 | static void cobalt_set_interrupt(struct cobalt *cobalt, bool enable) |
88 | { |
89 | if (enable) { |
90 | unsigned irqs = COBALT_SYSSTAT_VI0_INT1_MSK | |
91 | COBALT_SYSSTAT_VI1_INT1_MSK | |
92 | COBALT_SYSSTAT_VI2_INT1_MSK | |
93 | COBALT_SYSSTAT_VI3_INT1_MSK | |
94 | COBALT_SYSSTAT_VI0_INT2_MSK | |
95 | COBALT_SYSSTAT_VI1_INT2_MSK | |
96 | COBALT_SYSSTAT_VI2_INT2_MSK | |
97 | COBALT_SYSSTAT_VI3_INT2_MSK | |
98 | COBALT_SYSSTAT_VI0_LOST_DATA_MSK | |
99 | COBALT_SYSSTAT_VI1_LOST_DATA_MSK | |
100 | COBALT_SYSSTAT_VI2_LOST_DATA_MSK | |
101 | COBALT_SYSSTAT_VI3_LOST_DATA_MSK | |
102 | COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK; |
103 | |
104 | if (cobalt->have_hsma_rx) |
105 | irqs |= COBALT_SYSSTAT_VIHSMA_INT1_MSK | |
106 | COBALT_SYSSTAT_VIHSMA_INT2_MSK | |
107 | COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK; |
108 | |
109 | if (cobalt->have_hsma_tx) |
110 | irqs |= COBALT_SYSSTAT_VOHSMA_INT1_MSK | |
111 | COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK | |
112 | COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK; |
113 | /* Clear any existing interrupts */ |
114 | cobalt_write_bar1(cobalt, COBALT_SYS_STAT_EDGE, val: 0xffffffff); |
115 | /* PIO Core interrupt mask register. |
116 | Enable ADV7604 INT1 interrupts */ |
117 | cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, val: irqs); |
118 | } else { |
119 | /* Disable all ADV7604 interrupts */ |
120 | cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, val: 0); |
121 | } |
122 | } |
123 | |
124 | static unsigned cobalt_get_sd_nr(struct v4l2_subdev *sd) |
125 | { |
126 | struct cobalt *cobalt = to_cobalt(v4l2_dev: sd->v4l2_dev); |
127 | unsigned i; |
128 | |
129 | for (i = 0; i < COBALT_NUM_NODES; i++) |
130 | if (sd == cobalt->streams[i].sd) |
131 | return i; |
132 | cobalt_err("Invalid adv7604 subdev pointer!\n" ); |
133 | return 0; |
134 | } |
135 | |
136 | static void cobalt_notify(struct v4l2_subdev *sd, |
137 | unsigned int notification, void *arg) |
138 | { |
139 | struct cobalt *cobalt = to_cobalt(v4l2_dev: sd->v4l2_dev); |
140 | unsigned sd_nr = cobalt_get_sd_nr(sd); |
141 | struct cobalt_stream *s = &cobalt->streams[sd_nr]; |
142 | bool hotplug = arg ? *((int *)arg) : false; |
143 | |
144 | if (s->is_output) |
145 | return; |
146 | |
147 | switch (notification) { |
148 | case ADV76XX_HOTPLUG: |
149 | cobalt_s_bit_sysctrl(cobalt, |
150 | COBALT_SYS_CTRL_HPD_TO_CONNECTOR_BIT(sd_nr), val: hotplug); |
151 | cobalt_dbg(1, "Set hotplug for adv %d to %d\n" , sd_nr, hotplug); |
152 | break; |
153 | case V4L2_DEVICE_NOTIFY_EVENT: |
154 | cobalt_dbg(1, "Format changed for adv %d\n" , sd_nr); |
155 | v4l2_event_queue(vdev: &s->vdev, ev: arg); |
156 | break; |
157 | default: |
158 | break; |
159 | } |
160 | } |
161 | |
162 | static int get_payload_size(u16 code) |
163 | { |
164 | switch (code) { |
165 | case 0: return 128; |
166 | case 1: return 256; |
167 | case 2: return 512; |
168 | case 3: return 1024; |
169 | case 4: return 2048; |
170 | case 5: return 4096; |
171 | default: return 0; |
172 | } |
173 | return 0; |
174 | } |
175 | |
176 | static const char *get_link_speed(u16 stat) |
177 | { |
178 | switch (stat & PCI_EXP_LNKSTA_CLS) { |
179 | case 1: return "2.5 Gbit/s" ; |
180 | case 2: return "5 Gbit/s" ; |
181 | case 3: return "10 Gbit/s" ; |
182 | } |
183 | return "Unknown speed" ; |
184 | } |
185 | |
186 | void cobalt_pcie_status_show(struct cobalt *cobalt) |
187 | { |
188 | struct pci_dev *pci_dev = cobalt->pci_dev; |
189 | struct pci_dev *pci_bus_dev = cobalt->pci_dev->bus->self; |
190 | u32 capa; |
191 | u16 stat, ctrl; |
192 | |
193 | if (!pci_is_pcie(dev: pci_dev) || !pci_is_pcie(dev: pci_bus_dev)) |
194 | return; |
195 | |
196 | /* Device */ |
197 | pcie_capability_read_dword(dev: pci_dev, PCI_EXP_DEVCAP, val: &capa); |
198 | pcie_capability_read_word(dev: pci_dev, PCI_EXP_DEVCTL, val: &ctrl); |
199 | pcie_capability_read_word(dev: pci_dev, PCI_EXP_DEVSTA, val: &stat); |
200 | cobalt_info("PCIe device capability 0x%08x: Max payload %d\n" , |
201 | capa, get_payload_size(capa & PCI_EXP_DEVCAP_PAYLOAD)); |
202 | cobalt_info("PCIe device control 0x%04x: Max payload %d. Max read request %d\n" , |
203 | ctrl, |
204 | get_payload_size((ctrl & PCI_EXP_DEVCTL_PAYLOAD) >> 5), |
205 | get_payload_size((ctrl & PCI_EXP_DEVCTL_READRQ) >> 12)); |
206 | cobalt_info("PCIe device status 0x%04x\n" , stat); |
207 | |
208 | /* Link */ |
209 | pcie_capability_read_dword(dev: pci_dev, PCI_EXP_LNKCAP, val: &capa); |
210 | pcie_capability_read_word(dev: pci_dev, PCI_EXP_LNKCTL, val: &ctrl); |
211 | pcie_capability_read_word(dev: pci_dev, PCI_EXP_LNKSTA, val: &stat); |
212 | cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n" , |
213 | capa, get_link_speed(capa), |
214 | FIELD_GET(PCI_EXP_LNKCAP_MLW, capa)); |
215 | cobalt_info("PCIe link control 0x%04x\n" , ctrl); |
216 | cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n" , |
217 | stat, get_link_speed(stat), |
218 | FIELD_GET(PCI_EXP_LNKSTA_NLW, stat)); |
219 | |
220 | /* Bus */ |
221 | pcie_capability_read_dword(dev: pci_bus_dev, PCI_EXP_LNKCAP, val: &capa); |
222 | cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n" , |
223 | capa, get_link_speed(capa), |
224 | FIELD_GET(PCI_EXP_LNKCAP_MLW, capa)); |
225 | |
226 | /* Slot */ |
227 | pcie_capability_read_dword(dev: pci_dev, PCI_EXP_SLTCAP, val: &capa); |
228 | pcie_capability_read_word(dev: pci_dev, PCI_EXP_SLTCTL, val: &ctrl); |
229 | pcie_capability_read_word(dev: pci_dev, PCI_EXP_SLTSTA, val: &stat); |
230 | cobalt_info("PCIe slot capability 0x%08x\n" , capa); |
231 | cobalt_info("PCIe slot control 0x%04x\n" , ctrl); |
232 | cobalt_info("PCIe slot status 0x%04x\n" , stat); |
233 | } |
234 | |
235 | static unsigned pcie_link_get_lanes(struct cobalt *cobalt) |
236 | { |
237 | struct pci_dev *pci_dev = cobalt->pci_dev; |
238 | u16 link; |
239 | |
240 | if (!pci_is_pcie(dev: pci_dev)) |
241 | return 0; |
242 | pcie_capability_read_word(dev: pci_dev, PCI_EXP_LNKSTA, val: &link); |
243 | return FIELD_GET(PCI_EXP_LNKSTA_NLW, link); |
244 | } |
245 | |
246 | static unsigned pcie_bus_link_get_lanes(struct cobalt *cobalt) |
247 | { |
248 | struct pci_dev *pci_dev = cobalt->pci_dev->bus->self; |
249 | u32 link; |
250 | |
251 | if (!pci_is_pcie(dev: pci_dev)) |
252 | return 0; |
253 | pcie_capability_read_dword(dev: pci_dev, PCI_EXP_LNKCAP, val: &link); |
254 | return FIELD_GET(PCI_EXP_LNKCAP_MLW, link); |
255 | } |
256 | |
257 | static void msi_config_show(struct cobalt *cobalt, struct pci_dev *pci_dev) |
258 | { |
259 | u16 ctrl, data; |
260 | u32 adrs_l, adrs_h; |
261 | |
262 | pci_read_config_word(dev: pci_dev, where: 0x52, val: &ctrl); |
263 | cobalt_info("MSI %s\n" , ctrl & 1 ? "enable" : "disable" ); |
264 | cobalt_info("MSI multiple message: Capable %u. Enable %u\n" , |
265 | (1 << ((ctrl >> 1) & 7)), (1 << ((ctrl >> 4) & 7))); |
266 | if (ctrl & 0x80) |
267 | cobalt_info("MSI: 64-bit address capable\n" ); |
268 | pci_read_config_dword(dev: pci_dev, where: 0x54, val: &adrs_l); |
269 | pci_read_config_dword(dev: pci_dev, where: 0x58, val: &adrs_h); |
270 | pci_read_config_word(dev: pci_dev, where: 0x5c, val: &data); |
271 | if (ctrl & 0x80) |
272 | cobalt_info("MSI: Address 0x%08x%08x. Data 0x%04x\n" , |
273 | adrs_h, adrs_l, data); |
274 | else |
275 | cobalt_info("MSI: Address 0x%08x. Data 0x%04x\n" , |
276 | adrs_l, data); |
277 | } |
278 | |
279 | static void cobalt_pci_iounmap(struct cobalt *cobalt, struct pci_dev *pci_dev) |
280 | { |
281 | if (cobalt->bar0) { |
282 | pci_iounmap(dev: pci_dev, cobalt->bar0); |
283 | cobalt->bar0 = NULL; |
284 | } |
285 | if (cobalt->bar1) { |
286 | pci_iounmap(dev: pci_dev, cobalt->bar1); |
287 | cobalt->bar1 = NULL; |
288 | } |
289 | } |
290 | |
291 | static void cobalt_free_msi(struct cobalt *cobalt, struct pci_dev *pci_dev) |
292 | { |
293 | free_irq(pci_dev->irq, (void *)cobalt); |
294 | pci_free_irq_vectors(dev: pci_dev); |
295 | } |
296 | |
297 | static int cobalt_setup_pci(struct cobalt *cobalt, struct pci_dev *pci_dev, |
298 | const struct pci_device_id *pci_id) |
299 | { |
300 | u32 ctrl; |
301 | int ret; |
302 | |
303 | cobalt_dbg(1, "enabling pci device\n" ); |
304 | |
305 | ret = pci_enable_device(dev: pci_dev); |
306 | if (ret) { |
307 | cobalt_err("can't enable device\n" ); |
308 | return ret; |
309 | } |
310 | pci_set_master(dev: pci_dev); |
311 | pci_read_config_byte(dev: pci_dev, PCI_CLASS_REVISION, val: &cobalt->card_rev); |
312 | pci_read_config_word(dev: pci_dev, PCI_DEVICE_ID, val: &cobalt->device_id); |
313 | |
314 | switch (cobalt->device_id) { |
315 | case PCI_DEVICE_ID_COBALT: |
316 | cobalt_info("PCI Express interface from Omnitek\n" ); |
317 | break; |
318 | default: |
319 | cobalt_info("PCI Express interface provider is unknown!\n" ); |
320 | break; |
321 | } |
322 | |
323 | if (pcie_link_get_lanes(cobalt) != 8) { |
324 | cobalt_warn("PCI Express link width is %d lanes.\n" , |
325 | pcie_link_get_lanes(cobalt)); |
326 | if (pcie_bus_link_get_lanes(cobalt) < 8) |
327 | cobalt_warn("The current slot only supports %d lanes, for best performance 8 are needed\n" , |
328 | pcie_bus_link_get_lanes(cobalt)); |
329 | if (pcie_link_get_lanes(cobalt) != pcie_bus_link_get_lanes(cobalt)) { |
330 | cobalt_err("The card is most likely not seated correctly in the PCIe slot\n" ); |
331 | ret = -EIO; |
332 | goto err_disable; |
333 | } |
334 | } |
335 | |
336 | if (dma_set_mask(dev: &pci_dev->dev, DMA_BIT_MASK(64))) { |
337 | ret = dma_set_mask(dev: &pci_dev->dev, DMA_BIT_MASK(32)); |
338 | if (ret) { |
339 | cobalt_err("no suitable DMA available\n" ); |
340 | goto err_disable; |
341 | } |
342 | } |
343 | |
344 | ret = pci_request_regions(pci_dev, "cobalt" ); |
345 | if (ret) { |
346 | cobalt_err("error requesting regions\n" ); |
347 | goto err_disable; |
348 | } |
349 | |
350 | cobalt_pcie_status_show(cobalt); |
351 | |
352 | cobalt->bar0 = pci_iomap(dev: pci_dev, bar: 0, max: 0); |
353 | cobalt->bar1 = pci_iomap(dev: pci_dev, bar: 1, max: 0); |
354 | if (cobalt->bar1 == NULL) { |
355 | cobalt->bar1 = pci_iomap(dev: pci_dev, bar: 2, max: 0); |
356 | cobalt_info("64-bit BAR\n" ); |
357 | } |
358 | if (!cobalt->bar0 || !cobalt->bar1) { |
359 | ret = -EIO; |
360 | goto err_release; |
361 | } |
362 | |
363 | /* Reset the video inputs before enabling any interrupts */ |
364 | ctrl = cobalt_read_bar1(cobalt, COBALT_SYS_CTRL_BASE); |
365 | cobalt_write_bar1(cobalt, COBALT_SYS_CTRL_BASE, val: ctrl & ~0xf00); |
366 | |
367 | /* Disable interrupts to prevent any spurious interrupts |
368 | from being generated. */ |
369 | cobalt_set_interrupt(cobalt, enable: false); |
370 | |
371 | if (pci_alloc_irq_vectors(dev: pci_dev, min_vecs: 1, max_vecs: 1, PCI_IRQ_MSI) < 1) { |
372 | cobalt_err("Could not enable MSI\n" ); |
373 | ret = -EIO; |
374 | goto err_release; |
375 | } |
376 | msi_config_show(cobalt, pci_dev); |
377 | |
378 | /* Register IRQ */ |
379 | if (request_irq(irq: pci_dev->irq, handler: cobalt_irq_handler, IRQF_SHARED, |
380 | name: cobalt->v4l2_dev.name, dev: (void *)cobalt)) { |
381 | cobalt_err("Failed to register irq %d\n" , pci_dev->irq); |
382 | ret = -EIO; |
383 | goto err_msi; |
384 | } |
385 | |
386 | omni_sg_dma_init(cobalt); |
387 | return 0; |
388 | |
389 | err_msi: |
390 | pci_disable_msi(dev: pci_dev); |
391 | |
392 | err_release: |
393 | cobalt_pci_iounmap(cobalt, pci_dev); |
394 | pci_release_regions(pci_dev); |
395 | |
396 | err_disable: |
397 | pci_disable_device(dev: cobalt->pci_dev); |
398 | return ret; |
399 | } |
400 | |
401 | static int cobalt_hdl_info_get(struct cobalt *cobalt) |
402 | { |
403 | int i; |
404 | |
405 | for (i = 0; i < COBALT_HDL_INFO_SIZE; i++) |
406 | cobalt->hdl_info[i] = |
407 | ioread8(cobalt->bar1 + COBALT_HDL_INFO_BASE + i); |
408 | cobalt->hdl_info[COBALT_HDL_INFO_SIZE - 1] = '\0'; |
409 | if (strstr(cobalt->hdl_info, COBALT_HDL_SEARCH_STR)) |
410 | return 0; |
411 | |
412 | return 1; |
413 | } |
414 | |
415 | static void cobalt_stream_struct_init(struct cobalt *cobalt) |
416 | { |
417 | int i; |
418 | |
419 | for (i = 0; i < COBALT_NUM_STREAMS; i++) { |
420 | struct cobalt_stream *s = &cobalt->streams[i]; |
421 | |
422 | s->cobalt = cobalt; |
423 | s->flags = 0; |
424 | s->is_audio = false; |
425 | s->is_output = false; |
426 | s->is_dummy = true; |
427 | |
428 | /* The Memory DMA channels will always get a lower channel |
429 | * number than the FIFO DMA. Video input should map to the |
430 | * stream 0-3. The other can use stream struct from 4 and |
431 | * higher */ |
432 | if (i <= COBALT_HSMA_IN_NODE) { |
433 | s->dma_channel = i + cobalt->first_fifo_channel; |
434 | s->video_channel = i; |
435 | s->dma_fifo_mask = |
436 | COBALT_SYSSTAT_VI0_LOST_DATA_MSK << (4 * i); |
437 | s->adv_irq_mask = |
438 | COBALT_SYSSTAT_VI0_INT1_MSK << (4 * i); |
439 | } else if (i >= COBALT_AUDIO_IN_STREAM && |
440 | i <= COBALT_AUDIO_IN_STREAM + 4) { |
441 | unsigned idx = i - COBALT_AUDIO_IN_STREAM; |
442 | |
443 | s->dma_channel = 6 + idx; |
444 | s->is_audio = true; |
445 | s->video_channel = idx; |
446 | s->dma_fifo_mask = COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK; |
447 | } else if (i == COBALT_HSMA_OUT_NODE) { |
448 | s->dma_channel = 11; |
449 | s->is_output = true; |
450 | s->video_channel = 5; |
451 | s->dma_fifo_mask = COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK; |
452 | s->adv_irq_mask = COBALT_SYSSTAT_VOHSMA_INT1_MSK; |
453 | } else if (i == COBALT_AUDIO_OUT_STREAM) { |
454 | s->dma_channel = 12; |
455 | s->is_audio = true; |
456 | s->is_output = true; |
457 | s->video_channel = 5; |
458 | s->dma_fifo_mask = COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK; |
459 | } else { |
460 | /* FIXME: Memory DMA for debug purpose */ |
461 | s->dma_channel = i - COBALT_NUM_NODES; |
462 | } |
463 | cobalt_info("stream #%d -> dma channel #%d <- video channel %d\n" , |
464 | i, s->dma_channel, s->video_channel); |
465 | } |
466 | } |
467 | |
468 | static int cobalt_subdevs_init(struct cobalt *cobalt) |
469 | { |
470 | static struct adv76xx_platform_data adv7604_pdata = { |
471 | .disable_pwrdnb = 1, |
472 | .ain_sel = ADV7604_AIN7_8_9_NC_SYNC_3_1, |
473 | .bus_order = ADV7604_BUS_ORDER_BRG, |
474 | .blank_data = 1, |
475 | .op_format_mode_sel = ADV7604_OP_FORMAT_MODE0, |
476 | .int1_config = ADV76XX_INT1_CONFIG_ACTIVE_HIGH, |
477 | .dr_str_data = ADV76XX_DR_STR_HIGH, |
478 | .dr_str_clk = ADV76XX_DR_STR_HIGH, |
479 | .dr_str_sync = ADV76XX_DR_STR_HIGH, |
480 | .hdmi_free_run_mode = 1, |
481 | .inv_vs_pol = 1, |
482 | .inv_hs_pol = 1, |
483 | }; |
484 | static struct i2c_board_info adv7604_info = { |
485 | .type = "adv7604" , |
486 | .addr = 0x20, |
487 | .platform_data = &adv7604_pdata, |
488 | }; |
489 | |
490 | struct cobalt_stream *s = cobalt->streams; |
491 | int i; |
492 | |
493 | for (i = 0; i < COBALT_NUM_INPUTS; i++) { |
494 | struct v4l2_subdev_format sd_fmt = { |
495 | .pad = ADV7604_PAD_SOURCE, |
496 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
497 | .format.code = MEDIA_BUS_FMT_YUYV8_1X16, |
498 | }; |
499 | struct v4l2_subdev_edid cobalt_edid = { |
500 | .pad = ADV76XX_PAD_HDMI_PORT_A, |
501 | .start_block = 0, |
502 | .blocks = 2, |
503 | .edid = edid, |
504 | }; |
505 | int err; |
506 | |
507 | s[i].pad_source = ADV7604_PAD_SOURCE; |
508 | s[i].i2c_adap = &cobalt->i2c_adap[i]; |
509 | if (s[i].i2c_adap->dev.parent == NULL) |
510 | continue; |
511 | cobalt_s_bit_sysctrl(cobalt, |
512 | COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(i), val: 1); |
513 | s[i].sd = v4l2_i2c_new_subdev_board(v4l2_dev: &cobalt->v4l2_dev, |
514 | adapter: s[i].i2c_adap, info: &adv7604_info, NULL); |
515 | if (!s[i].sd) { |
516 | if (cobalt_ignore_err) |
517 | continue; |
518 | return -ENODEV; |
519 | } |
520 | err = v4l2_subdev_call(s[i].sd, video, s_routing, |
521 | ADV76XX_PAD_HDMI_PORT_A, 0, 0); |
522 | if (err) |
523 | return err; |
524 | err = v4l2_subdev_call(s[i].sd, pad, set_edid, |
525 | &cobalt_edid); |
526 | if (err) |
527 | return err; |
528 | err = v4l2_subdev_call(s[i].sd, pad, set_fmt, NULL, |
529 | &sd_fmt); |
530 | if (err) |
531 | return err; |
532 | /* Reset channel video module */ |
533 | cobalt_s_bit_sysctrl(cobalt, |
534 | COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), val: 0); |
535 | mdelay(2); |
536 | cobalt_s_bit_sysctrl(cobalt, |
537 | COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), val: 1); |
538 | mdelay(1); |
539 | s[i].is_dummy = false; |
540 | cobalt->streams[i + COBALT_AUDIO_IN_STREAM].is_dummy = false; |
541 | } |
542 | return 0; |
543 | } |
544 | |
545 | static int cobalt_subdevs_hsma_init(struct cobalt *cobalt) |
546 | { |
547 | static struct adv7842_platform_data adv7842_pdata = { |
548 | .disable_pwrdnb = 1, |
549 | .ain_sel = ADV7842_AIN1_2_3_NC_SYNC_1_2, |
550 | .bus_order = ADV7842_BUS_ORDER_RBG, |
551 | .op_format_mode_sel = ADV7842_OP_FORMAT_MODE0, |
552 | .blank_data = 1, |
553 | .dr_str_data = 3, |
554 | .dr_str_clk = 3, |
555 | .dr_str_sync = 3, |
556 | .mode = ADV7842_MODE_HDMI, |
557 | .hdmi_free_run_enable = 1, |
558 | .vid_std_select = ADV7842_HDMI_COMP_VID_STD_HD_1250P, |
559 | .i2c_sdp_io = 0x4a, |
560 | .i2c_sdp = 0x48, |
561 | .i2c_cp = 0x22, |
562 | .i2c_vdp = 0x24, |
563 | .i2c_afe = 0x26, |
564 | .i2c_hdmi = 0x34, |
565 | .i2c_repeater = 0x32, |
566 | .i2c_edid = 0x36, |
567 | .i2c_infoframe = 0x3e, |
568 | .i2c_cec = 0x40, |
569 | .i2c_avlink = 0x42, |
570 | }; |
571 | static struct i2c_board_info adv7842_info = { |
572 | .type = "adv7842" , |
573 | .addr = 0x20, |
574 | .platform_data = &adv7842_pdata, |
575 | }; |
576 | struct v4l2_subdev_format sd_fmt = { |
577 | .pad = ADV7842_PAD_SOURCE, |
578 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
579 | .format.code = MEDIA_BUS_FMT_YUYV8_1X16, |
580 | }; |
581 | static struct adv7511_platform_data adv7511_pdata = { |
582 | .i2c_edid = 0x7e >> 1, |
583 | .i2c_cec = 0x7c >> 1, |
584 | .i2c_pktmem = 0x70 >> 1, |
585 | .cec_clk = 12000000, |
586 | }; |
587 | static struct i2c_board_info adv7511_info = { |
588 | .type = "adv7511-v4l2" , |
589 | .addr = 0x39, /* 0x39 or 0x3d */ |
590 | .platform_data = &adv7511_pdata, |
591 | }; |
592 | struct v4l2_subdev_edid cobalt_edid = { |
593 | .pad = ADV7842_EDID_PORT_A, |
594 | .start_block = 0, |
595 | .blocks = 2, |
596 | .edid = edid, |
597 | }; |
598 | struct cobalt_stream *s = &cobalt->streams[COBALT_HSMA_IN_NODE]; |
599 | |
600 | s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1]; |
601 | if (s->i2c_adap->dev.parent == NULL) |
602 | return 0; |
603 | cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), val: 1); |
604 | |
605 | s->sd = v4l2_i2c_new_subdev_board(v4l2_dev: &cobalt->v4l2_dev, |
606 | adapter: s->i2c_adap, info: &adv7842_info, NULL); |
607 | if (s->sd) { |
608 | int err = v4l2_subdev_call(s->sd, pad, set_edid, &cobalt_edid); |
609 | |
610 | if (err) |
611 | return err; |
612 | err = v4l2_subdev_call(s->sd, pad, set_fmt, NULL, |
613 | &sd_fmt); |
614 | if (err) |
615 | return err; |
616 | cobalt->have_hsma_rx = true; |
617 | s->pad_source = ADV7842_PAD_SOURCE; |
618 | s->is_dummy = false; |
619 | cobalt->streams[4 + COBALT_AUDIO_IN_STREAM].is_dummy = false; |
620 | /* Reset channel video module */ |
621 | cobalt_s_bit_sysctrl(cobalt, |
622 | COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), val: 0); |
623 | mdelay(2); |
624 | cobalt_s_bit_sysctrl(cobalt, |
625 | COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), val: 1); |
626 | mdelay(1); |
627 | return err; |
628 | } |
629 | cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), val: 0); |
630 | cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_PWRDN0_TO_HSMA_TX_BIT, val: 0); |
631 | s++; |
632 | s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1]; |
633 | s->sd = v4l2_i2c_new_subdev_board(v4l2_dev: &cobalt->v4l2_dev, |
634 | adapter: s->i2c_adap, info: &adv7511_info, NULL); |
635 | if (s->sd) { |
636 | /* A transmitter is hooked up, so we can set this bit */ |
637 | cobalt_s_bit_sysctrl(cobalt, |
638 | COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, val: 1); |
639 | cobalt_s_bit_sysctrl(cobalt, |
640 | COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), val: 0); |
641 | cobalt_s_bit_sysctrl(cobalt, |
642 | COBALT_SYS_CTRL_VIDEO_TX_RESETN_BIT, val: 1); |
643 | cobalt->have_hsma_tx = true; |
644 | v4l2_subdev_call(s->sd, core, s_power, 1); |
645 | v4l2_subdev_call(s->sd, video, s_stream, 1); |
646 | v4l2_subdev_call(s->sd, audio, s_stream, 1); |
647 | v4l2_ctrl_s_ctrl(ctrl: v4l2_ctrl_find(hdl: s->sd->ctrl_handler, |
648 | V4L2_CID_DV_TX_MODE), val: V4L2_DV_TX_MODE_HDMI); |
649 | s->is_dummy = false; |
650 | cobalt->streams[COBALT_AUDIO_OUT_STREAM].is_dummy = false; |
651 | return 0; |
652 | } |
653 | return -ENODEV; |
654 | } |
655 | |
656 | static int cobalt_probe(struct pci_dev *pci_dev, |
657 | const struct pci_device_id *pci_id) |
658 | { |
659 | struct cobalt *cobalt; |
660 | int retval = 0; |
661 | int i; |
662 | |
663 | /* FIXME - module parameter arrays constrain max instances */ |
664 | i = atomic_inc_return(v: &cobalt_instance) - 1; |
665 | |
666 | cobalt = kzalloc(size: sizeof(struct cobalt), GFP_KERNEL); |
667 | if (cobalt == NULL) |
668 | return -ENOMEM; |
669 | cobalt->pci_dev = pci_dev; |
670 | cobalt->instance = i; |
671 | mutex_init(&cobalt->pci_lock); |
672 | |
673 | retval = v4l2_device_register(dev: &pci_dev->dev, v4l2_dev: &cobalt->v4l2_dev); |
674 | if (retval) { |
675 | pr_err("cobalt: v4l2_device_register of card %d failed\n" , |
676 | cobalt->instance); |
677 | kfree(objp: cobalt); |
678 | return retval; |
679 | } |
680 | snprintf(buf: cobalt->v4l2_dev.name, size: sizeof(cobalt->v4l2_dev.name), |
681 | fmt: "cobalt-%d" , cobalt->instance); |
682 | cobalt->v4l2_dev.notify = cobalt_notify; |
683 | cobalt_info("Initializing card %d\n" , cobalt->instance); |
684 | |
685 | cobalt->irq_work_queues = |
686 | create_singlethread_workqueue(cobalt->v4l2_dev.name); |
687 | if (cobalt->irq_work_queues == NULL) { |
688 | cobalt_err("Could not create workqueue\n" ); |
689 | retval = -ENOMEM; |
690 | goto err; |
691 | } |
692 | |
693 | INIT_WORK(&cobalt->irq_work_queue, cobalt_irq_work_handler); |
694 | |
695 | /* PCI Device Setup */ |
696 | retval = cobalt_setup_pci(cobalt, pci_dev, pci_id); |
697 | if (retval != 0) |
698 | goto err_wq; |
699 | |
700 | /* Show HDL version info */ |
701 | if (cobalt_hdl_info_get(cobalt)) |
702 | cobalt_info("Not able to read the HDL info\n" ); |
703 | else |
704 | cobalt_info("%s" , cobalt->hdl_info); |
705 | |
706 | retval = cobalt_i2c_init(cobalt); |
707 | if (retval) |
708 | goto err_pci; |
709 | |
710 | cobalt_stream_struct_init(cobalt); |
711 | |
712 | retval = cobalt_subdevs_init(cobalt); |
713 | if (retval) |
714 | goto err_i2c; |
715 | |
716 | if (!(cobalt_read_bar1(cobalt, COBALT_SYS_STAT_BASE) & |
717 | COBALT_SYSSTAT_HSMA_PRSNTN_MSK)) { |
718 | retval = cobalt_subdevs_hsma_init(cobalt); |
719 | if (retval) |
720 | goto err_i2c; |
721 | } |
722 | |
723 | retval = cobalt_nodes_register(cobalt); |
724 | if (retval) { |
725 | cobalt_err("Error %d registering device nodes\n" , retval); |
726 | goto err_i2c; |
727 | } |
728 | cobalt_set_interrupt(cobalt, enable: true); |
729 | v4l2_device_call_all(&cobalt->v4l2_dev, 0, core, |
730 | interrupt_service_routine, 0, NULL); |
731 | |
732 | cobalt_info("Initialized cobalt card\n" ); |
733 | |
734 | cobalt_flash_probe(cobalt); |
735 | |
736 | return 0; |
737 | |
738 | err_i2c: |
739 | cobalt_i2c_exit(cobalt); |
740 | cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, val: 0); |
741 | err_pci: |
742 | cobalt_free_msi(cobalt, pci_dev); |
743 | cobalt_pci_iounmap(cobalt, pci_dev); |
744 | pci_release_regions(cobalt->pci_dev); |
745 | pci_disable_device(dev: cobalt->pci_dev); |
746 | err_wq: |
747 | destroy_workqueue(wq: cobalt->irq_work_queues); |
748 | err: |
749 | cobalt_err("error %d on initialization\n" , retval); |
750 | |
751 | v4l2_device_unregister(v4l2_dev: &cobalt->v4l2_dev); |
752 | kfree(objp: cobalt); |
753 | return retval; |
754 | } |
755 | |
756 | static void cobalt_remove(struct pci_dev *pci_dev) |
757 | { |
758 | struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev: pci_dev); |
759 | struct cobalt *cobalt = to_cobalt(v4l2_dev); |
760 | int i; |
761 | |
762 | cobalt_flash_remove(cobalt); |
763 | cobalt_set_interrupt(cobalt, enable: false); |
764 | flush_workqueue(cobalt->irq_work_queues); |
765 | cobalt_nodes_unregister(cobalt); |
766 | for (i = 0; i < COBALT_NUM_ADAPTERS; i++) { |
767 | struct v4l2_subdev *sd = cobalt->streams[i].sd; |
768 | struct i2c_client *client; |
769 | |
770 | if (sd == NULL) |
771 | continue; |
772 | client = v4l2_get_subdevdata(sd); |
773 | v4l2_device_unregister_subdev(sd); |
774 | i2c_unregister_device(client); |
775 | } |
776 | cobalt_i2c_exit(cobalt); |
777 | cobalt_free_msi(cobalt, pci_dev); |
778 | cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, val: 0); |
779 | cobalt_pci_iounmap(cobalt, pci_dev); |
780 | pci_release_regions(cobalt->pci_dev); |
781 | pci_disable_device(dev: cobalt->pci_dev); |
782 | destroy_workqueue(wq: cobalt->irq_work_queues); |
783 | |
784 | cobalt_info("removed cobalt card\n" ); |
785 | |
786 | v4l2_device_unregister(v4l2_dev); |
787 | kfree(objp: cobalt); |
788 | } |
789 | |
790 | /* define a pci_driver for card detection */ |
791 | static struct pci_driver cobalt_pci_driver = { |
792 | .name = "cobalt" , |
793 | .id_table = cobalt_pci_tbl, |
794 | .probe = cobalt_probe, |
795 | .remove = cobalt_remove, |
796 | }; |
797 | |
798 | module_pci_driver(cobalt_pci_driver); |
799 | |