| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates. |
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| 4 | * All rights reserved. |
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| 5 | */ |
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| 6 | |
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| 7 | #ifndef M00235_FDMA_PACKER_MEMMAP_PACKAGE_H |
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| 8 | #define M00235_FDMA_PACKER_MEMMAP_PACKAGE_H |
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| 9 | |
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| 10 | /******************************************************************* |
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| 11 | * Register Block |
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| 12 | * M00235_FDMA_PACKER_MEMMAP_PACKAGE_VHD_REGMAP |
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| 13 | *******************************************************************/ |
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| 14 | struct m00235_fdma_packer_regmap { |
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| 15 | uint32_t control; /* Reg 0x0000, Default=0x0 */ |
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| 16 | }; |
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| 17 | |
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| 18 | #define M00235_FDMA_PACKER_REG_CONTROL_OFST 0 |
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| 19 | |
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| 20 | /******************************************************************* |
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| 21 | * Bit Mask for register |
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| 22 | * M00235_FDMA_PACKER_MEMMAP_PACKAGE_VHD_BITMAP |
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| 23 | *******************************************************************/ |
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| 24 | /* control [3:0] */ |
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| 25 | #define M00235_CONTROL_BITMAP_ENABLE_OFST (0) |
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| 26 | #define M00235_CONTROL_BITMAP_ENABLE_MSK (0x1 << M00235_CONTROL_BITMAP_ENABLE_OFST) |
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| 27 | #define M00235_CONTROL_BITMAP_PACK_FORMAT_OFST (1) |
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| 28 | #define M00235_CONTROL_BITMAP_PACK_FORMAT_MSK (0x3 << M00235_CONTROL_BITMAP_PACK_FORMAT_OFST) |
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| 29 | #define M00235_CONTROL_BITMAP_ENDIAN_FORMAT_OFST (3) |
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| 30 | #define M00235_CONTROL_BITMAP_ENDIAN_FORMAT_MSK (0x1 << M00235_CONTROL_BITMAP_ENDIAN_FORMAT_OFST) |
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| 31 | |
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| 32 | #endif /*M00235_FDMA_PACKER_MEMMAP_PACKAGE_H*/ |
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| 33 | |
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