1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates.
4 * All rights reserved.
5 */
6
7#ifndef M00514_SYNCGEN_FLOW_EVCNT_MEMMAP_PACKAGE_H
8#define M00514_SYNCGEN_FLOW_EVCNT_MEMMAP_PACKAGE_H
9
10/*******************************************************************
11 * Register Block
12 * M00514_SYNCGEN_FLOW_EVCNT_MEMMAP_PACKAGE_VHD_REGMAP
13 *******************************************************************/
14struct m00514_syncgen_flow_evcnt_regmap {
15 uint32_t control; /* Reg 0x0000, Default=0x0 */
16 uint32_t sync_generator_h_sync_length; /* Reg 0x0004, Default=0x0 */
17 uint32_t sync_generator_h_backporch_length; /* Reg 0x0008, Default=0x0 */
18 uint32_t sync_generator_h_active_length; /* Reg 0x000c, Default=0x0 */
19 uint32_t sync_generator_h_frontporch_length; /* Reg 0x0010, Default=0x0 */
20 uint32_t sync_generator_v_sync_length; /* Reg 0x0014, Default=0x0 */
21 uint32_t sync_generator_v_backporch_length; /* Reg 0x0018, Default=0x0 */
22 uint32_t sync_generator_v_active_length; /* Reg 0x001c, Default=0x0 */
23 uint32_t sync_generator_v_frontporch_length; /* Reg 0x0020, Default=0x0 */
24 uint32_t error_color; /* Reg 0x0024, Default=0x0 */
25 uint32_t rd_status; /* Reg 0x0028 */
26 uint32_t rd_evcnt_count; /* Reg 0x002c */
27};
28
29#define M00514_SYNCGEN_FLOW_EVCNT_REG_CONTROL_OFST 0
30#define M00514_SYNCGEN_FLOW_EVCNT_REG_SYNC_GENERATOR_H_SYNC_LENGTH_OFST 4
31#define M00514_SYNCGEN_FLOW_EVCNT_REG_SYNC_GENERATOR_H_BACKPORCH_LENGTH_OFST 8
32#define M00514_SYNCGEN_FLOW_EVCNT_REG_SYNC_GENERATOR_H_ACTIVE_LENGTH_OFST 12
33#define M00514_SYNCGEN_FLOW_EVCNT_REG_SYNC_GENERATOR_H_FRONTPORCH_LENGTH_OFST 16
34#define M00514_SYNCGEN_FLOW_EVCNT_REG_SYNC_GENERATOR_V_SYNC_LENGTH_OFST 20
35#define M00514_SYNCGEN_FLOW_EVCNT_REG_SYNC_GENERATOR_V_BACKPORCH_LENGTH_OFST 24
36#define M00514_SYNCGEN_FLOW_EVCNT_REG_SYNC_GENERATOR_V_ACTIVE_LENGTH_OFST 28
37#define M00514_SYNCGEN_FLOW_EVCNT_REG_SYNC_GENERATOR_V_FRONTPORCH_LENGTH_OFST 32
38#define M00514_SYNCGEN_FLOW_EVCNT_REG_ERROR_COLOR_OFST 36
39#define M00514_SYNCGEN_FLOW_EVCNT_REG_RD_STATUS_OFST 40
40#define M00514_SYNCGEN_FLOW_EVCNT_REG_RD_EVCNT_COUNT_OFST 44
41
42/*******************************************************************
43 * Bit Mask for register
44 * M00514_SYNCGEN_FLOW_EVCNT_MEMMAP_PACKAGE_VHD_BITMAP
45 *******************************************************************/
46/* control [7:0] */
47#define M00514_CONTROL_BITMAP_SYNC_GENERATOR_LOAD_PARAM_OFST (0)
48#define M00514_CONTROL_BITMAP_SYNC_GENERATOR_LOAD_PARAM_MSK (0x1 << M00514_CONTROL_BITMAP_SYNC_GENERATOR_LOAD_PARAM_OFST)
49#define M00514_CONTROL_BITMAP_SYNC_GENERATOR_ENABLE_OFST (1)
50#define M00514_CONTROL_BITMAP_SYNC_GENERATOR_ENABLE_MSK (0x1 << M00514_CONTROL_BITMAP_SYNC_GENERATOR_ENABLE_OFST)
51#define M00514_CONTROL_BITMAP_FLOW_CTRL_OUTPUT_ENABLE_OFST (2)
52#define M00514_CONTROL_BITMAP_FLOW_CTRL_OUTPUT_ENABLE_MSK (0x1 << M00514_CONTROL_BITMAP_FLOW_CTRL_OUTPUT_ENABLE_OFST)
53#define M00514_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST (3)
54#define M00514_CONTROL_BITMAP_HSYNC_POLARITY_LOW_MSK (0x1 << M00514_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST)
55#define M00514_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST (4)
56#define M00514_CONTROL_BITMAP_VSYNC_POLARITY_LOW_MSK (0x1 << M00514_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST)
57#define M00514_CONTROL_BITMAP_EVCNT_ENABLE_OFST (5)
58#define M00514_CONTROL_BITMAP_EVCNT_ENABLE_MSK (0x1 << M00514_CONTROL_BITMAP_EVCNT_ENABLE_OFST)
59#define M00514_CONTROL_BITMAP_EVCNT_CLEAR_OFST (6)
60#define M00514_CONTROL_BITMAP_EVCNT_CLEAR_MSK (0x1 << M00514_CONTROL_BITMAP_EVCNT_CLEAR_OFST)
61#define M00514_CONTROL_BITMAP_FORMAT_16_BPP_OFST (7)
62#define M00514_CONTROL_BITMAP_FORMAT_16_BPP_MSK (0x1 << M00514_CONTROL_BITMAP_FORMAT_16_BPP_OFST)
63/* error_color [23:0] */
64#define M00514_ERROR_COLOR_BITMAP_BLUE_OFST (0)
65#define M00514_ERROR_COLOR_BITMAP_BLUE_MSK (0xff << M00514_ERROR_COLOR_BITMAP_BLUE_OFST)
66#define M00514_ERROR_COLOR_BITMAP_GREEN_OFST (8)
67#define M00514_ERROR_COLOR_BITMAP_GREEN_MSK (0xff << M00514_ERROR_COLOR_BITMAP_GREEN_OFST)
68#define M00514_ERROR_COLOR_BITMAP_RED_OFST (16)
69#define M00514_ERROR_COLOR_BITMAP_RED_MSK (0xff << M00514_ERROR_COLOR_BITMAP_RED_OFST)
70/* rd_status [1:0] */
71#define M00514_RD_STATUS_BITMAP_FLOW_CTRL_NO_DATA_ERROR_OFST (0)
72#define M00514_RD_STATUS_BITMAP_FLOW_CTRL_NO_DATA_ERROR_MSK (0x1 << M00514_RD_STATUS_BITMAP_FLOW_CTRL_NO_DATA_ERROR_OFST)
73#define M00514_RD_STATUS_BITMAP_READY_BUFFER_FULL_OFST (1)
74#define M00514_RD_STATUS_BITMAP_READY_BUFFER_FULL_MSK (0x1 << M00514_RD_STATUS_BITMAP_READY_BUFFER_FULL_OFST)
75
76#endif /*M00514_SYNCGEN_FLOW_EVCNT_MEMMAP_PACKAGE_H*/
77

source code of linux/drivers/media/pci/cobalt/m00514_syncgen_flow_evcnt_memmap_package.h