| 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
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| 2 | /* |
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| 3 | * cx18 interrupt handling |
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| 4 | * |
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| 5 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> |
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| 6 | * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> |
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| 7 | */ |
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| 8 | |
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| 9 | #include "cx18-driver.h" |
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| 10 | #include "cx18-io.h" |
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| 11 | #include "cx18-irq.h" |
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| 12 | #include "cx18-mailbox.h" |
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| 13 | #include "cx18-scb.h" |
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| 14 | |
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| 15 | static void xpu_ack(struct cx18 *cx, u32 sw2) |
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| 16 | { |
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| 17 | if (sw2 & IRQ_CPU_TO_EPU_ACK) |
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| 18 | wake_up(&cx->mb_cpu_waitq); |
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| 19 | if (sw2 & IRQ_APU_TO_EPU_ACK) |
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| 20 | wake_up(&cx->mb_apu_waitq); |
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| 21 | } |
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| 22 | |
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| 23 | static void epu_cmd(struct cx18 *cx, u32 sw1) |
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| 24 | { |
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| 25 | if (sw1 & IRQ_CPU_TO_EPU) |
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| 26 | cx18_api_epu_cmd_irq(cx, CPU); |
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| 27 | if (sw1 & IRQ_APU_TO_EPU) |
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| 28 | cx18_api_epu_cmd_irq(cx, APU); |
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| 29 | } |
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| 30 | |
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| 31 | irqreturn_t cx18_irq_handler(int irq, void *dev_id) |
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| 32 | { |
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| 33 | struct cx18 *cx = dev_id; |
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| 34 | u32 sw1, sw2, hw2; |
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| 35 | |
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| 36 | sw1 = cx18_read_reg(cx, SW1_INT_STATUS) & cx->sw1_irq_mask; |
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| 37 | sw2 = cx18_read_reg(cx, SW2_INT_STATUS) & cx->sw2_irq_mask; |
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| 38 | hw2 = cx18_read_reg(cx, HW2_INT_CLR_STATUS) & cx->hw2_irq_mask; |
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| 39 | |
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| 40 | if (sw1) |
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| 41 | cx18_write_reg_expect(cx, val: sw1, SW1_INT_STATUS, eval: ~sw1, mask: sw1); |
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| 42 | if (sw2) |
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| 43 | cx18_write_reg_expect(cx, val: sw2, SW2_INT_STATUS, eval: ~sw2, mask: sw2); |
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| 44 | if (hw2) |
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| 45 | cx18_write_reg_expect(cx, val: hw2, HW2_INT_CLR_STATUS, eval: ~hw2, mask: hw2); |
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| 46 | |
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| 47 | if (sw1 || sw2 || hw2) |
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| 48 | CX18_DEBUG_HI_IRQ("received interrupts SW1: %x SW2: %x HW2: %x\n" , |
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| 49 | sw1, sw2, hw2); |
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| 50 | |
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| 51 | /* |
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| 52 | * SW1 responses have to happen first. The sending XPU times out the |
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| 53 | * incoming mailboxes on us rather rapidly. |
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| 54 | */ |
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| 55 | if (sw1) |
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| 56 | epu_cmd(cx, sw1); |
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| 57 | |
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| 58 | /* To do: interrupt-based I2C handling |
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| 59 | if (hw2 & (HW2_I2C1_INT|HW2_I2C2_INT)) { |
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| 60 | } |
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| 61 | */ |
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| 62 | |
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| 63 | if (sw2) |
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| 64 | xpu_ack(cx, sw2); |
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| 65 | |
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| 66 | return (sw1 || sw2 || hw2) ? IRQ_HANDLED : IRQ_NONE; |
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| 67 | } |
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| 68 | |
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