1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * ddbridge-hw.c: Digital Devices bridge hardware maps |
4 | * |
5 | * Copyright (C) 2010-2017 Digital Devices GmbH |
6 | * Ralph Metzler <rjkm@metzlerbros.de> |
7 | * Marcus Metzler <mocm@metzlerbros.de> |
8 | */ |
9 | |
10 | #include "ddbridge.h" |
11 | #include "ddbridge-hw.h" |
12 | |
13 | /******************************************************************************/ |
14 | |
15 | static const struct ddb_regset octopus_input = { |
16 | .base = 0x200, |
17 | .num = 0x08, |
18 | .size = 0x10, |
19 | }; |
20 | |
21 | static const struct ddb_regset octopus_output = { |
22 | .base = 0x280, |
23 | .num = 0x08, |
24 | .size = 0x10, |
25 | }; |
26 | |
27 | static const struct ddb_regset octopus_idma = { |
28 | .base = 0x300, |
29 | .num = 0x08, |
30 | .size = 0x10, |
31 | }; |
32 | |
33 | static const struct ddb_regset octopus_idma_buf = { |
34 | .base = 0x2000, |
35 | .num = 0x08, |
36 | .size = 0x100, |
37 | }; |
38 | |
39 | static const struct ddb_regset octopus_odma = { |
40 | .base = 0x380, |
41 | .num = 0x04, |
42 | .size = 0x10, |
43 | }; |
44 | |
45 | static const struct ddb_regset octopus_odma_buf = { |
46 | .base = 0x2800, |
47 | .num = 0x04, |
48 | .size = 0x100, |
49 | }; |
50 | |
51 | static const struct ddb_regset octopus_i2c = { |
52 | .base = 0x80, |
53 | .num = 0x04, |
54 | .size = 0x20, |
55 | }; |
56 | |
57 | static const struct ddb_regset octopus_i2c_buf = { |
58 | .base = 0x1000, |
59 | .num = 0x04, |
60 | .size = 0x200, |
61 | }; |
62 | |
63 | /****************************************************************************/ |
64 | |
65 | static const struct ddb_regmap octopus_map = { |
66 | .irq_base_i2c = 0, |
67 | .irq_base_idma = 8, |
68 | .irq_base_odma = 16, |
69 | .i2c = &octopus_i2c, |
70 | .i2c_buf = &octopus_i2c_buf, |
71 | .idma = &octopus_idma, |
72 | .idma_buf = &octopus_idma_buf, |
73 | .odma = &octopus_odma, |
74 | .odma_buf = &octopus_odma_buf, |
75 | .input = &octopus_input, |
76 | .output = &octopus_output, |
77 | }; |
78 | |
79 | /****************************************************************************/ |
80 | |
81 | static const struct ddb_info ddb_none = { |
82 | .type = DDB_NONE, |
83 | .name = "unknown Digital Devices PCIe card, install newer driver" , |
84 | .regmap = &octopus_map, |
85 | }; |
86 | |
87 | static const struct ddb_info ddb_octopus = { |
88 | .type = DDB_OCTOPUS, |
89 | .name = "Digital Devices Octopus DVB adapter" , |
90 | .regmap = &octopus_map, |
91 | .port_num = 4, |
92 | .i2c_mask = 0x0f, |
93 | }; |
94 | |
95 | static const struct ddb_info ddb_octopusv3 = { |
96 | .type = DDB_OCTOPUS, |
97 | .name = "Digital Devices Octopus V3 DVB adapter" , |
98 | .regmap = &octopus_map, |
99 | .port_num = 4, |
100 | .i2c_mask = 0x0f, |
101 | }; |
102 | |
103 | static const struct ddb_info ddb_octopus_le = { |
104 | .type = DDB_OCTOPUS, |
105 | .name = "Digital Devices Octopus LE DVB adapter" , |
106 | .regmap = &octopus_map, |
107 | .port_num = 2, |
108 | .i2c_mask = 0x03, |
109 | }; |
110 | |
111 | static const struct ddb_info ddb_octopus_oem = { |
112 | .type = DDB_OCTOPUS, |
113 | .name = "Digital Devices Octopus OEM" , |
114 | .regmap = &octopus_map, |
115 | .port_num = 4, |
116 | .i2c_mask = 0x0f, |
117 | .led_num = 1, |
118 | .fan_num = 1, |
119 | .temp_num = 1, |
120 | .temp_bus = 0, |
121 | }; |
122 | |
123 | static const struct ddb_info ddb_octopus_mini = { |
124 | .type = DDB_OCTOPUS, |
125 | .name = "Digital Devices Octopus Mini" , |
126 | .regmap = &octopus_map, |
127 | .port_num = 4, |
128 | .i2c_mask = 0x0f, |
129 | }; |
130 | |
131 | static const struct ddb_info ddb_v6 = { |
132 | .type = DDB_OCTOPUS, |
133 | .name = "Digital Devices Cine S2 V6 DVB adapter" , |
134 | .regmap = &octopus_map, |
135 | .port_num = 3, |
136 | .i2c_mask = 0x07, |
137 | }; |
138 | |
139 | static const struct ddb_info ddb_v6_5 = { |
140 | .type = DDB_OCTOPUS, |
141 | .name = "Digital Devices Cine S2 V6.5 DVB adapter" , |
142 | .regmap = &octopus_map, |
143 | .port_num = 4, |
144 | .i2c_mask = 0x0f, |
145 | }; |
146 | |
147 | static const struct ddb_info ddb_v7 = { |
148 | .type = DDB_OCTOPUS, |
149 | .name = "Digital Devices Cine S2 V7 DVB adapter" , |
150 | .regmap = &octopus_map, |
151 | .port_num = 4, |
152 | .i2c_mask = 0x0f, |
153 | .board_control = 2, |
154 | .board_control_2 = 4, |
155 | .ts_quirks = TS_QUIRK_REVERSED, |
156 | }; |
157 | |
158 | static const struct ddb_info ddb_v7a = { |
159 | .type = DDB_OCTOPUS, |
160 | .name = "Digital Devices Cine S2 V7 Advanced DVB adapter" , |
161 | .regmap = &octopus_map, |
162 | .port_num = 4, |
163 | .i2c_mask = 0x0f, |
164 | .board_control = 2, |
165 | .board_control_2 = 4, |
166 | .ts_quirks = TS_QUIRK_REVERSED, |
167 | }; |
168 | |
169 | static const struct ddb_info ddb_ctv7 = { |
170 | .type = DDB_OCTOPUS, |
171 | .name = "Digital Devices Cine CT V7 DVB adapter" , |
172 | .regmap = &octopus_map, |
173 | .port_num = 4, |
174 | .i2c_mask = 0x0f, |
175 | .board_control = 3, |
176 | .board_control_2 = 4, |
177 | }; |
178 | |
179 | static const struct ddb_info ddb_satixs2v3 = { |
180 | .type = DDB_OCTOPUS, |
181 | .name = "Mystique SaTiX-S2 V3 DVB adapter" , |
182 | .regmap = &octopus_map, |
183 | .port_num = 3, |
184 | .i2c_mask = 0x07, |
185 | }; |
186 | |
187 | static const struct ddb_info ddb_ci = { |
188 | .type = DDB_OCTOPUS_CI, |
189 | .name = "Digital Devices Octopus CI" , |
190 | .regmap = &octopus_map, |
191 | .port_num = 4, |
192 | .i2c_mask = 0x03, |
193 | }; |
194 | |
195 | static const struct ddb_info ddb_cis = { |
196 | .type = DDB_OCTOPUS_CI, |
197 | .name = "Digital Devices Octopus CI single" , |
198 | .regmap = &octopus_map, |
199 | .port_num = 3, |
200 | .i2c_mask = 0x03, |
201 | }; |
202 | |
203 | static const struct ddb_info ddb_ci_s2_pro = { |
204 | .type = DDB_OCTOPUS_CI, |
205 | .name = "Digital Devices Octopus CI S2 Pro" , |
206 | .regmap = &octopus_map, |
207 | .port_num = 4, |
208 | .i2c_mask = 0x01, |
209 | .board_control = 2, |
210 | .board_control_2 = 4, |
211 | }; |
212 | |
213 | static const struct ddb_info ddb_ci_s2_pro_a = { |
214 | .type = DDB_OCTOPUS_CI, |
215 | .name = "Digital Devices Octopus CI S2 Pro Advanced" , |
216 | .regmap = &octopus_map, |
217 | .port_num = 4, |
218 | .i2c_mask = 0x01, |
219 | .board_control = 2, |
220 | .board_control_2 = 4, |
221 | }; |
222 | |
223 | static const struct ddb_info ddb_dvbct = { |
224 | .type = DDB_OCTOPUS, |
225 | .name = "Digital Devices DVBCT V6.1 DVB adapter" , |
226 | .regmap = &octopus_map, |
227 | .port_num = 3, |
228 | .i2c_mask = 0x07, |
229 | }; |
230 | |
231 | /****************************************************************************/ |
232 | |
233 | static const struct ddb_info ddb_ct2_8 = { |
234 | .type = DDB_OCTOPUS_MAX_CT, |
235 | .name = "Digital Devices MAX A8 CT2" , |
236 | .regmap = &octopus_map, |
237 | .port_num = 4, |
238 | .i2c_mask = 0x0f, |
239 | .board_control = 0x0ff, |
240 | .board_control_2 = 0xf00, |
241 | .ts_quirks = TS_QUIRK_SERIAL, |
242 | .tempmon_irq = 24, |
243 | }; |
244 | |
245 | static const struct ddb_info ddb_c2t2_8 = { |
246 | .type = DDB_OCTOPUS_MAX_CT, |
247 | .name = "Digital Devices MAX A8 C2T2" , |
248 | .regmap = &octopus_map, |
249 | .port_num = 4, |
250 | .i2c_mask = 0x0f, |
251 | .board_control = 0x0ff, |
252 | .board_control_2 = 0xf00, |
253 | .ts_quirks = TS_QUIRK_SERIAL, |
254 | .tempmon_irq = 24, |
255 | }; |
256 | |
257 | static const struct ddb_info ddb_isdbt_8 = { |
258 | .type = DDB_OCTOPUS_MAX_CT, |
259 | .name = "Digital Devices MAX A8 ISDBT" , |
260 | .regmap = &octopus_map, |
261 | .port_num = 4, |
262 | .i2c_mask = 0x0f, |
263 | .board_control = 0x0ff, |
264 | .board_control_2 = 0xf00, |
265 | .ts_quirks = TS_QUIRK_SERIAL, |
266 | .tempmon_irq = 24, |
267 | }; |
268 | |
269 | static const struct ddb_info ddb_c2t2i_v0_8 = { |
270 | .type = DDB_OCTOPUS_MAX_CT, |
271 | .name = "Digital Devices MAX A8 C2T2I V0" , |
272 | .regmap = &octopus_map, |
273 | .port_num = 4, |
274 | .i2c_mask = 0x0f, |
275 | .board_control = 0x0ff, |
276 | .board_control_2 = 0xf00, |
277 | .ts_quirks = TS_QUIRK_SERIAL | TS_QUIRK_ALT_OSC, |
278 | .tempmon_irq = 24, |
279 | }; |
280 | |
281 | static const struct ddb_info ddb_c2t2i_8 = { |
282 | .type = DDB_OCTOPUS_MAX_CT, |
283 | .name = "Digital Devices MAX A8 C2T2I" , |
284 | .regmap = &octopus_map, |
285 | .port_num = 4, |
286 | .i2c_mask = 0x0f, |
287 | .board_control = 0x0ff, |
288 | .board_control_2 = 0xf00, |
289 | .ts_quirks = TS_QUIRK_SERIAL, |
290 | .tempmon_irq = 24, |
291 | }; |
292 | |
293 | /****************************************************************************/ |
294 | |
295 | static const struct ddb_info ddb_s2_48 = { |
296 | .type = DDB_OCTOPUS_MAX, |
297 | .name = "Digital Devices MAX S8 4/8" , |
298 | .regmap = &octopus_map, |
299 | .port_num = 4, |
300 | .i2c_mask = 0x01, |
301 | .board_control = 1, |
302 | .tempmon_irq = 24, |
303 | }; |
304 | |
305 | static const struct ddb_info ddb_s2x_48 = { |
306 | .type = DDB_OCTOPUS_MCI, |
307 | .name = "Digital Devices MAX SX8" , |
308 | .regmap = &octopus_map, |
309 | .port_num = 4, |
310 | .i2c_mask = 0x00, |
311 | .tempmon_irq = 24, |
312 | .mci_ports = 4, |
313 | .mci_type = 0, |
314 | }; |
315 | |
316 | /****************************************************************************/ |
317 | /****************************************************************************/ |
318 | /****************************************************************************/ |
319 | |
320 | #define DDB_DEVID(_device, _subdevice, _info) { \ |
321 | .vendor = DDVID, \ |
322 | .device = _device, \ |
323 | .subvendor = DDVID, \ |
324 | .subdevice = _subdevice, \ |
325 | .info = &_info } |
326 | |
327 | static const struct ddb_device_id ddb_device_ids[] = { |
328 | /* PCIe devices */ |
329 | DDB_DEVID(0x0002, 0x0001, ddb_octopus), |
330 | DDB_DEVID(0x0003, 0x0001, ddb_octopus), |
331 | DDB_DEVID(0x0005, 0x0004, ddb_octopusv3), |
332 | DDB_DEVID(0x0003, 0x0002, ddb_octopus_le), |
333 | DDB_DEVID(0x0003, 0x0003, ddb_octopus_oem), |
334 | DDB_DEVID(0x0003, 0x0010, ddb_octopus_mini), |
335 | DDB_DEVID(0x0005, 0x0011, ddb_octopus_mini), |
336 | DDB_DEVID(0x0003, 0x0020, ddb_v6), |
337 | DDB_DEVID(0x0003, 0x0021, ddb_v6_5), |
338 | DDB_DEVID(0x0006, 0x0022, ddb_v7), |
339 | DDB_DEVID(0x0006, 0x0024, ddb_v7a), |
340 | DDB_DEVID(0x0003, 0x0030, ddb_dvbct), |
341 | DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3), |
342 | DDB_DEVID(0x0006, 0x0031, ddb_ctv7), |
343 | DDB_DEVID(0x0006, 0x0032, ddb_ctv7), |
344 | DDB_DEVID(0x0006, 0x0033, ddb_ctv7), |
345 | DDB_DEVID(0x0007, 0x0023, ddb_s2_48), |
346 | DDB_DEVID(0x0008, 0x0034, ddb_ct2_8), |
347 | DDB_DEVID(0x0008, 0x0035, ddb_c2t2_8), |
348 | DDB_DEVID(0x0008, 0x0036, ddb_isdbt_8), |
349 | DDB_DEVID(0x0008, 0x0037, ddb_c2t2i_v0_8), |
350 | DDB_DEVID(0x0008, 0x0038, ddb_c2t2i_8), |
351 | DDB_DEVID(0x0009, 0x0025, ddb_s2x_48), |
352 | DDB_DEVID(0x0006, 0x0039, ddb_ctv7), |
353 | DDB_DEVID(0x0011, 0x0040, ddb_ci), |
354 | DDB_DEVID(0x0011, 0x0041, ddb_cis), |
355 | DDB_DEVID(0x0012, 0x0042, ddb_ci), |
356 | DDB_DEVID(0x0013, 0x0043, ddb_ci_s2_pro), |
357 | DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a), |
358 | }; |
359 | |
360 | /****************************************************************************/ |
361 | |
362 | const struct ddb_info *get_ddb_info(u16 vendor, u16 device, |
363 | u16 subvendor, u16 subdevice) |
364 | { |
365 | int i; |
366 | |
367 | for (i = 0; i < ARRAY_SIZE(ddb_device_ids); i++) { |
368 | const struct ddb_device_id *id = &ddb_device_ids[i]; |
369 | |
370 | if (vendor == id->vendor && |
371 | device == id->device && |
372 | subvendor == id->subvendor && |
373 | (subdevice == id->subdevice || |
374 | id->subdevice == 0xffff)) |
375 | return id->info; |
376 | } |
377 | |
378 | return &ddb_none; |
379 | } |
380 | |