1 | /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ |
2 | /* |
3 | * Wave5 series multi-standard codec IP - basic types |
4 | * |
5 | * Copyright (C) 2021-2023 CHIPS&MEDIA INC |
6 | */ |
7 | #ifndef __VPU_DRV_H__ |
8 | #define __VPU_DRV_H__ |
9 | |
10 | #include <media/v4l2-ctrls.h> |
11 | #include <media/v4l2-ioctl.h> |
12 | #include <media/v4l2-event.h> |
13 | #include <media/v4l2-fh.h> |
14 | #include <media/videobuf2-v4l2.h> |
15 | #include <media/videobuf2-dma-contig.h> |
16 | #include <media/videobuf2-vmalloc.h> |
17 | #include "wave5-vpuconfig.h" |
18 | #include "wave5-vpuapi.h" |
19 | |
20 | #define VPU_BUF_SYNC_TO_DEVICE 0 |
21 | #define VPU_BUF_SYNC_FROM_DEVICE 1 |
22 | |
23 | struct vpu_src_buffer { |
24 | struct v4l2_m2m_buffer v4l2_m2m_buf; |
25 | struct list_head list; |
26 | bool consumed; |
27 | }; |
28 | |
29 | struct vpu_dst_buffer { |
30 | struct v4l2_m2m_buffer v4l2_m2m_buf; |
31 | bool display; |
32 | }; |
33 | |
34 | enum vpu_fmt_type { |
35 | VPU_FMT_TYPE_CODEC = 0, |
36 | VPU_FMT_TYPE_RAW = 1 |
37 | }; |
38 | |
39 | struct vpu_format { |
40 | unsigned int v4l2_pix_fmt; |
41 | unsigned int max_width; |
42 | unsigned int min_width; |
43 | unsigned int max_height; |
44 | unsigned int min_height; |
45 | }; |
46 | |
47 | static inline struct vpu_instance *wave5_to_vpu_inst(struct v4l2_fh *vfh) |
48 | { |
49 | return container_of(vfh, struct vpu_instance, v4l2_fh); |
50 | } |
51 | |
52 | static inline struct vpu_instance *wave5_ctrl_to_vpu_inst(struct v4l2_ctrl *vctrl) |
53 | { |
54 | return container_of(vctrl->handler, struct vpu_instance, v4l2_ctrl_hdl); |
55 | } |
56 | |
57 | static inline struct vpu_src_buffer *wave5_to_vpu_src_buf(struct vb2_v4l2_buffer *vbuf) |
58 | { |
59 | return container_of(vbuf, struct vpu_src_buffer, v4l2_m2m_buf.vb); |
60 | } |
61 | |
62 | static inline struct vpu_dst_buffer *wave5_to_vpu_dst_buf(struct vb2_v4l2_buffer *vbuf) |
63 | { |
64 | return container_of(vbuf, struct vpu_dst_buffer, v4l2_m2m_buf.vb); |
65 | } |
66 | |
67 | int wave5_vpu_wait_interrupt(struct vpu_instance *inst, unsigned int timeout); |
68 | |
69 | int wave5_vpu_dec_register_device(struct vpu_device *dev); |
70 | void wave5_vpu_dec_unregister_device(struct vpu_device *dev); |
71 | int wave5_vpu_enc_register_device(struct vpu_device *dev); |
72 | void wave5_vpu_enc_unregister_device(struct vpu_device *dev); |
73 | static inline bool wave5_vpu_both_queues_are_streaming(struct vpu_instance *inst) |
74 | { |
75 | struct vb2_queue *vq_cap = |
76 | v4l2_m2m_get_vq(m2m_ctx: inst->v4l2_fh.m2m_ctx, type: V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); |
77 | struct vb2_queue *vq_out = |
78 | v4l2_m2m_get_vq(m2m_ctx: inst->v4l2_fh.m2m_ctx, type: V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE); |
79 | |
80 | return vb2_is_streaming(q: vq_cap) && vb2_is_streaming(q: vq_out); |
81 | } |
82 | |
83 | #endif |
84 | |