1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | #if !defined(_VISL_TRACE_HEVC_H_) || defined(TRACE_HEADER_MULTI_READ) |
3 | #define _VISL_TRACE_HEVC_H_ |
4 | |
5 | #include <linux/tracepoint.h> |
6 | #include "visl.h" |
7 | |
8 | #undef TRACE_SYSTEM |
9 | #define TRACE_SYSTEM visl_hevc_controls |
10 | |
11 | DECLARE_EVENT_CLASS(v4l2_ctrl_hevc_sps_tmpl, |
12 | TP_PROTO(const struct v4l2_ctrl_hevc_sps *s), |
13 | TP_ARGS(s), |
14 | TP_STRUCT__entry(__field_struct(struct v4l2_ctrl_hevc_sps, s)), |
15 | TP_fast_assign(__entry->s = *s), |
16 | TP_printk("\nvideo_parameter_set_id %u\n" |
17 | "seq_parameter_set_id %u\n" |
18 | "pic_width_in_luma_samples %u\n" |
19 | "pic_height_in_luma_samples %u\n" |
20 | "bit_depth_luma_minus8 %u\n" |
21 | "bit_depth_chroma_minus8 %u\n" |
22 | "log2_max_pic_order_cnt_lsb_minus4 %u\n" |
23 | "sps_max_dec_pic_buffering_minus1 %u\n" |
24 | "sps_max_num_reorder_pics %u\n" |
25 | "sps_max_latency_increase_plus1 %u\n" |
26 | "log2_min_luma_coding_block_size_minus3 %u\n" |
27 | "log2_diff_max_min_luma_coding_block_size %u\n" |
28 | "log2_min_luma_transform_block_size_minus2 %u\n" |
29 | "log2_diff_max_min_luma_transform_block_size %u\n" |
30 | "max_transform_hierarchy_depth_inter %u\n" |
31 | "max_transform_hierarchy_depth_intra %u\n" |
32 | "pcm_sample_bit_depth_luma_minus1 %u\n" |
33 | "pcm_sample_bit_depth_chroma_minus1 %u\n" |
34 | "log2_min_pcm_luma_coding_block_size_minus3 %u\n" |
35 | "log2_diff_max_min_pcm_luma_coding_block_size %u\n" |
36 | "num_short_term_ref_pic_sets %u\n" |
37 | "num_long_term_ref_pics_sps %u\n" |
38 | "chroma_format_idc %u\n" |
39 | "sps_max_sub_layers_minus1 %u\n" |
40 | "flags %s" , |
41 | __entry->s.video_parameter_set_id, |
42 | __entry->s.seq_parameter_set_id, |
43 | __entry->s.pic_width_in_luma_samples, |
44 | __entry->s.pic_height_in_luma_samples, |
45 | __entry->s.bit_depth_luma_minus8, |
46 | __entry->s.bit_depth_chroma_minus8, |
47 | __entry->s.log2_max_pic_order_cnt_lsb_minus4, |
48 | __entry->s.sps_max_dec_pic_buffering_minus1, |
49 | __entry->s.sps_max_num_reorder_pics, |
50 | __entry->s.sps_max_latency_increase_plus1, |
51 | __entry->s.log2_min_luma_coding_block_size_minus3, |
52 | __entry->s.log2_diff_max_min_luma_coding_block_size, |
53 | __entry->s.log2_min_luma_transform_block_size_minus2, |
54 | __entry->s.log2_diff_max_min_luma_transform_block_size, |
55 | __entry->s.max_transform_hierarchy_depth_inter, |
56 | __entry->s.max_transform_hierarchy_depth_intra, |
57 | __entry->s.pcm_sample_bit_depth_luma_minus1, |
58 | __entry->s.pcm_sample_bit_depth_chroma_minus1, |
59 | __entry->s.log2_min_pcm_luma_coding_block_size_minus3, |
60 | __entry->s.log2_diff_max_min_pcm_luma_coding_block_size, |
61 | __entry->s.num_short_term_ref_pic_sets, |
62 | __entry->s.num_long_term_ref_pics_sps, |
63 | __entry->s.chroma_format_idc, |
64 | __entry->s.sps_max_sub_layers_minus1, |
65 | __print_flags(__entry->s.flags, "|" , |
66 | {V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE, "SEPARATE_COLOUR_PLANE" }, |
67 | {V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED, "SCALING_LIST_ENABLED" }, |
68 | {V4L2_HEVC_SPS_FLAG_AMP_ENABLED, "AMP_ENABLED" }, |
69 | {V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET, "SAMPLE_ADAPTIVE_OFFSET" }, |
70 | {V4L2_HEVC_SPS_FLAG_PCM_ENABLED, "PCM_ENABLED" }, |
71 | {V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED, "V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED" }, |
72 | {V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT, "LONG_TERM_REF_PICS_PRESENT" }, |
73 | {V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED, "TEMPORAL_MVP_ENABLED" }, |
74 | {V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED, "STRONG_INTRA_SMOOTHING_ENABLED" } |
75 | )) |
76 | |
77 | ); |
78 | |
79 | |
80 | DECLARE_EVENT_CLASS(v4l2_ctrl_hevc_pps_tmpl, |
81 | TP_PROTO(const struct v4l2_ctrl_hevc_pps *p), |
82 | TP_ARGS(p), |
83 | TP_STRUCT__entry(__field_struct(struct v4l2_ctrl_hevc_pps, p)), |
84 | TP_fast_assign(__entry->p = *p), |
85 | TP_printk("\npic_parameter_set_id %u\n" |
86 | "num_extra_slice_header_bits %u\n" |
87 | "num_ref_idx_l0_default_active_minus1 %u\n" |
88 | "num_ref_idx_l1_default_active_minus1 %u\n" |
89 | "init_qp_minus26 %d\n" |
90 | "diff_cu_qp_delta_depth %u\n" |
91 | "pps_cb_qp_offset %d\n" |
92 | "pps_cr_qp_offset %d\n" |
93 | "num_tile_columns_minus1 %d\n" |
94 | "num_tile_rows_minus1 %d\n" |
95 | "column_width_minus1 %s\n" |
96 | "row_height_minus1 %s\n" |
97 | "pps_beta_offset_div2 %d\n" |
98 | "pps_tc_offset_div2 %d\n" |
99 | "log2_parallel_merge_level_minus2 %u\n" |
100 | "flags %s" , |
101 | __entry->p.pic_parameter_set_id, |
102 | __entry->p.num_extra_slice_header_bits, |
103 | __entry->p.num_ref_idx_l0_default_active_minus1, |
104 | __entry->p.num_ref_idx_l1_default_active_minus1, |
105 | __entry->p.init_qp_minus26, |
106 | __entry->p.diff_cu_qp_delta_depth, |
107 | __entry->p.pps_cb_qp_offset, |
108 | __entry->p.pps_cr_qp_offset, |
109 | __entry->p.num_tile_columns_minus1, |
110 | __entry->p.num_tile_rows_minus1, |
111 | __print_array(__entry->p.column_width_minus1, |
112 | ARRAY_SIZE(__entry->p.column_width_minus1), |
113 | sizeof(__entry->p.column_width_minus1[0])), |
114 | __print_array(__entry->p.row_height_minus1, |
115 | ARRAY_SIZE(__entry->p.row_height_minus1), |
116 | sizeof(__entry->p.row_height_minus1[0])), |
117 | __entry->p.pps_beta_offset_div2, |
118 | __entry->p.pps_tc_offset_div2, |
119 | __entry->p.log2_parallel_merge_level_minus2, |
120 | __print_flags(__entry->p.flags, "|" , |
121 | {V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED, "DEPENDENT_SLICE_SEGMENT_ENABLED" }, |
122 | {V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT, "OUTPUT_FLAG_PRESENT" }, |
123 | {V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED, "SIGN_DATA_HIDING_ENABLED" }, |
124 | {V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT, "CABAC_INIT_PRESENT" }, |
125 | {V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED, "CONSTRAINED_INTRA_PRED" }, |
126 | {V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED, "CU_QP_DELTA_ENABLED" }, |
127 | {V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT, "PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT" }, |
128 | {V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED, "WEIGHTED_PRED" }, |
129 | {V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED, "WEIGHTED_BIPRED" }, |
130 | {V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED, "TRANSQUANT_BYPASS_ENABLED" }, |
131 | {V4L2_HEVC_PPS_FLAG_TILES_ENABLED, "TILES_ENABLED" }, |
132 | {V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED, "ENTROPY_CODING_SYNC_ENABLED" }, |
133 | {V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED, "LOOP_FILTER_ACROSS_TILES_ENABLED" }, |
134 | {V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED, "PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED" }, |
135 | {V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED, "DEBLOCKING_FILTER_OVERRIDE_ENABLED" }, |
136 | {V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER, "DISABLE_DEBLOCKING_FILTER" }, |
137 | {V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT, "LISTS_MODIFICATION_PRESENT" }, |
138 | {V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT, "SLICE_SEGMENT_HEADER_EXTENSION_PRESENT" }, |
139 | {V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT, "DEBLOCKING_FILTER_CONTROL_PRESENT" }, |
140 | {V4L2_HEVC_PPS_FLAG_UNIFORM_SPACING, "UNIFORM_SPACING" } |
141 | )) |
142 | |
143 | ); |
144 | |
145 | |
146 | |
147 | DECLARE_EVENT_CLASS(v4l2_ctrl_hevc_slice_params_tmpl, |
148 | TP_PROTO(const struct v4l2_ctrl_hevc_slice_params *s), |
149 | TP_ARGS(s), |
150 | TP_STRUCT__entry(__field_struct(struct v4l2_ctrl_hevc_slice_params, s)), |
151 | TP_fast_assign(__entry->s = *s), |
152 | TP_printk("\nbit_size %u\n" |
153 | "data_byte_offset %u\n" |
154 | "num_entry_point_offsets %u\n" |
155 | "nal_unit_type %u\n" |
156 | "nuh_temporal_id_plus1 %u\n" |
157 | "slice_type %u\n" |
158 | "colour_plane_id %u\n" |
159 | "slice_pic_order_cnt %d\n" |
160 | "num_ref_idx_l0_active_minus1 %u\n" |
161 | "num_ref_idx_l1_active_minus1 %u\n" |
162 | "collocated_ref_idx %u\n" |
163 | "five_minus_max_num_merge_cand %u\n" |
164 | "slice_qp_delta %d\n" |
165 | "slice_cb_qp_offset %d\n" |
166 | "slice_cr_qp_offset %d\n" |
167 | "slice_act_y_qp_offset %d\n" |
168 | "slice_act_cb_qp_offset %d\n" |
169 | "slice_act_cr_qp_offset %d\n" |
170 | "slice_beta_offset_div2 %d\n" |
171 | "slice_tc_offset_div2 %d\n" |
172 | "pic_struct %u\n" |
173 | "slice_segment_addr %u\n" |
174 | "ref_idx_l0 %s\n" |
175 | "ref_idx_l1 %s\n" |
176 | "short_term_ref_pic_set_size %u\n" |
177 | "long_term_ref_pic_set_size %u\n" |
178 | "flags %s" , |
179 | __entry->s.bit_size, |
180 | __entry->s.data_byte_offset, |
181 | __entry->s.num_entry_point_offsets, |
182 | __entry->s.nal_unit_type, |
183 | __entry->s.nuh_temporal_id_plus1, |
184 | __entry->s.slice_type, |
185 | __entry->s.colour_plane_id, |
186 | __entry->s.slice_pic_order_cnt, |
187 | __entry->s.num_ref_idx_l0_active_minus1, |
188 | __entry->s.num_ref_idx_l1_active_minus1, |
189 | __entry->s.collocated_ref_idx, |
190 | __entry->s.five_minus_max_num_merge_cand, |
191 | __entry->s.slice_qp_delta, |
192 | __entry->s.slice_cb_qp_offset, |
193 | __entry->s.slice_cr_qp_offset, |
194 | __entry->s.slice_act_y_qp_offset, |
195 | __entry->s.slice_act_cb_qp_offset, |
196 | __entry->s.slice_act_cr_qp_offset, |
197 | __entry->s.slice_beta_offset_div2, |
198 | __entry->s.slice_tc_offset_div2, |
199 | __entry->s.pic_struct, |
200 | __entry->s.slice_segment_addr, |
201 | __print_array(__entry->s.ref_idx_l0, |
202 | ARRAY_SIZE(__entry->s.ref_idx_l0), |
203 | sizeof(__entry->s.ref_idx_l0[0])), |
204 | __print_array(__entry->s.ref_idx_l1, |
205 | ARRAY_SIZE(__entry->s.ref_idx_l1), |
206 | sizeof(__entry->s.ref_idx_l1[0])), |
207 | __entry->s.short_term_ref_pic_set_size, |
208 | __entry->s.long_term_ref_pic_set_size, |
209 | __print_flags(__entry->s.flags, "|" , |
210 | {V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA, "SLICE_SAO_LUMA" }, |
211 | {V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA, "SLICE_SAO_CHROMA" }, |
212 | {V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED, "SLICE_TEMPORAL_MVP_ENABLED" }, |
213 | {V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO, "MVD_L1_ZERO" }, |
214 | {V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT, "CABAC_INIT" }, |
215 | {V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0, "COLLOCATED_FROM_L0" }, |
216 | {V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV, "USE_INTEGER_MV" }, |
217 | {V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED, "SLICE_DEBLOCKING_FILTER_DISABLED" }, |
218 | {V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED, "SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED" }, |
219 | {V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT, "DEPENDENT_SLICE_SEGMENT" } |
220 | |
221 | )) |
222 | ); |
223 | |
224 | DECLARE_EVENT_CLASS(v4l2_hevc_pred_weight_table_tmpl, |
225 | TP_PROTO(const struct v4l2_hevc_pred_weight_table *p), |
226 | TP_ARGS(p), |
227 | TP_STRUCT__entry(__field_struct(struct v4l2_hevc_pred_weight_table, p)), |
228 | TP_fast_assign(__entry->p = *p), |
229 | TP_printk("\ndelta_luma_weight_l0 %s\n" |
230 | "luma_offset_l0 %s\n" |
231 | "delta_chroma_weight_l0 {%s}\n" |
232 | "chroma_offset_l0 {%s}\n" |
233 | "delta_luma_weight_l1 %s\n" |
234 | "luma_offset_l1 %s\n" |
235 | "delta_chroma_weight_l1 {%s}\n" |
236 | "chroma_offset_l1 {%s}\n" |
237 | "luma_log2_weight_denom %d\n" |
238 | "delta_chroma_log2_weight_denom %d\n" , |
239 | __print_array(__entry->p.delta_luma_weight_l0, |
240 | ARRAY_SIZE(__entry->p.delta_luma_weight_l0), |
241 | sizeof(__entry->p.delta_luma_weight_l0[0])), |
242 | __print_array(__entry->p.luma_offset_l0, |
243 | ARRAY_SIZE(__entry->p.luma_offset_l0), |
244 | sizeof(__entry->p.luma_offset_l0[0])), |
245 | __print_hex_dump("" , DUMP_PREFIX_NONE, 32, 1, |
246 | __entry->p.delta_chroma_weight_l0, |
247 | sizeof(__entry->p.delta_chroma_weight_l0), |
248 | false), |
249 | __print_hex_dump("" , DUMP_PREFIX_NONE, 32, 1, |
250 | __entry->p.chroma_offset_l0, |
251 | sizeof(__entry->p.chroma_offset_l0), |
252 | false), |
253 | __print_array(__entry->p.delta_luma_weight_l1, |
254 | ARRAY_SIZE(__entry->p.delta_luma_weight_l1), |
255 | sizeof(__entry->p.delta_luma_weight_l1[0])), |
256 | __print_array(__entry->p.luma_offset_l1, |
257 | ARRAY_SIZE(__entry->p.luma_offset_l1), |
258 | sizeof(__entry->p.luma_offset_l1[0])), |
259 | __print_hex_dump("" , DUMP_PREFIX_NONE, 32, 1, |
260 | __entry->p.delta_chroma_weight_l1, |
261 | sizeof(__entry->p.delta_chroma_weight_l1), |
262 | false), |
263 | __print_hex_dump("" , DUMP_PREFIX_NONE, 32, 1, |
264 | __entry->p.chroma_offset_l1, |
265 | sizeof(__entry->p.chroma_offset_l1), |
266 | false), |
267 | __entry->p.luma_log2_weight_denom, |
268 | __entry->p.delta_chroma_log2_weight_denom |
269 | |
270 | )) |
271 | |
272 | DECLARE_EVENT_CLASS(v4l2_ctrl_hevc_scaling_matrix_tmpl, |
273 | TP_PROTO(const struct v4l2_ctrl_hevc_scaling_matrix *s), |
274 | TP_ARGS(s), |
275 | TP_STRUCT__entry(__field_struct(struct v4l2_ctrl_hevc_scaling_matrix, s)), |
276 | TP_fast_assign(__entry->s = *s), |
277 | TP_printk("\nscaling_list_4x4 {%s}\n" |
278 | "scaling_list_8x8 {%s}\n" |
279 | "scaling_list_16x16 {%s}\n" |
280 | "scaling_list_32x32 {%s}\n" |
281 | "scaling_list_dc_coef_16x16 %s\n" |
282 | "scaling_list_dc_coef_32x32 %s\n" , |
283 | __print_hex_dump("" , DUMP_PREFIX_NONE, 32, 1, |
284 | __entry->s.scaling_list_4x4, |
285 | sizeof(__entry->s.scaling_list_4x4), |
286 | false), |
287 | __print_hex_dump("" , DUMP_PREFIX_NONE, 32, 1, |
288 | __entry->s.scaling_list_8x8, |
289 | sizeof(__entry->s.scaling_list_8x8), |
290 | false), |
291 | __print_hex_dump("" , DUMP_PREFIX_NONE, 32, 1, |
292 | __entry->s.scaling_list_16x16, |
293 | sizeof(__entry->s.scaling_list_16x16), |
294 | false), |
295 | __print_hex_dump("" , DUMP_PREFIX_NONE, 32, 1, |
296 | __entry->s.scaling_list_32x32, |
297 | sizeof(__entry->s.scaling_list_32x32), |
298 | false), |
299 | __print_array(__entry->s.scaling_list_dc_coef_16x16, |
300 | ARRAY_SIZE(__entry->s.scaling_list_dc_coef_16x16), |
301 | sizeof(__entry->s.scaling_list_dc_coef_16x16[0])), |
302 | __print_array(__entry->s.scaling_list_dc_coef_32x32, |
303 | ARRAY_SIZE(__entry->s.scaling_list_dc_coef_32x32), |
304 | sizeof(__entry->s.scaling_list_dc_coef_32x32[0])) |
305 | )) |
306 | |
307 | DECLARE_EVENT_CLASS(v4l2_ctrl_hevc_decode_params_tmpl, |
308 | TP_PROTO(const struct v4l2_ctrl_hevc_decode_params *d), |
309 | TP_ARGS(d), |
310 | TP_STRUCT__entry(__field_struct(struct v4l2_ctrl_hevc_decode_params, d)), |
311 | TP_fast_assign(__entry->d = *d), |
312 | TP_printk("\npic_order_cnt_val %d\n" |
313 | "short_term_ref_pic_set_size %u\n" |
314 | "long_term_ref_pic_set_size %u\n" |
315 | "num_active_dpb_entries %u\n" |
316 | "num_poc_st_curr_before %u\n" |
317 | "num_poc_st_curr_after %u\n" |
318 | "num_poc_lt_curr %u\n" |
319 | "poc_st_curr_before %s\n" |
320 | "poc_st_curr_after %s\n" |
321 | "poc_lt_curr %s\n" |
322 | "flags %s" , |
323 | __entry->d.pic_order_cnt_val, |
324 | __entry->d.short_term_ref_pic_set_size, |
325 | __entry->d.long_term_ref_pic_set_size, |
326 | __entry->d.num_active_dpb_entries, |
327 | __entry->d.num_poc_st_curr_before, |
328 | __entry->d.num_poc_st_curr_after, |
329 | __entry->d.num_poc_lt_curr, |
330 | __print_array(__entry->d.poc_st_curr_before, |
331 | ARRAY_SIZE(__entry->d.poc_st_curr_before), |
332 | sizeof(__entry->d.poc_st_curr_before[0])), |
333 | __print_array(__entry->d.poc_st_curr_after, |
334 | ARRAY_SIZE(__entry->d.poc_st_curr_after), |
335 | sizeof(__entry->d.poc_st_curr_after[0])), |
336 | __print_array(__entry->d.poc_lt_curr, |
337 | ARRAY_SIZE(__entry->d.poc_lt_curr), |
338 | sizeof(__entry->d.poc_lt_curr[0])), |
339 | __print_flags(__entry->d.flags, "|" , |
340 | {V4L2_HEVC_DECODE_PARAM_FLAG_IRAP_PIC, "IRAP_PIC" }, |
341 | {V4L2_HEVC_DECODE_PARAM_FLAG_IDR_PIC, "IDR_PIC" }, |
342 | {V4L2_HEVC_DECODE_PARAM_FLAG_NO_OUTPUT_OF_PRIOR, "NO_OUTPUT_OF_PRIOR" } |
343 | )) |
344 | ); |
345 | |
346 | |
347 | DECLARE_EVENT_CLASS(v4l2_hevc_dpb_entry_tmpl, |
348 | TP_PROTO(const struct v4l2_hevc_dpb_entry *e), |
349 | TP_ARGS(e), |
350 | TP_STRUCT__entry(__field_struct(struct v4l2_hevc_dpb_entry, e)), |
351 | TP_fast_assign(__entry->e = *e), |
352 | TP_printk("\ntimestamp %llu\n" |
353 | "flags %s\n" |
354 | "field_pic %u\n" |
355 | "pic_order_cnt_val %d\n" , |
356 | __entry->e.timestamp, |
357 | __print_flags(__entry->e.flags, "|" , |
358 | {V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE, "LONG_TERM_REFERENCE" } |
359 | ), |
360 | __entry->e.field_pic, |
361 | __entry->e.pic_order_cnt_val |
362 | )) |
363 | |
364 | DEFINE_EVENT(v4l2_ctrl_hevc_sps_tmpl, v4l2_ctrl_hevc_sps, |
365 | TP_PROTO(const struct v4l2_ctrl_hevc_sps *s), |
366 | TP_ARGS(s) |
367 | ); |
368 | |
369 | DEFINE_EVENT(v4l2_ctrl_hevc_pps_tmpl, v4l2_ctrl_hevc_pps, |
370 | TP_PROTO(const struct v4l2_ctrl_hevc_pps *p), |
371 | TP_ARGS(p) |
372 | ); |
373 | |
374 | DEFINE_EVENT(v4l2_ctrl_hevc_slice_params_tmpl, v4l2_ctrl_hevc_slice_params, |
375 | TP_PROTO(const struct v4l2_ctrl_hevc_slice_params *s), |
376 | TP_ARGS(s) |
377 | ); |
378 | |
379 | DEFINE_EVENT(v4l2_hevc_pred_weight_table_tmpl, v4l2_hevc_pred_weight_table, |
380 | TP_PROTO(const struct v4l2_hevc_pred_weight_table *p), |
381 | TP_ARGS(p) |
382 | ); |
383 | |
384 | DEFINE_EVENT(v4l2_ctrl_hevc_scaling_matrix_tmpl, v4l2_ctrl_hevc_scaling_matrix, |
385 | TP_PROTO(const struct v4l2_ctrl_hevc_scaling_matrix *s), |
386 | TP_ARGS(s) |
387 | ); |
388 | |
389 | DEFINE_EVENT(v4l2_ctrl_hevc_decode_params_tmpl, v4l2_ctrl_hevc_decode_params, |
390 | TP_PROTO(const struct v4l2_ctrl_hevc_decode_params *d), |
391 | TP_ARGS(d) |
392 | ); |
393 | |
394 | DEFINE_EVENT(v4l2_hevc_dpb_entry_tmpl, v4l2_hevc_dpb_entry, |
395 | TP_PROTO(const struct v4l2_hevc_dpb_entry *e), |
396 | TP_ARGS(e) |
397 | ); |
398 | |
399 | #endif |
400 | |
401 | #undef TRACE_INCLUDE_PATH |
402 | #undef TRACE_INCLUDE_FILE |
403 | #define TRACE_INCLUDE_PATH ../../drivers/media/test-drivers/visl |
404 | #define TRACE_INCLUDE_FILE visl-trace-hevc |
405 | #include <trace/define_trace.h> |
406 | |