1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Etoms Et61x151 GPL Linux driver by Michel Xhaard (09/09/2004) |
4 | * |
5 | * V4L2 by Jean-Francois Moine <http://moinejf.free.fr> |
6 | */ |
7 | |
8 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
9 | |
10 | #define MODULE_NAME "etoms" |
11 | |
12 | #include "gspca.h" |
13 | |
14 | MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>" ); |
15 | MODULE_DESCRIPTION("Etoms USB Camera Driver" ); |
16 | MODULE_LICENSE("GPL" ); |
17 | |
18 | /* specific webcam descriptor */ |
19 | struct sd { |
20 | struct gspca_dev gspca_dev; /* !! must be the first item */ |
21 | |
22 | unsigned char autogain; |
23 | |
24 | char sensor; |
25 | #define SENSOR_PAS106 0 |
26 | #define SENSOR_TAS5130CXX 1 |
27 | signed char ag_cnt; |
28 | #define AG_CNT_START 13 |
29 | }; |
30 | |
31 | static const struct v4l2_pix_format vga_mode[] = { |
32 | {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, |
33 | .bytesperline = 320, |
34 | .sizeimage = 320 * 240, |
35 | .colorspace = V4L2_COLORSPACE_SRGB, |
36 | .priv = 1}, |
37 | /* {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, |
38 | .bytesperline = 640, |
39 | .sizeimage = 640 * 480, |
40 | .colorspace = V4L2_COLORSPACE_SRGB, |
41 | .priv = 0}, */ |
42 | }; |
43 | |
44 | static const struct v4l2_pix_format sif_mode[] = { |
45 | {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, |
46 | .bytesperline = 176, |
47 | .sizeimage = 176 * 144, |
48 | .colorspace = V4L2_COLORSPACE_SRGB, |
49 | .priv = 1}, |
50 | {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, |
51 | .bytesperline = 352, |
52 | .sizeimage = 352 * 288, |
53 | .colorspace = V4L2_COLORSPACE_SRGB, |
54 | .priv = 0}, |
55 | }; |
56 | |
57 | #define ETOMS_ALT_SIZE_1000 12 |
58 | |
59 | #define ET_GPIO_DIR_CTRL 0x04 /* Control IO bit[0..5] (0 in 1 out) */ |
60 | #define ET_GPIO_OUT 0x05 /* Only IO data */ |
61 | #define ET_GPIO_IN 0x06 /* Read Only IO data */ |
62 | #define ET_RESET_ALL 0x03 |
63 | #define ET_ClCK 0x01 |
64 | #define ET_CTRL 0x02 /* enable i2c OutClck Powerdown mode */ |
65 | |
66 | #define ET_COMP 0x12 /* Compression register */ |
67 | #define ET_MAXQt 0x13 |
68 | #define ET_MINQt 0x14 |
69 | #define ET_COMP_VAL0 0x02 |
70 | #define ET_COMP_VAL1 0x03 |
71 | |
72 | #define ET_REG1d 0x1d |
73 | #define ET_REG1e 0x1e |
74 | #define ET_REG1f 0x1f |
75 | #define ET_REG20 0x20 |
76 | #define ET_REG21 0x21 |
77 | #define ET_REG22 0x22 |
78 | #define ET_REG23 0x23 |
79 | #define ET_REG24 0x24 |
80 | #define ET_REG25 0x25 |
81 | /* base registers for luma calculation */ |
82 | #define ET_LUMA_CENTER 0x39 |
83 | |
84 | #define ET_G_RED 0x4d |
85 | #define ET_G_GREEN1 0x4e |
86 | #define ET_G_BLUE 0x4f |
87 | #define ET_G_GREEN2 0x50 |
88 | #define ET_G_GR_H 0x51 |
89 | #define ET_G_GB_H 0x52 |
90 | |
91 | #define ET_O_RED 0x34 |
92 | #define ET_O_GREEN1 0x35 |
93 | #define ET_O_BLUE 0x36 |
94 | #define ET_O_GREEN2 0x37 |
95 | |
96 | #define ET_SYNCHRO 0x68 |
97 | #define ET_STARTX 0x69 |
98 | #define ET_STARTY 0x6a |
99 | #define ET_WIDTH_LOW 0x6b |
100 | #define ET_HEIGTH_LOW 0x6c |
101 | #define ET_W_H_HEIGTH 0x6d |
102 | |
103 | #define ET_REG6e 0x6e /* OBW */ |
104 | #define ET_REG6f 0x6f /* OBW */ |
105 | #define ET_REG70 0x70 /* OBW_AWB */ |
106 | #define ET_REG71 0x71 /* OBW_AWB */ |
107 | #define ET_REG72 0x72 /* OBW_AWB */ |
108 | #define ET_REG73 0x73 /* Clkdelay ns */ |
109 | #define ET_REG74 0x74 /* test pattern */ |
110 | #define ET_REG75 0x75 /* test pattern */ |
111 | |
112 | #define ET_I2C_CLK 0x8c |
113 | #define ET_PXL_CLK 0x60 |
114 | |
115 | #define ET_I2C_BASE 0x89 |
116 | #define ET_I2C_COUNT 0x8a |
117 | #define ET_I2C_PREFETCH 0x8b |
118 | #define ET_I2C_REG 0x88 |
119 | #define ET_I2C_DATA7 0x87 |
120 | #define ET_I2C_DATA6 0x86 |
121 | #define ET_I2C_DATA5 0x85 |
122 | #define ET_I2C_DATA4 0x84 |
123 | #define ET_I2C_DATA3 0x83 |
124 | #define ET_I2C_DATA2 0x82 |
125 | #define ET_I2C_DATA1 0x81 |
126 | #define ET_I2C_DATA0 0x80 |
127 | |
128 | #define PAS106_REG2 0x02 /* pxlClk = systemClk/(reg2) */ |
129 | #define PAS106_REG3 0x03 /* line/frame H [11..4] */ |
130 | #define PAS106_REG4 0x04 /* line/frame L [3..0] */ |
131 | #define PAS106_REG5 0x05 /* exposure time line offset(default 5) */ |
132 | #define PAS106_REG6 0x06 /* exposure time pixel offset(default 6) */ |
133 | #define PAS106_REG7 0x07 /* signbit Dac (default 0) */ |
134 | #define PAS106_REG9 0x09 |
135 | #define PAS106_REG0e 0x0e /* global gain [4..0](default 0x0e) */ |
136 | #define PAS106_REG13 0x13 /* end i2c write */ |
137 | |
138 | static const __u8 GainRGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 }; |
139 | |
140 | static const __u8 I2c2[] = { 0x08, 0x08, 0x08, 0x08, 0x0d }; |
141 | |
142 | static const __u8 I2c3[] = { 0x12, 0x05 }; |
143 | |
144 | static const __u8 I2c4[] = { 0x41, 0x08 }; |
145 | |
146 | /* read 'len' bytes to gspca_dev->usb_buf */ |
147 | static void reg_r(struct gspca_dev *gspca_dev, |
148 | __u16 index, |
149 | __u16 len) |
150 | { |
151 | struct usb_device *dev = gspca_dev->dev; |
152 | |
153 | if (len > USB_BUF_SZ) { |
154 | gspca_err(gspca_dev, "reg_r: buffer overflow\n" ); |
155 | return; |
156 | } |
157 | |
158 | usb_control_msg(dev, |
159 | usb_rcvctrlpipe(dev, 0), |
160 | request: 0, |
161 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, |
162 | value: 0, |
163 | index, data: gspca_dev->usb_buf, size: len, timeout: 500); |
164 | gspca_dbg(gspca_dev, D_USBI, "reg read [%02x] -> %02x ..\n" , |
165 | index, gspca_dev->usb_buf[0]); |
166 | } |
167 | |
168 | static void reg_w_val(struct gspca_dev *gspca_dev, |
169 | __u16 index, |
170 | __u8 val) |
171 | { |
172 | struct usb_device *dev = gspca_dev->dev; |
173 | |
174 | gspca_dev->usb_buf[0] = val; |
175 | usb_control_msg(dev, |
176 | usb_sndctrlpipe(dev, 0), |
177 | request: 0, |
178 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, |
179 | value: 0, |
180 | index, data: gspca_dev->usb_buf, size: 1, timeout: 500); |
181 | } |
182 | |
183 | static void reg_w(struct gspca_dev *gspca_dev, |
184 | __u16 index, |
185 | const __u8 *buffer, |
186 | __u16 len) |
187 | { |
188 | struct usb_device *dev = gspca_dev->dev; |
189 | |
190 | if (len > USB_BUF_SZ) { |
191 | pr_err("reg_w: buffer overflow\n" ); |
192 | return; |
193 | } |
194 | gspca_dbg(gspca_dev, D_USBO, "reg write [%02x] = %02x..\n" , |
195 | index, *buffer); |
196 | |
197 | memcpy(gspca_dev->usb_buf, buffer, len); |
198 | usb_control_msg(dev, |
199 | usb_sndctrlpipe(dev, 0), |
200 | request: 0, |
201 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE, |
202 | value: 0, index, data: gspca_dev->usb_buf, size: len, timeout: 500); |
203 | } |
204 | |
205 | static int i2c_w(struct gspca_dev *gspca_dev, |
206 | __u8 reg, |
207 | const __u8 *buffer, |
208 | int len, __u8 mode) |
209 | { |
210 | /* buffer should be [D0..D7] */ |
211 | __u8 ptchcount; |
212 | |
213 | /* set the base address */ |
214 | reg_w_val(gspca_dev, ET_I2C_BASE, val: 0x40); |
215 | /* sensor base for the pas106 */ |
216 | /* set count and prefetch */ |
217 | ptchcount = ((len & 0x07) << 4) | (mode & 0x03); |
218 | reg_w_val(gspca_dev, ET_I2C_COUNT, val: ptchcount); |
219 | /* set the register base */ |
220 | reg_w_val(gspca_dev, ET_I2C_REG, val: reg); |
221 | while (--len >= 0) |
222 | reg_w_val(gspca_dev, ET_I2C_DATA0 + len, val: buffer[len]); |
223 | return 0; |
224 | } |
225 | |
226 | static int i2c_r(struct gspca_dev *gspca_dev, |
227 | __u8 reg) |
228 | { |
229 | /* set the base address */ |
230 | reg_w_val(gspca_dev, ET_I2C_BASE, val: 0x40); |
231 | /* sensor base for the pas106 */ |
232 | /* set count and prefetch (cnd: 4 bits - mode: 4 bits) */ |
233 | reg_w_val(gspca_dev, ET_I2C_COUNT, val: 0x11); |
234 | reg_w_val(gspca_dev, ET_I2C_REG, val: reg); /* set the register base */ |
235 | reg_w_val(gspca_dev, ET_I2C_PREFETCH, val: 0x02); /* prefetch */ |
236 | reg_w_val(gspca_dev, ET_I2C_PREFETCH, val: 0x00); |
237 | reg_r(gspca_dev, ET_I2C_DATA0, len: 1); /* read one byte */ |
238 | return 0; |
239 | } |
240 | |
241 | static int Et_WaitStatus(struct gspca_dev *gspca_dev) |
242 | { |
243 | int retry = 10; |
244 | |
245 | while (retry--) { |
246 | reg_r(gspca_dev, ET_ClCK, len: 1); |
247 | if (gspca_dev->usb_buf[0] != 0) |
248 | return 1; |
249 | } |
250 | return 0; |
251 | } |
252 | |
253 | static int et_video(struct gspca_dev *gspca_dev, |
254 | int on) |
255 | { |
256 | int ret; |
257 | |
258 | reg_w_val(gspca_dev, ET_GPIO_OUT, |
259 | val: on ? 0x10 /* startvideo - set Bit5 */ |
260 | : 0); /* stopvideo */ |
261 | ret = Et_WaitStatus(gspca_dev); |
262 | if (ret != 0) |
263 | gspca_err(gspca_dev, "timeout video on/off\n" ); |
264 | return ret; |
265 | } |
266 | |
267 | static void Et_init2(struct gspca_dev *gspca_dev) |
268 | { |
269 | __u8 value; |
270 | static const __u8 FormLine[] = { 0x84, 0x03, 0x14, 0xf4, 0x01, 0x05 }; |
271 | |
272 | gspca_dbg(gspca_dev, D_STREAM, "Open Init2 ET\n" ); |
273 | reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, val: 0x2f); |
274 | reg_w_val(gspca_dev, ET_GPIO_OUT, val: 0x10); |
275 | reg_r(gspca_dev, ET_GPIO_IN, len: 1); |
276 | reg_w_val(gspca_dev, ET_ClCK, val: 0x14); /* 0x14 // 0x16 enabled pattern */ |
277 | reg_w_val(gspca_dev, ET_CTRL, val: 0x1b); |
278 | |
279 | /* compression et subsampling */ |
280 | if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) |
281 | value = ET_COMP_VAL1; /* 320 */ |
282 | else |
283 | value = ET_COMP_VAL0; /* 640 */ |
284 | reg_w_val(gspca_dev, ET_COMP, val: value); |
285 | reg_w_val(gspca_dev, ET_MAXQt, val: 0x1f); |
286 | reg_w_val(gspca_dev, ET_MINQt, val: 0x04); |
287 | /* undocumented registers */ |
288 | reg_w_val(gspca_dev, ET_REG1d, val: 0xff); |
289 | reg_w_val(gspca_dev, ET_REG1e, val: 0xff); |
290 | reg_w_val(gspca_dev, ET_REG1f, val: 0xff); |
291 | reg_w_val(gspca_dev, ET_REG20, val: 0x35); |
292 | reg_w_val(gspca_dev, ET_REG21, val: 0x01); |
293 | reg_w_val(gspca_dev, ET_REG22, val: 0x00); |
294 | reg_w_val(gspca_dev, ET_REG23, val: 0xff); |
295 | reg_w_val(gspca_dev, ET_REG24, val: 0xff); |
296 | reg_w_val(gspca_dev, ET_REG25, val: 0x0f); |
297 | /* colors setting */ |
298 | reg_w_val(gspca_dev, index: 0x30, val: 0x11); /* 0x30 */ |
299 | reg_w_val(gspca_dev, index: 0x31, val: 0x40); |
300 | reg_w_val(gspca_dev, index: 0x32, val: 0x00); |
301 | reg_w_val(gspca_dev, ET_O_RED, val: 0x00); /* 0x34 */ |
302 | reg_w_val(gspca_dev, ET_O_GREEN1, val: 0x00); |
303 | reg_w_val(gspca_dev, ET_O_BLUE, val: 0x00); |
304 | reg_w_val(gspca_dev, ET_O_GREEN2, val: 0x00); |
305 | /*************/ |
306 | reg_w_val(gspca_dev, ET_G_RED, val: 0x80); /* 0x4d */ |
307 | reg_w_val(gspca_dev, ET_G_GREEN1, val: 0x80); |
308 | reg_w_val(gspca_dev, ET_G_BLUE, val: 0x80); |
309 | reg_w_val(gspca_dev, ET_G_GREEN2, val: 0x80); |
310 | reg_w_val(gspca_dev, ET_G_GR_H, val: 0x00); |
311 | reg_w_val(gspca_dev, ET_G_GB_H, val: 0x00); /* 0x52 */ |
312 | /* Window control registers */ |
313 | reg_w_val(gspca_dev, index: 0x61, val: 0x80); /* use cmc_out */ |
314 | reg_w_val(gspca_dev, index: 0x62, val: 0x02); |
315 | reg_w_val(gspca_dev, index: 0x63, val: 0x03); |
316 | reg_w_val(gspca_dev, index: 0x64, val: 0x14); |
317 | reg_w_val(gspca_dev, index: 0x65, val: 0x0e); |
318 | reg_w_val(gspca_dev, index: 0x66, val: 0x02); |
319 | reg_w_val(gspca_dev, index: 0x67, val: 0x02); |
320 | |
321 | /**************************************/ |
322 | reg_w_val(gspca_dev, ET_SYNCHRO, val: 0x8f); /* 0x68 */ |
323 | reg_w_val(gspca_dev, ET_STARTX, val: 0x69); /* 0x6a //0x69 */ |
324 | reg_w_val(gspca_dev, ET_STARTY, val: 0x0d); /* 0x0d //0x0c */ |
325 | reg_w_val(gspca_dev, ET_WIDTH_LOW, val: 0x80); |
326 | reg_w_val(gspca_dev, ET_HEIGTH_LOW, val: 0xe0); |
327 | reg_w_val(gspca_dev, ET_W_H_HEIGTH, val: 0x60); /* 6d */ |
328 | reg_w_val(gspca_dev, ET_REG6e, val: 0x86); |
329 | reg_w_val(gspca_dev, ET_REG6f, val: 0x01); |
330 | reg_w_val(gspca_dev, ET_REG70, val: 0x26); |
331 | reg_w_val(gspca_dev, ET_REG71, val: 0x7a); |
332 | reg_w_val(gspca_dev, ET_REG72, val: 0x01); |
333 | /* Clock Pattern registers ***************** */ |
334 | reg_w_val(gspca_dev, ET_REG73, val: 0x00); |
335 | reg_w_val(gspca_dev, ET_REG74, val: 0x18); /* 0x28 */ |
336 | reg_w_val(gspca_dev, ET_REG75, val: 0x0f); /* 0x01 */ |
337 | /**********************************************/ |
338 | reg_w_val(gspca_dev, index: 0x8a, val: 0x20); |
339 | reg_w_val(gspca_dev, index: 0x8d, val: 0x0f); |
340 | reg_w_val(gspca_dev, index: 0x8e, val: 0x08); |
341 | /**************************************/ |
342 | reg_w_val(gspca_dev, index: 0x03, val: 0x08); |
343 | reg_w_val(gspca_dev, ET_PXL_CLK, val: 0x03); |
344 | reg_w_val(gspca_dev, index: 0x81, val: 0xff); |
345 | reg_w_val(gspca_dev, index: 0x80, val: 0x00); |
346 | reg_w_val(gspca_dev, index: 0x81, val: 0xff); |
347 | reg_w_val(gspca_dev, index: 0x80, val: 0x20); |
348 | reg_w_val(gspca_dev, index: 0x03, val: 0x01); |
349 | reg_w_val(gspca_dev, index: 0x03, val: 0x00); |
350 | reg_w_val(gspca_dev, index: 0x03, val: 0x08); |
351 | /********************************************/ |
352 | |
353 | /* reg_r(gspca_dev, ET_I2C_BASE, 1); |
354 | always 0x40 as the pas106 ??? */ |
355 | /* set the sensor */ |
356 | if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) |
357 | value = 0x04; /* 320 */ |
358 | else /* 640 */ |
359 | value = 0x1e; /* 0x17 * setting PixelClock |
360 | * 0x03 mean 24/(3+1) = 6 Mhz |
361 | * 0x05 -> 24/(5+1) = 4 Mhz |
362 | * 0x0b -> 24/(11+1) = 2 Mhz |
363 | * 0x17 -> 24/(23+1) = 1 Mhz |
364 | */ |
365 | reg_w_val(gspca_dev, ET_PXL_CLK, val: value); |
366 | /* now set by fifo the FormatLine setting */ |
367 | reg_w(gspca_dev, index: 0x62, buffer: FormLine, len: 6); |
368 | |
369 | /* set exposure times [ 0..0x78] 0->longvalue 0x78->shortvalue */ |
370 | reg_w_val(gspca_dev, index: 0x81, val: 0x47); /* 0x47; */ |
371 | reg_w_val(gspca_dev, index: 0x80, val: 0x40); /* 0x40; */ |
372 | /* Pedro change */ |
373 | /* Brightness change Brith+ decrease value */ |
374 | /* Brigth- increase value */ |
375 | /* original value = 0x70; */ |
376 | reg_w_val(gspca_dev, index: 0x81, val: 0x30); /* 0x20; - set brightness */ |
377 | reg_w_val(gspca_dev, index: 0x80, val: 0x20); /* 0x20; */ |
378 | } |
379 | |
380 | static void setbrightness(struct gspca_dev *gspca_dev, s32 val) |
381 | { |
382 | int i; |
383 | |
384 | for (i = 0; i < 4; i++) |
385 | reg_w_val(gspca_dev, ET_O_RED + i, val); |
386 | } |
387 | |
388 | static void setcontrast(struct gspca_dev *gspca_dev, s32 val) |
389 | { |
390 | __u8 RGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 }; |
391 | |
392 | memset(RGBG, val, sizeof(RGBG) - 2); |
393 | reg_w(gspca_dev, ET_G_RED, buffer: RGBG, len: 6); |
394 | } |
395 | |
396 | static void setcolors(struct gspca_dev *gspca_dev, s32 val) |
397 | { |
398 | struct sd *sd = (struct sd *) gspca_dev; |
399 | __u8 I2cc[] = { 0x05, 0x02, 0x02, 0x05, 0x0d }; |
400 | __u8 i2cflags = 0x01; |
401 | /* __u8 green = 0; */ |
402 | |
403 | I2cc[3] = val; /* red */ |
404 | I2cc[0] = 15 - val; /* blue */ |
405 | /* green = 15 - ((((7*I2cc[0]) >> 2 ) + I2cc[3]) >> 1); */ |
406 | /* I2cc[1] = I2cc[2] = green; */ |
407 | if (sd->sensor == SENSOR_PAS106) { |
408 | i2c_w(gspca_dev, PAS106_REG13, buffer: &i2cflags, len: 1, mode: 3); |
409 | i2c_w(gspca_dev, PAS106_REG9, buffer: I2cc, len: sizeof I2cc, mode: 1); |
410 | } |
411 | } |
412 | |
413 | static s32 getcolors(struct gspca_dev *gspca_dev) |
414 | { |
415 | struct sd *sd = (struct sd *) gspca_dev; |
416 | |
417 | if (sd->sensor == SENSOR_PAS106) { |
418 | /* i2c_r(gspca_dev, PAS106_REG9); * blue */ |
419 | i2c_r(gspca_dev, PAS106_REG9 + 3); /* red */ |
420 | return gspca_dev->usb_buf[0] & 0x0f; |
421 | } |
422 | return 0; |
423 | } |
424 | |
425 | static void setautogain(struct gspca_dev *gspca_dev) |
426 | { |
427 | struct sd *sd = (struct sd *) gspca_dev; |
428 | |
429 | if (sd->autogain) |
430 | sd->ag_cnt = AG_CNT_START; |
431 | else |
432 | sd->ag_cnt = -1; |
433 | } |
434 | |
435 | static void Et_init1(struct gspca_dev *gspca_dev) |
436 | { |
437 | __u8 value; |
438 | /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0x22, 0xac, 0x00, 0x01, 0x00}; */ |
439 | __u8 I2c0[] = { 0x0a, 0x12, 0x05, 0x6d, 0xcd, 0x00, 0x01, 0x00 }; |
440 | /* try 1/120 0x6d 0xcd 0x40 */ |
441 | /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0xfe, 0xfe, 0xc0, 0x01, 0x00}; |
442 | * 1/60000 hmm ?? */ |
443 | |
444 | gspca_dbg(gspca_dev, D_STREAM, "Open Init1 ET\n\n" ); |
445 | reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, val: 7); |
446 | reg_r(gspca_dev, ET_GPIO_IN, len: 1); |
447 | reg_w_val(gspca_dev, ET_RESET_ALL, val: 1); |
448 | reg_w_val(gspca_dev, ET_RESET_ALL, val: 0); |
449 | reg_w_val(gspca_dev, ET_ClCK, val: 0x10); |
450 | reg_w_val(gspca_dev, ET_CTRL, val: 0x19); |
451 | /* compression et subsampling */ |
452 | if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) |
453 | value = ET_COMP_VAL1; |
454 | else |
455 | value = ET_COMP_VAL0; |
456 | gspca_dbg(gspca_dev, D_STREAM, "Open mode %d Compression %d\n" , |
457 | gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv, |
458 | value); |
459 | reg_w_val(gspca_dev, ET_COMP, val: value); |
460 | reg_w_val(gspca_dev, ET_MAXQt, val: 0x1d); |
461 | reg_w_val(gspca_dev, ET_MINQt, val: 0x02); |
462 | /* undocumented registers */ |
463 | reg_w_val(gspca_dev, ET_REG1d, val: 0xff); |
464 | reg_w_val(gspca_dev, ET_REG1e, val: 0xff); |
465 | reg_w_val(gspca_dev, ET_REG1f, val: 0xff); |
466 | reg_w_val(gspca_dev, ET_REG20, val: 0x35); |
467 | reg_w_val(gspca_dev, ET_REG21, val: 0x01); |
468 | reg_w_val(gspca_dev, ET_REG22, val: 0x00); |
469 | reg_w_val(gspca_dev, ET_REG23, val: 0xf7); |
470 | reg_w_val(gspca_dev, ET_REG24, val: 0xff); |
471 | reg_w_val(gspca_dev, ET_REG25, val: 0x07); |
472 | /* colors setting */ |
473 | reg_w_val(gspca_dev, ET_G_RED, val: 0x80); |
474 | reg_w_val(gspca_dev, ET_G_GREEN1, val: 0x80); |
475 | reg_w_val(gspca_dev, ET_G_BLUE, val: 0x80); |
476 | reg_w_val(gspca_dev, ET_G_GREEN2, val: 0x80); |
477 | reg_w_val(gspca_dev, ET_G_GR_H, val: 0x00); |
478 | reg_w_val(gspca_dev, ET_G_GB_H, val: 0x00); |
479 | /* Window control registers */ |
480 | reg_w_val(gspca_dev, ET_SYNCHRO, val: 0xf0); |
481 | reg_w_val(gspca_dev, ET_STARTX, val: 0x56); /* 0x56 */ |
482 | reg_w_val(gspca_dev, ET_STARTY, val: 0x05); /* 0x04 */ |
483 | reg_w_val(gspca_dev, ET_WIDTH_LOW, val: 0x60); |
484 | reg_w_val(gspca_dev, ET_HEIGTH_LOW, val: 0x20); |
485 | reg_w_val(gspca_dev, ET_W_H_HEIGTH, val: 0x50); |
486 | reg_w_val(gspca_dev, ET_REG6e, val: 0x86); |
487 | reg_w_val(gspca_dev, ET_REG6f, val: 0x01); |
488 | reg_w_val(gspca_dev, ET_REG70, val: 0x86); |
489 | reg_w_val(gspca_dev, ET_REG71, val: 0x14); |
490 | reg_w_val(gspca_dev, ET_REG72, val: 0x00); |
491 | /* Clock Pattern registers */ |
492 | reg_w_val(gspca_dev, ET_REG73, val: 0x00); |
493 | reg_w_val(gspca_dev, ET_REG74, val: 0x00); |
494 | reg_w_val(gspca_dev, ET_REG75, val: 0x0a); |
495 | reg_w_val(gspca_dev, ET_I2C_CLK, val: 0x04); |
496 | reg_w_val(gspca_dev, ET_PXL_CLK, val: 0x01); |
497 | /* set the sensor */ |
498 | if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) { |
499 | I2c0[0] = 0x06; |
500 | i2c_w(gspca_dev, PAS106_REG2, buffer: I2c0, len: sizeof I2c0, mode: 1); |
501 | i2c_w(gspca_dev, PAS106_REG9, buffer: I2c2, len: sizeof I2c2, mode: 1); |
502 | value = 0x06; |
503 | i2c_w(gspca_dev, PAS106_REG2, buffer: &value, len: 1, mode: 1); |
504 | i2c_w(gspca_dev, PAS106_REG3, buffer: I2c3, len: sizeof I2c3, mode: 1); |
505 | /* value = 0x1f; */ |
506 | value = 0x04; |
507 | i2c_w(gspca_dev, PAS106_REG0e, buffer: &value, len: 1, mode: 1); |
508 | } else { |
509 | I2c0[0] = 0x0a; |
510 | |
511 | i2c_w(gspca_dev, PAS106_REG2, buffer: I2c0, len: sizeof I2c0, mode: 1); |
512 | i2c_w(gspca_dev, PAS106_REG9, buffer: I2c2, len: sizeof I2c2, mode: 1); |
513 | value = 0x0a; |
514 | i2c_w(gspca_dev, PAS106_REG2, buffer: &value, len: 1, mode: 1); |
515 | i2c_w(gspca_dev, PAS106_REG3, buffer: I2c3, len: sizeof I2c3, mode: 1); |
516 | value = 0x04; |
517 | /* value = 0x10; */ |
518 | i2c_w(gspca_dev, PAS106_REG0e, buffer: &value, len: 1, mode: 1); |
519 | /* bit 2 enable bit 1:2 select 0 1 2 3 |
520 | value = 0x07; * curve 0 * |
521 | i2c_w(gspca_dev, PAS106_REG0f, &value, 1, 1); |
522 | */ |
523 | } |
524 | |
525 | /* value = 0x01; */ |
526 | /* value = 0x22; */ |
527 | /* i2c_w(gspca_dev, PAS106_REG5, &value, 1, 1); */ |
528 | /* magnetude and sign bit for DAC */ |
529 | i2c_w(gspca_dev, PAS106_REG7, buffer: I2c4, len: sizeof I2c4, mode: 1); |
530 | /* now set by fifo the whole colors setting */ |
531 | reg_w(gspca_dev, ET_G_RED, buffer: GainRGBG, len: 6); |
532 | setcolors(gspca_dev, val: getcolors(gspca_dev)); |
533 | } |
534 | |
535 | /* this function is called at probe time */ |
536 | static int sd_config(struct gspca_dev *gspca_dev, |
537 | const struct usb_device_id *id) |
538 | { |
539 | struct sd *sd = (struct sd *) gspca_dev; |
540 | struct cam *cam; |
541 | |
542 | cam = &gspca_dev->cam; |
543 | sd->sensor = id->driver_info; |
544 | if (sd->sensor == SENSOR_PAS106) { |
545 | cam->cam_mode = sif_mode; |
546 | cam->nmodes = ARRAY_SIZE(sif_mode); |
547 | } else { |
548 | cam->cam_mode = vga_mode; |
549 | cam->nmodes = ARRAY_SIZE(vga_mode); |
550 | } |
551 | sd->ag_cnt = -1; |
552 | return 0; |
553 | } |
554 | |
555 | /* this function is called at probe and resume time */ |
556 | static int sd_init(struct gspca_dev *gspca_dev) |
557 | { |
558 | struct sd *sd = (struct sd *) gspca_dev; |
559 | |
560 | if (sd->sensor == SENSOR_PAS106) |
561 | Et_init1(gspca_dev); |
562 | else |
563 | Et_init2(gspca_dev); |
564 | reg_w_val(gspca_dev, ET_RESET_ALL, val: 0x08); |
565 | et_video(gspca_dev, on: 0); /* video off */ |
566 | return 0; |
567 | } |
568 | |
569 | /* -- start the camera -- */ |
570 | static int sd_start(struct gspca_dev *gspca_dev) |
571 | { |
572 | struct sd *sd = (struct sd *) gspca_dev; |
573 | |
574 | if (sd->sensor == SENSOR_PAS106) |
575 | Et_init1(gspca_dev); |
576 | else |
577 | Et_init2(gspca_dev); |
578 | |
579 | setautogain(gspca_dev); |
580 | |
581 | reg_w_val(gspca_dev, ET_RESET_ALL, val: 0x08); |
582 | et_video(gspca_dev, on: 1); /* video on */ |
583 | return 0; |
584 | } |
585 | |
586 | static void sd_stopN(struct gspca_dev *gspca_dev) |
587 | { |
588 | et_video(gspca_dev, on: 0); /* video off */ |
589 | } |
590 | |
591 | static __u8 Et_getgainG(struct gspca_dev *gspca_dev) |
592 | { |
593 | struct sd *sd = (struct sd *) gspca_dev; |
594 | |
595 | if (sd->sensor == SENSOR_PAS106) { |
596 | i2c_r(gspca_dev, PAS106_REG0e); |
597 | gspca_dbg(gspca_dev, D_CONF, "Etoms gain G %d\n" , |
598 | gspca_dev->usb_buf[0]); |
599 | return gspca_dev->usb_buf[0]; |
600 | } |
601 | return 0x1f; |
602 | } |
603 | |
604 | static void Et_setgainG(struct gspca_dev *gspca_dev, __u8 gain) |
605 | { |
606 | struct sd *sd = (struct sd *) gspca_dev; |
607 | |
608 | if (sd->sensor == SENSOR_PAS106) { |
609 | __u8 i2cflags = 0x01; |
610 | |
611 | i2c_w(gspca_dev, PAS106_REG13, buffer: &i2cflags, len: 1, mode: 3); |
612 | i2c_w(gspca_dev, PAS106_REG0e, buffer: &gain, len: 1, mode: 1); |
613 | } |
614 | } |
615 | |
616 | #define BLIMIT(bright) \ |
617 | (u8)((bright > 0x1f) ? 0x1f : ((bright < 4) ? 3 : bright)) |
618 | #define LIMIT(color) \ |
619 | (u8)((color > 0xff) ? 0xff : ((color < 0) ? 0 : color)) |
620 | |
621 | static void do_autogain(struct gspca_dev *gspca_dev) |
622 | { |
623 | struct sd *sd = (struct sd *) gspca_dev; |
624 | __u8 luma; |
625 | __u8 luma_mean = 128; |
626 | __u8 luma_delta = 20; |
627 | __u8 spring = 4; |
628 | int Gbright; |
629 | __u8 r, g, b; |
630 | |
631 | if (sd->ag_cnt < 0) |
632 | return; |
633 | if (--sd->ag_cnt >= 0) |
634 | return; |
635 | sd->ag_cnt = AG_CNT_START; |
636 | |
637 | Gbright = Et_getgainG(gspca_dev); |
638 | reg_r(gspca_dev, ET_LUMA_CENTER, len: 4); |
639 | g = (gspca_dev->usb_buf[0] + gspca_dev->usb_buf[3]) >> 1; |
640 | r = gspca_dev->usb_buf[1]; |
641 | b = gspca_dev->usb_buf[2]; |
642 | r = ((r << 8) - (r << 4) - (r << 3)) >> 10; |
643 | b = ((b << 7) >> 10); |
644 | g = ((g << 9) + (g << 7) + (g << 5)) >> 10; |
645 | luma = LIMIT(r + g + b); |
646 | gspca_dbg(gspca_dev, D_FRAM, "Etoms luma G %d\n" , luma); |
647 | if (luma < luma_mean - luma_delta || luma > luma_mean + luma_delta) { |
648 | Gbright += (luma_mean - luma) >> spring; |
649 | Gbright = BLIMIT(Gbright); |
650 | gspca_dbg(gspca_dev, D_FRAM, "Etoms Gbright %d\n" , Gbright); |
651 | Et_setgainG(gspca_dev, gain: (__u8) Gbright); |
652 | } |
653 | } |
654 | |
655 | #undef BLIMIT |
656 | #undef LIMIT |
657 | |
658 | static void sd_pkt_scan(struct gspca_dev *gspca_dev, |
659 | u8 *data, /* isoc packet */ |
660 | int len) /* iso packet length */ |
661 | { |
662 | int seqframe; |
663 | |
664 | seqframe = data[0] & 0x3f; |
665 | len = (int) (((data[0] & 0xc0) << 2) | data[1]); |
666 | if (seqframe == 0x3f) { |
667 | gspca_dbg(gspca_dev, D_FRAM, |
668 | "header packet found datalength %d !!\n" , len); |
669 | gspca_dbg(gspca_dev, D_FRAM, "G %d R %d G %d B %d" , |
670 | data[2], data[3], data[4], data[5]); |
671 | data += 30; |
672 | /* don't change datalength as the chips provided it */ |
673 | gspca_frame_add(gspca_dev, packet_type: LAST_PACKET, NULL, len: 0); |
674 | gspca_frame_add(gspca_dev, packet_type: FIRST_PACKET, data, len); |
675 | return; |
676 | } |
677 | if (len) { |
678 | data += 8; |
679 | gspca_frame_add(gspca_dev, packet_type: INTER_PACKET, data, len); |
680 | } else { /* Drop Packet */ |
681 | gspca_dev->last_packet_type = DISCARD_PACKET; |
682 | } |
683 | } |
684 | |
685 | static int sd_s_ctrl(struct v4l2_ctrl *ctrl) |
686 | { |
687 | struct gspca_dev *gspca_dev = |
688 | container_of(ctrl->handler, struct gspca_dev, ctrl_handler); |
689 | struct sd *sd = (struct sd *)gspca_dev; |
690 | |
691 | gspca_dev->usb_err = 0; |
692 | |
693 | if (!gspca_dev->streaming) |
694 | return 0; |
695 | |
696 | switch (ctrl->id) { |
697 | case V4L2_CID_BRIGHTNESS: |
698 | setbrightness(gspca_dev, val: ctrl->val); |
699 | break; |
700 | case V4L2_CID_CONTRAST: |
701 | setcontrast(gspca_dev, val: ctrl->val); |
702 | break; |
703 | case V4L2_CID_SATURATION: |
704 | setcolors(gspca_dev, val: ctrl->val); |
705 | break; |
706 | case V4L2_CID_AUTOGAIN: |
707 | sd->autogain = ctrl->val; |
708 | setautogain(gspca_dev); |
709 | break; |
710 | } |
711 | return gspca_dev->usb_err; |
712 | } |
713 | |
714 | static const struct v4l2_ctrl_ops sd_ctrl_ops = { |
715 | .s_ctrl = sd_s_ctrl, |
716 | }; |
717 | |
718 | static int sd_init_controls(struct gspca_dev *gspca_dev) |
719 | { |
720 | struct sd *sd = (struct sd *)gspca_dev; |
721 | struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler; |
722 | |
723 | gspca_dev->vdev.ctrl_handler = hdl; |
724 | v4l2_ctrl_handler_init(hdl, 4); |
725 | v4l2_ctrl_new_std(hdl, ops: &sd_ctrl_ops, |
726 | V4L2_CID_BRIGHTNESS, min: 1, max: 127, step: 1, def: 63); |
727 | v4l2_ctrl_new_std(hdl, ops: &sd_ctrl_ops, |
728 | V4L2_CID_CONTRAST, min: 0, max: 255, step: 1, def: 127); |
729 | if (sd->sensor == SENSOR_PAS106) |
730 | v4l2_ctrl_new_std(hdl, ops: &sd_ctrl_ops, |
731 | V4L2_CID_SATURATION, min: 0, max: 15, step: 1, def: 7); |
732 | v4l2_ctrl_new_std(hdl, ops: &sd_ctrl_ops, |
733 | V4L2_CID_AUTOGAIN, min: 0, max: 1, step: 1, def: 1); |
734 | if (hdl->error) { |
735 | pr_err("Could not initialize controls\n" ); |
736 | return hdl->error; |
737 | } |
738 | return 0; |
739 | } |
740 | |
741 | /* sub-driver description */ |
742 | static const struct sd_desc sd_desc = { |
743 | .name = MODULE_NAME, |
744 | .config = sd_config, |
745 | .init = sd_init, |
746 | .init_controls = sd_init_controls, |
747 | .start = sd_start, |
748 | .stopN = sd_stopN, |
749 | .pkt_scan = sd_pkt_scan, |
750 | .dq_callback = do_autogain, |
751 | }; |
752 | |
753 | /* -- module initialisation -- */ |
754 | static const struct usb_device_id device_table[] = { |
755 | {USB_DEVICE(0x102c, 0x6151), .driver_info = SENSOR_PAS106}, |
756 | {USB_DEVICE(0x102c, 0x6251), .driver_info = SENSOR_TAS5130CXX}, |
757 | {} |
758 | }; |
759 | |
760 | MODULE_DEVICE_TABLE(usb, device_table); |
761 | |
762 | /* -- device connect -- */ |
763 | static int sd_probe(struct usb_interface *intf, |
764 | const struct usb_device_id *id) |
765 | { |
766 | return gspca_dev_probe(intf, id, sd_desc: &sd_desc, dev_size: sizeof(struct sd), |
767 | THIS_MODULE); |
768 | } |
769 | |
770 | static struct usb_driver sd_driver = { |
771 | .name = MODULE_NAME, |
772 | .id_table = device_table, |
773 | .probe = sd_probe, |
774 | .disconnect = gspca_disconnect, |
775 | #ifdef CONFIG_PM |
776 | .suspend = gspca_suspend, |
777 | .resume = gspca_resume, |
778 | .reset_resume = gspca_resume, |
779 | #endif |
780 | }; |
781 | |
782 | module_usb_driver(sd_driver); |
783 | |