1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * |
4 | * Copyright (C) 2007 Michael Krufky <mkrufky@linuxtv.org> |
5 | */ |
6 | |
7 | #ifndef _PVRUSB2_FX2_CMD_H_ |
8 | #define _PVRUSB2_FX2_CMD_H_ |
9 | |
10 | #define FX2CMD_MEM_WRITE_DWORD 0x01u |
11 | #define FX2CMD_MEM_READ_DWORD 0x02u |
12 | |
13 | #define FX2CMD_HCW_ZILOG_RESET 0x10u /* 1=reset 0=release */ |
14 | |
15 | #define FX2CMD_MEM_READ_64BYTES 0x28u |
16 | |
17 | #define FX2CMD_REG_WRITE 0x04u |
18 | #define FX2CMD_REG_READ 0x05u |
19 | #define FX2CMD_MEMSEL 0x06u |
20 | |
21 | #define FX2CMD_I2C_WRITE 0x08u |
22 | #define FX2CMD_I2C_READ 0x09u |
23 | |
24 | #define FX2CMD_GET_USB_SPEED 0x0bu |
25 | |
26 | #define FX2CMD_STREAMING_ON 0x36u |
27 | #define FX2CMD_STREAMING_OFF 0x37u |
28 | |
29 | #define FX2CMD_FWPOST1 0x52u |
30 | |
31 | /* These 2 only exist on Model 160xxx */ |
32 | #define FX2CMD_HCW_DEMOD_RESET_PIN 0xd4u |
33 | #define FX2CMD_HCW_MAKO_SLEEP_PIN 0xd5u |
34 | |
35 | #define FX2CMD_POWER_OFF 0xdcu |
36 | #define FX2CMD_POWER_ON 0xdeu |
37 | |
38 | #define FX2CMD_DEEP_RESET 0xddu |
39 | |
40 | #define FX2CMD_GET_EEPROM_ADDR 0xebu |
41 | #define FX2CMD_GET_IR_CODE 0xecu |
42 | |
43 | #define FX2CMD_HCW_DEMOD_RESETIN 0xf0u |
44 | #define FX2CMD_HCW_DTV_STREAMING_ON 0xf1u |
45 | #define FX2CMD_HCW_DTV_STREAMING_OFF 0xf2u |
46 | |
47 | #define FX2CMD_ONAIR_DTV_STREAMING_ON 0xa0u |
48 | #define FX2CMD_ONAIR_DTV_STREAMING_OFF 0xa1u |
49 | #define FX2CMD_ONAIR_DTV_POWER_ON 0xa2u |
50 | #define FX2CMD_ONAIR_DTV_POWER_OFF 0xa3u |
51 | |
52 | #endif /* _PVRUSB2_FX2_CMD_H_ */ |
53 | |