1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /***************************************************************************** |
3 | * * |
4 | * File: cpl5_cmd.h * |
5 | * $Revision: 1.6 $ * |
6 | * $Date: 2005/06/21 18:29:47 $ * |
7 | * Description: * |
8 | * part of the Chelsio 10Gb Ethernet Driver. * |
9 | * * |
10 | * * |
11 | * http://www.chelsio.com * |
12 | * * |
13 | * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. * |
14 | * All rights reserved. * |
15 | * * |
16 | * Maintainers: maintainers@chelsio.com * |
17 | * * |
18 | * Authors: Dimitrios Michailidis <dm@chelsio.com> * |
19 | * Tina Yang <tainay@chelsio.com> * |
20 | * Felix Marti <felix@chelsio.com> * |
21 | * Scott Bardone <sbardone@chelsio.com> * |
22 | * Kurt Ottaway <kottaway@chelsio.com> * |
23 | * Frank DiMambro <frank@chelsio.com> * |
24 | * * |
25 | * History: * |
26 | * * |
27 | ****************************************************************************/ |
28 | |
29 | #ifndef _CXGB_CPL5_CMD_H_ |
30 | #define _CXGB_CPL5_CMD_H_ |
31 | |
32 | #include <asm/byteorder.h> |
33 | |
34 | #if !defined(__LITTLE_ENDIAN_BITFIELD) && !defined(__BIG_ENDIAN_BITFIELD) |
35 | #error "Adjust your <asm/byteorder.h> defines" |
36 | #endif |
37 | |
38 | enum CPL_opcode { |
39 | CPL_PASS_OPEN_REQ = 0x1, |
40 | CPL_PASS_OPEN_RPL = 0x2, |
41 | CPL_PASS_ESTABLISH = 0x3, |
42 | CPL_PASS_ACCEPT_REQ = 0xE, |
43 | CPL_PASS_ACCEPT_RPL = 0x4, |
44 | CPL_ACT_OPEN_REQ = 0x5, |
45 | CPL_ACT_OPEN_RPL = 0x6, |
46 | CPL_CLOSE_CON_REQ = 0x7, |
47 | CPL_CLOSE_CON_RPL = 0x8, |
48 | CPL_CLOSE_LISTSRV_REQ = 0x9, |
49 | CPL_CLOSE_LISTSRV_RPL = 0xA, |
50 | CPL_ABORT_REQ = 0xB, |
51 | CPL_ABORT_RPL = 0xC, |
52 | CPL_PEER_CLOSE = 0xD, |
53 | CPL_ACT_ESTABLISH = 0x17, |
54 | |
55 | CPL_GET_TCB = 0x24, |
56 | CPL_GET_TCB_RPL = 0x25, |
57 | CPL_SET_TCB = 0x26, |
58 | CPL_SET_TCB_FIELD = 0x27, |
59 | CPL_SET_TCB_RPL = 0x28, |
60 | CPL_PCMD = 0x29, |
61 | |
62 | CPL_PCMD_READ = 0x31, |
63 | CPL_PCMD_READ_RPL = 0x32, |
64 | |
65 | |
66 | CPL_RX_DATA = 0xA0, |
67 | CPL_RX_DATA_DDP = 0xA1, |
68 | CPL_RX_DATA_ACK = 0xA3, |
69 | CPL_RX_PKT = 0xAD, |
70 | CPL_RX_ISCSI_HDR = 0xAF, |
71 | CPL_TX_DATA_ACK = 0xB0, |
72 | CPL_TX_DATA = 0xB1, |
73 | CPL_TX_PKT = 0xB2, |
74 | CPL_TX_PKT_LSO = 0xB6, |
75 | |
76 | CPL_RTE_DELETE_REQ = 0xC0, |
77 | CPL_RTE_DELETE_RPL = 0xC1, |
78 | CPL_RTE_WRITE_REQ = 0xC2, |
79 | CPL_RTE_WRITE_RPL = 0xD3, |
80 | CPL_RTE_READ_REQ = 0xC3, |
81 | CPL_RTE_READ_RPL = 0xC4, |
82 | CPL_L2T_WRITE_REQ = 0xC5, |
83 | CPL_L2T_WRITE_RPL = 0xD4, |
84 | CPL_L2T_READ_REQ = 0xC6, |
85 | CPL_L2T_READ_RPL = 0xC7, |
86 | CPL_SMT_WRITE_REQ = 0xC8, |
87 | CPL_SMT_WRITE_RPL = 0xD5, |
88 | CPL_SMT_READ_REQ = 0xC9, |
89 | CPL_SMT_READ_RPL = 0xCA, |
90 | CPL_ARP_MISS_REQ = 0xCD, |
91 | CPL_ARP_MISS_RPL = 0xCE, |
92 | CPL_MIGRATE_C2T_REQ = 0xDC, |
93 | CPL_MIGRATE_C2T_RPL = 0xDD, |
94 | CPL_ERROR = 0xD7, |
95 | |
96 | /* internal: driver -> TOM */ |
97 | CPL_MSS_CHANGE = 0xE1 |
98 | }; |
99 | |
100 | #define NUM_CPL_CMDS 256 |
101 | |
102 | enum CPL_error { |
103 | CPL_ERR_NONE = 0, |
104 | CPL_ERR_TCAM_PARITY = 1, |
105 | CPL_ERR_TCAM_FULL = 3, |
106 | CPL_ERR_CONN_RESET = 20, |
107 | CPL_ERR_CONN_EXIST = 22, |
108 | CPL_ERR_ARP_MISS = 23, |
109 | CPL_ERR_BAD_SYN = 24, |
110 | CPL_ERR_CONN_TIMEDOUT = 30, |
111 | CPL_ERR_XMIT_TIMEDOUT = 31, |
112 | CPL_ERR_PERSIST_TIMEDOUT = 32, |
113 | CPL_ERR_FINWAIT2_TIMEDOUT = 33, |
114 | CPL_ERR_KEEPALIVE_TIMEDOUT = 34, |
115 | CPL_ERR_ABORT_FAILED = 42, |
116 | CPL_ERR_GENERAL = 99 |
117 | }; |
118 | |
119 | enum { |
120 | CPL_CONN_POLICY_AUTO = 0, |
121 | CPL_CONN_POLICY_ASK = 1, |
122 | CPL_CONN_POLICY_DENY = 3 |
123 | }; |
124 | |
125 | enum { |
126 | ULP_MODE_NONE = 0, |
127 | ULP_MODE_TCPDDP = 1, |
128 | ULP_MODE_ISCSI = 2, |
129 | ULP_MODE_IWARP = 3, |
130 | ULP_MODE_SSL = 4 |
131 | }; |
132 | |
133 | enum { |
134 | CPL_PASS_OPEN_ACCEPT, |
135 | CPL_PASS_OPEN_REJECT |
136 | }; |
137 | |
138 | enum { |
139 | CPL_ABORT_SEND_RST = 0, |
140 | CPL_ABORT_NO_RST, |
141 | CPL_ABORT_POST_CLOSE_REQ = 2 |
142 | }; |
143 | |
144 | enum { // TX_PKT_LSO ethernet types |
145 | CPL_ETH_II, |
146 | CPL_ETH_II_VLAN, |
147 | CPL_ETH_802_3, |
148 | CPL_ETH_802_3_VLAN |
149 | }; |
150 | |
151 | union opcode_tid { |
152 | u32 opcode_tid; |
153 | u8 opcode; |
154 | }; |
155 | |
156 | #define S_OPCODE 24 |
157 | #define V_OPCODE(x) ((x) << S_OPCODE) |
158 | #define G_OPCODE(x) (((x) >> S_OPCODE) & 0xFF) |
159 | #define G_TID(x) ((x) & 0xFFFFFF) |
160 | |
161 | /* tid is assumed to be 24-bits */ |
162 | #define MK_OPCODE_TID(opcode, tid) (V_OPCODE(opcode) | (tid)) |
163 | |
164 | #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid) |
165 | |
166 | /* extract the TID from a CPL command */ |
167 | #define GET_TID(cmd) (G_TID(ntohl(OPCODE_TID(cmd)))) |
168 | |
169 | struct tcp_options { |
170 | u16 mss; |
171 | u8 wsf; |
172 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
173 | u8 rsvd:4; |
174 | u8 ecn:1; |
175 | u8 sack:1; |
176 | u8 tstamp:1; |
177 | #else |
178 | u8 tstamp:1; |
179 | u8 sack:1; |
180 | u8 ecn:1; |
181 | u8 rsvd:4; |
182 | #endif |
183 | }; |
184 | |
185 | struct cpl_pass_open_req { |
186 | union opcode_tid ot; |
187 | u16 local_port; |
188 | u16 peer_port; |
189 | u32 local_ip; |
190 | u32 peer_ip; |
191 | u32 opt0h; |
192 | u32 opt0l; |
193 | u32 peer_netmask; |
194 | u32 opt1; |
195 | }; |
196 | |
197 | struct cpl_pass_open_rpl { |
198 | union opcode_tid ot; |
199 | u16 local_port; |
200 | u16 peer_port; |
201 | u32 local_ip; |
202 | u32 peer_ip; |
203 | u8 resvd[7]; |
204 | u8 status; |
205 | }; |
206 | |
207 | struct cpl_pass_establish { |
208 | union opcode_tid ot; |
209 | u16 local_port; |
210 | u16 peer_port; |
211 | u32 local_ip; |
212 | u32 peer_ip; |
213 | u32 tos_tid; |
214 | u8 l2t_idx; |
215 | u8 rsvd[3]; |
216 | u32 snd_isn; |
217 | u32 rcv_isn; |
218 | }; |
219 | |
220 | struct cpl_pass_accept_req { |
221 | union opcode_tid ot; |
222 | u16 local_port; |
223 | u16 peer_port; |
224 | u32 local_ip; |
225 | u32 peer_ip; |
226 | u32 tos_tid; |
227 | struct tcp_options tcp_options; |
228 | u8 dst_mac[6]; |
229 | u16 vlan_tag; |
230 | u8 src_mac[6]; |
231 | u8 rsvd[2]; |
232 | u32 rcv_isn; |
233 | u32 unknown_tcp_options; |
234 | }; |
235 | |
236 | struct cpl_pass_accept_rpl { |
237 | union opcode_tid ot; |
238 | u32 rsvd0; |
239 | u32 rsvd1; |
240 | u32 peer_ip; |
241 | u32 opt0h; |
242 | union { |
243 | u32 opt0l; |
244 | struct { |
245 | u8 rsvd[3]; |
246 | u8 status; |
247 | }; |
248 | }; |
249 | }; |
250 | |
251 | struct cpl_act_open_req { |
252 | union opcode_tid ot; |
253 | u16 local_port; |
254 | u16 peer_port; |
255 | u32 local_ip; |
256 | u32 peer_ip; |
257 | u32 opt0h; |
258 | u32 opt0l; |
259 | u32 iff_vlantag; |
260 | u32 rsvd; |
261 | }; |
262 | |
263 | struct cpl_act_open_rpl { |
264 | union opcode_tid ot; |
265 | u16 local_port; |
266 | u16 peer_port; |
267 | u32 local_ip; |
268 | u32 peer_ip; |
269 | u32 new_tid; |
270 | u8 rsvd[3]; |
271 | u8 status; |
272 | }; |
273 | |
274 | struct cpl_act_establish { |
275 | union opcode_tid ot; |
276 | u16 local_port; |
277 | u16 peer_port; |
278 | u32 local_ip; |
279 | u32 peer_ip; |
280 | u32 tos_tid; |
281 | u32 rsvd; |
282 | u32 snd_isn; |
283 | u32 rcv_isn; |
284 | }; |
285 | |
286 | struct cpl_get_tcb { |
287 | union opcode_tid ot; |
288 | u32 rsvd; |
289 | }; |
290 | |
291 | struct cpl_get_tcb_rpl { |
292 | union opcode_tid ot; |
293 | u16 len; |
294 | u8 rsvd; |
295 | u8 status; |
296 | }; |
297 | |
298 | struct cpl_set_tcb { |
299 | union opcode_tid ot; |
300 | u16 len; |
301 | u16 rsvd; |
302 | }; |
303 | |
304 | struct cpl_set_tcb_field { |
305 | union opcode_tid ot; |
306 | u8 rsvd[3]; |
307 | u8 offset; |
308 | u32 mask; |
309 | u32 val; |
310 | }; |
311 | |
312 | struct cpl_set_tcb_rpl { |
313 | union opcode_tid ot; |
314 | u8 rsvd[3]; |
315 | u8 status; |
316 | }; |
317 | |
318 | struct cpl_pcmd { |
319 | union opcode_tid ot; |
320 | u16 dlen_in; |
321 | u16 dlen_out; |
322 | u32 pcmd_parm[2]; |
323 | }; |
324 | |
325 | struct cpl_pcmd_read { |
326 | union opcode_tid ot; |
327 | u32 rsvd1; |
328 | u16 rsvd2; |
329 | u32 addr; |
330 | u16 len; |
331 | }; |
332 | |
333 | struct cpl_pcmd_read_rpl { |
334 | union opcode_tid ot; |
335 | u16 len; |
336 | }; |
337 | |
338 | struct cpl_close_con_req { |
339 | union opcode_tid ot; |
340 | u32 rsvd; |
341 | }; |
342 | |
343 | struct cpl_close_con_rpl { |
344 | union opcode_tid ot; |
345 | u8 rsvd[3]; |
346 | u8 status; |
347 | u32 snd_nxt; |
348 | u32 rcv_nxt; |
349 | }; |
350 | |
351 | struct cpl_close_listserv_req { |
352 | union opcode_tid ot; |
353 | u32 rsvd; |
354 | }; |
355 | |
356 | struct cpl_close_listserv_rpl { |
357 | union opcode_tid ot; |
358 | u8 rsvd[3]; |
359 | u8 status; |
360 | }; |
361 | |
362 | struct cpl_abort_req { |
363 | union opcode_tid ot; |
364 | u32 rsvd0; |
365 | u8 rsvd1; |
366 | u8 cmd; |
367 | u8 rsvd2[6]; |
368 | }; |
369 | |
370 | struct cpl_abort_rpl { |
371 | union opcode_tid ot; |
372 | u32 rsvd0; |
373 | u8 rsvd1; |
374 | u8 status; |
375 | u8 rsvd2[6]; |
376 | }; |
377 | |
378 | struct cpl_peer_close { |
379 | union opcode_tid ot; |
380 | u32 rsvd; |
381 | }; |
382 | |
383 | struct cpl_tx_data { |
384 | union opcode_tid ot; |
385 | u32 len; |
386 | u32 rsvd0; |
387 | u16 urg; |
388 | u16 flags; |
389 | }; |
390 | |
391 | struct cpl_tx_data_ack { |
392 | union opcode_tid ot; |
393 | u32 ack_seq; |
394 | }; |
395 | |
396 | struct cpl_rx_data { |
397 | union opcode_tid ot; |
398 | u32 len; |
399 | u32 seq; |
400 | u16 urg; |
401 | u8 rsvd; |
402 | u8 status; |
403 | }; |
404 | |
405 | struct cpl_rx_data_ack { |
406 | union opcode_tid ot; |
407 | u32 credit; |
408 | }; |
409 | |
410 | struct cpl_rx_data_ddp { |
411 | union opcode_tid ot; |
412 | u32 len; |
413 | u32 seq; |
414 | u32 nxt_seq; |
415 | u32 ulp_crc; |
416 | u16 ddp_status; |
417 | u8 rsvd; |
418 | u8 status; |
419 | }; |
420 | |
421 | /* |
422 | * We want this header's alignment to be no more stringent than 2-byte aligned. |
423 | * All fields are u8 or u16 except for the length. However that field is not |
424 | * used so we break it into 2 16-bit parts to easily meet our alignment needs. |
425 | */ |
426 | struct cpl_tx_pkt { |
427 | u8 opcode; |
428 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
429 | u8 iff:4; |
430 | u8 ip_csum_dis:1; |
431 | u8 l4_csum_dis:1; |
432 | u8 vlan_valid:1; |
433 | u8 rsvd:1; |
434 | #else |
435 | u8 rsvd:1; |
436 | u8 vlan_valid:1; |
437 | u8 l4_csum_dis:1; |
438 | u8 ip_csum_dis:1; |
439 | u8 iff:4; |
440 | #endif |
441 | u16 vlan; |
442 | u16 len_hi; |
443 | u16 len_lo; |
444 | }; |
445 | |
446 | struct cpl_tx_pkt_lso { |
447 | u8 opcode; |
448 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
449 | u8 iff:4; |
450 | u8 ip_csum_dis:1; |
451 | u8 l4_csum_dis:1; |
452 | u8 vlan_valid:1; |
453 | u8 :1; |
454 | #else |
455 | u8 :1; |
456 | u8 vlan_valid:1; |
457 | u8 l4_csum_dis:1; |
458 | u8 ip_csum_dis:1; |
459 | u8 iff:4; |
460 | #endif |
461 | u16 vlan; |
462 | __be32 len; |
463 | |
464 | u8 rsvd[5]; |
465 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
466 | u8 tcp_hdr_words:4; |
467 | u8 ip_hdr_words:4; |
468 | #else |
469 | u8 ip_hdr_words:4; |
470 | u8 tcp_hdr_words:4; |
471 | #endif |
472 | __be16 eth_type_mss; |
473 | }; |
474 | |
475 | struct cpl_rx_pkt { |
476 | u8 opcode; |
477 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
478 | u8 iff:4; |
479 | u8 csum_valid:1; |
480 | u8 bad_pkt:1; |
481 | u8 vlan_valid:1; |
482 | u8 rsvd:1; |
483 | #else |
484 | u8 rsvd:1; |
485 | u8 vlan_valid:1; |
486 | u8 bad_pkt:1; |
487 | u8 csum_valid:1; |
488 | u8 iff:4; |
489 | #endif |
490 | u16 csum; |
491 | u16 vlan; |
492 | u16 len; |
493 | }; |
494 | |
495 | struct cpl_l2t_write_req { |
496 | union opcode_tid ot; |
497 | u32 params; |
498 | u8 rsvd1[2]; |
499 | u8 dst_mac[6]; |
500 | }; |
501 | |
502 | struct cpl_l2t_write_rpl { |
503 | union opcode_tid ot; |
504 | u8 status; |
505 | u8 rsvd[3]; |
506 | }; |
507 | |
508 | struct cpl_l2t_read_req { |
509 | union opcode_tid ot; |
510 | u8 rsvd[3]; |
511 | u8 l2t_idx; |
512 | }; |
513 | |
514 | struct cpl_l2t_read_rpl { |
515 | union opcode_tid ot; |
516 | u32 params; |
517 | u8 rsvd1[2]; |
518 | u8 dst_mac[6]; |
519 | }; |
520 | |
521 | struct cpl_smt_write_req { |
522 | union opcode_tid ot; |
523 | u8 rsvd0; |
524 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
525 | u8 rsvd1:1; |
526 | u8 mtu_idx:3; |
527 | u8 iff:4; |
528 | #else |
529 | u8 iff:4; |
530 | u8 mtu_idx:3; |
531 | u8 rsvd1:1; |
532 | #endif |
533 | u16 rsvd2; |
534 | u16 rsvd3; |
535 | u8 src_mac1[6]; |
536 | u16 rsvd4; |
537 | u8 src_mac0[6]; |
538 | }; |
539 | |
540 | struct cpl_smt_write_rpl { |
541 | union opcode_tid ot; |
542 | u8 status; |
543 | u8 rsvd[3]; |
544 | }; |
545 | |
546 | struct cpl_smt_read_req { |
547 | union opcode_tid ot; |
548 | u8 rsvd0; |
549 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
550 | u8 rsvd1:4; |
551 | u8 iff:4; |
552 | #else |
553 | u8 iff:4; |
554 | u8 rsvd1:4; |
555 | #endif |
556 | u16 rsvd2; |
557 | }; |
558 | |
559 | struct cpl_smt_read_rpl { |
560 | union opcode_tid ot; |
561 | u8 status; |
562 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
563 | u8 rsvd1:1; |
564 | u8 mtu_idx:3; |
565 | u8 rsvd0:4; |
566 | #else |
567 | u8 rsvd0:4; |
568 | u8 mtu_idx:3; |
569 | u8 rsvd1:1; |
570 | #endif |
571 | u16 rsvd2; |
572 | u16 rsvd3; |
573 | u8 src_mac1[6]; |
574 | u16 rsvd4; |
575 | u8 src_mac0[6]; |
576 | }; |
577 | |
578 | struct cpl_rte_delete_req { |
579 | union opcode_tid ot; |
580 | u32 params; |
581 | }; |
582 | |
583 | struct cpl_rte_delete_rpl { |
584 | union opcode_tid ot; |
585 | u8 status; |
586 | u8 rsvd[3]; |
587 | }; |
588 | |
589 | struct cpl_rte_write_req { |
590 | union opcode_tid ot; |
591 | u32 params; |
592 | u32 netmask; |
593 | u32 faddr; |
594 | }; |
595 | |
596 | struct cpl_rte_write_rpl { |
597 | union opcode_tid ot; |
598 | u8 status; |
599 | u8 rsvd[3]; |
600 | }; |
601 | |
602 | struct cpl_rte_read_req { |
603 | union opcode_tid ot; |
604 | u32 params; |
605 | }; |
606 | |
607 | struct cpl_rte_read_rpl { |
608 | union opcode_tid ot; |
609 | u8 status; |
610 | u8 rsvd0[2]; |
611 | u8 l2t_idx; |
612 | #if defined(__LITTLE_ENDIAN_BITFIELD) |
613 | u8 rsvd1:7; |
614 | u8 select:1; |
615 | #else |
616 | u8 select:1; |
617 | u8 rsvd1:7; |
618 | #endif |
619 | u8 rsvd2[3]; |
620 | u32 addr; |
621 | }; |
622 | |
623 | struct cpl_mss_change { |
624 | union opcode_tid ot; |
625 | u32 mss; |
626 | }; |
627 | |
628 | #endif /* _CXGB_CPL5_CMD_H_ */ |
629 | |