1 | // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause |
2 | /* Copyright(c) 2023 Realtek Corporation |
3 | */ |
4 | |
5 | #include <linux/module.h> |
6 | #include <linux/pci.h> |
7 | |
8 | #include "pci.h" |
9 | #include "reg.h" |
10 | #include "rtw8922a.h" |
11 | |
12 | static const struct rtw89_pci_ssid_quirk rtw8922a_pci_ssid_quirks[] = { |
13 | {RTW89_PCI_SSID(PCI_VENDOR_ID_REALTEK, 0x8922, 0x10EC, 0xA891, DELL), |
14 | .bitmap = BIT(RTW89_QUIRK_THERMAL_PROT_120C)}, |
15 | {}, |
16 | }; |
17 | |
18 | static const struct rtw89_pci_info rtw8922a_pci_info = { |
19 | .gen_def = &rtw89_pci_gen_be, |
20 | .txbd_trunc_mode = MAC_AX_BD_TRUNC, |
21 | .rxbd_trunc_mode = MAC_AX_BD_TRUNC, |
22 | .rxbd_mode = MAC_AX_RXBD_PKT, |
23 | .tag_mode = MAC_AX_TAG_MULTI, |
24 | .tx_burst = MAC_AX_TX_BURST_V1_256B, |
25 | .rx_burst = MAC_AX_RX_BURST_V1_128B, |
26 | .wd_dma_idle_intvl = MAC_AX_WD_DMA_INTVL_256NS, |
27 | .wd_dma_act_intvl = MAC_AX_WD_DMA_INTVL_256NS, |
28 | .multi_tag_num = MAC_AX_TAG_NUM_8, |
29 | .lbc_en = MAC_AX_PCIE_ENABLE, |
30 | .lbc_tmr = MAC_AX_LBC_TMR_2MS, |
31 | .autok_en = MAC_AX_PCIE_DISABLE, |
32 | .io_rcy_en = MAC_AX_PCIE_ENABLE, |
33 | .io_rcy_tmr = MAC_AX_IO_RCY_ANA_TMR_DEF, |
34 | .rx_ring_eq_is_full = true, |
35 | .check_rx_tag = true, |
36 | .no_rxbd_fs = true, |
37 | |
38 | .init_cfg_reg = R_BE_HAXI_INIT_CFG1, |
39 | .txhci_en_bit = B_BE_TXDMA_EN, |
40 | .rxhci_en_bit = B_BE_RXDMA_EN, |
41 | .rxbd_mode_bit = B_BE_RXQ_RXBD_MODE_MASK, |
42 | .exp_ctrl_reg = R_BE_HAXI_EXP_CTRL_V1, |
43 | .max_tag_num_mask = B_BE_MAX_TAG_NUM_MASK, |
44 | .rxbd_rwptr_clr_reg = R_BE_RXBD_RWPTR_CLR1_V1, |
45 | .txbd_rwptr_clr2_reg = R_BE_TXBD_RWPTR_CLR1, |
46 | .dma_io_stop = {R_BE_HAXI_INIT_CFG1, B_BE_STOP_AXI_MST}, |
47 | .dma_stop1 = {R_BE_HAXI_DMA_STOP1, B_BE_TX_STOP1_MASK}, |
48 | .dma_stop2 = {0}, |
49 | .dma_busy1 = {R_BE_HAXI_DMA_BUSY1, DMA_BUSY1_CHECK_BE}, |
50 | .dma_busy2_reg = 0, |
51 | .dma_busy3_reg = R_BE_HAXI_DMA_BUSY1, |
52 | |
53 | .rpwm_addr = R_BE_PCIE_HRPWM, |
54 | .cpwm_addr = R_BE_PCIE_CRPWM, |
55 | .mit_addr = R_BE_PCIE_MIT_CH_EN, |
56 | .wp_sel_addr = R_BE_WP_ADDR_H_SEL0_3_V1, |
57 | .tx_dma_ch_mask = 0, |
58 | .bd_idx_addr_low_power = NULL, |
59 | .dma_addr_set = &rtw89_pci_ch_dma_addr_set_be, |
60 | .bd_ram_table = NULL, |
61 | |
62 | .ltr_set = rtw89_pci_ltr_set_v2, |
63 | .fill_txaddr_info = rtw89_pci_fill_txaddr_info_v1, |
64 | .config_intr_mask = rtw89_pci_config_intr_mask_v2, |
65 | .enable_intr = rtw89_pci_enable_intr_v2, |
66 | .disable_intr = rtw89_pci_disable_intr_v2, |
67 | .recognize_intrs = rtw89_pci_recognize_intrs_v2, |
68 | |
69 | .ssid_quirks = rtw8922a_pci_ssid_quirks, |
70 | }; |
71 | |
72 | static const struct rtw89_driver_info rtw89_8922ae_info = { |
73 | .chip = &rtw8922a_chip_info, |
74 | .variant = NULL, |
75 | .quirks = NULL, |
76 | .bus = { |
77 | .pci = &rtw8922a_pci_info, |
78 | }, |
79 | }; |
80 | |
81 | static const struct rtw89_driver_info rtw89_8922ae_vs_info = { |
82 | .chip = &rtw8922a_chip_info, |
83 | .variant = &rtw8922ae_vs_variant, |
84 | .quirks = NULL, |
85 | .bus = { |
86 | .pci = &rtw8922a_pci_info, |
87 | }, |
88 | }; |
89 | |
90 | static const struct pci_device_id rtw89_8922ae_id_table[] = { |
91 | { |
92 | PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8922), |
93 | .driver_data = (kernel_ulong_t)&rtw89_8922ae_info, |
94 | }, |
95 | { |
96 | PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x892B), |
97 | .driver_data = (kernel_ulong_t)&rtw89_8922ae_vs_info, |
98 | }, |
99 | {}, |
100 | }; |
101 | MODULE_DEVICE_TABLE(pci, rtw89_8922ae_id_table); |
102 | |
103 | static struct pci_driver rtw89_8922ae_driver = { |
104 | .name = "rtw89_8922ae" , |
105 | .id_table = rtw89_8922ae_id_table, |
106 | .probe = rtw89_pci_probe, |
107 | .remove = rtw89_pci_remove, |
108 | .driver.pm = &rtw89_pm_ops_be, |
109 | }; |
110 | module_pci_driver(rtw89_8922ae_driver); |
111 | |
112 | MODULE_AUTHOR("Realtek Corporation" ); |
113 | MODULE_DESCRIPTION("Realtek 802.11be wireless 8922AE/8922AE-VS driver" ); |
114 | MODULE_LICENSE("Dual BSD/GPL" ); |
115 | |