| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Copyright (c) 2017, The Linux Foundation. All rights reserved. |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef QCOM_PHY_QMP_PCS_UFS_V2_H_ |
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| 7 | #define QCOM_PHY_QMP_PCS_UFS_V2_H_ |
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| 8 | |
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| 9 | #define QPHY_V2_PCS_UFS_PHY_START 0x000 |
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| 10 | #define QPHY_V2_PCS_UFS_POWER_DOWN_CONTROL 0x004 |
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| 11 | |
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| 12 | #define QPHY_V2_PCS_UFS_TX_LARGE_AMP_DRV_LVL 0x034 |
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| 13 | #define QPHY_V2_PCS_UFS_TX_LARGE_AMP_POST_EMP_LVL 0x038 |
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| 14 | #define QPHY_V2_PCS_UFS_TX_SMALL_AMP_DRV_LVL 0x03c |
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| 15 | #define QPHY_V2_PCS_UFS_TX_SMALL_AMP_POST_EMP_LVL 0x040 |
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| 16 | |
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| 17 | #define QPHY_V2_PCS_UFS_RX_MIN_STALL_NOCONFIG_TIME_CAP 0x0cc |
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| 18 | #define QPHY_V2_PCS_UFS_RX_SYM_RESYNC_CTRL 0x13c |
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| 19 | #define QPHY_V2_PCS_UFS_RX_MIN_HIBERN8_TIME 0x140 |
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| 20 | #define QPHY_V2_PCS_UFS_RX_SIGDET_CTRL2 0x148 |
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| 21 | #define QPHY_V2_PCS_UFS_RX_PWM_GEAR_BAND 0x154 |
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| 22 | |
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| 23 | #define QPHY_V2_PCS_UFS_READY_STATUS 0x168 |
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| 24 | |
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| 25 | #endif |
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| 26 | |
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