| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Copyright (c) 2017, The Linux Foundation. All rights reserved. |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef QCOM_PHY_QMP_PCS_UFS_V3_H_ |
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| 7 | #define QCOM_PHY_QMP_PCS_UFS_V3_H_ |
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| 8 | |
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| 9 | #define QPHY_V3_PCS_UFS_PHY_START 0x000 |
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| 10 | #define QPHY_V3_PCS_UFS_POWER_DOWN_CONTROL 0x004 |
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| 11 | #define QPHY_V3_PCS_UFS_TX_LARGE_AMP_DRV_LVL 0x02c |
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| 12 | #define QPHY_V3_PCS_UFS_TX_SMALL_AMP_DRV_LVL 0x034 |
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| 13 | #define QPHY_V3_PCS_UFS_RX_SYM_RESYNC_CTRL 0x134 |
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| 14 | #define QPHY_V3_PCS_UFS_RX_MIN_HIBERN8_TIME 0x138 |
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| 15 | #define QPHY_V3_PCS_UFS_RX_SIGDET_CTRL1 0x13c |
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| 16 | #define QPHY_V3_PCS_UFS_RX_SIGDET_CTRL2 0x140 |
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| 17 | #define QPHY_V3_PCS_UFS_READY_STATUS 0x160 |
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| 18 | #define QPHY_V3_PCS_UFS_TX_MID_TERM_CTRL1 0x1bc |
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| 19 | #define QPHY_V3_PCS_UFS_MULTI_LANE_CTRL1 0x1c4 |
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| 20 | |
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| 21 | #endif |
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| 22 | |
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