1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* SH7203 Pinmux
4	*
5	* Copyright (C) 2008 Magnus Damm
6	*/
7
8	#include <linux/kernel.h>
9	#include <cpu/sh7203.h>
10
11	#include "sh_pfc.h"
12
13	enum {
14	PINMUX_RESERVED = 0,
15
16	PINMUX_DATA_BEGIN,
17	PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
18	PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
19	PB12_DATA,
20	PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
21	PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
22	PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
23	PC14_DATA, PC13_DATA, PC12_DATA,
24	PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
25	PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
26	PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
27	PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
28	PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
29	PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
30	PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
31	PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
32	PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
33	PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
34	PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
35	PF30_DATA, PF29_DATA, PF28_DATA,
36	PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
37	PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
38	PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
39	PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
40	PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
41	PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
42	PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
43	PINMUX_DATA_END,
44
45	PINMUX_INPUT_BEGIN,
46	FORCE_IN,
47	PA7_IN, PA6_IN, PA5_IN, PA4_IN,
48	PA3_IN, PA2_IN, PA1_IN, PA0_IN,
49	PB11_IN, PB10_IN, PB9_IN, PB8_IN,
50	PC14_IN, PC13_IN, PC12_IN,
51	PC11_IN, PC10_IN, PC9_IN, PC8_IN,
52	PC7_IN, PC6_IN, PC5_IN, PC4_IN,
53	PC3_IN, PC2_IN, PC1_IN, PC0_IN,
54	PD15_IN, PD14_IN, PD13_IN, PD12_IN,
55	PD11_IN, PD10_IN, PD9_IN, PD8_IN,
56	PD7_IN, PD6_IN, PD5_IN, PD4_IN,
57	PD3_IN, PD2_IN, PD1_IN, PD0_IN,
58	PE15_IN, PE14_IN, PE13_IN, PE12_IN,
59	PE11_IN, PE10_IN, PE9_IN, PE8_IN,
60	PE7_IN, PE6_IN, PE5_IN, PE4_IN,
61	PE3_IN, PE2_IN, PE1_IN, PE0_IN,
62	PF30_IN, PF29_IN, PF28_IN,
63	PF27_IN, PF26_IN, PF25_IN, PF24_IN,
64	PF23_IN, PF22_IN, PF21_IN, PF20_IN,
65	PF19_IN, PF18_IN, PF17_IN, PF16_IN,
66	PF15_IN, PF14_IN, PF13_IN, PF12_IN,
67	PF11_IN, PF10_IN, PF9_IN, PF8_IN,
68	PF7_IN, PF6_IN, PF5_IN, PF4_IN,
69	PF3_IN, PF2_IN, PF1_IN, PF0_IN,
70	PINMUX_INPUT_END,
71
72	PINMUX_OUTPUT_BEGIN,
73	FORCE_OUT,
74	PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
75	PC14_OUT, PC13_OUT, PC12_OUT,
76	PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT,
77	PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
78	PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
79	PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
80	PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
81	PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
82	PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
83	PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT,
84	PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT,
85	PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
86	PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
87	PF30_OUT, PF29_OUT, PF28_OUT,
88	PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT,
89	PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
90	PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
91	PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
92	PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
93	PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
94	PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
95	PINMUX_OUTPUT_END,
96
97	PINMUX_FUNCTION_BEGIN,
98	PB11_IOR_IN, PB11_IOR_OUT,
99	PB10_IOR_IN, PB10_IOR_OUT,
100	PB9_IOR_IN, PB9_IOR_OUT,
101	PB8_IOR_IN, PB8_IOR_OUT,
102	PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
103	PB11MD_0, PB11MD_1,
104	PB10MD_0, PB10MD_1,
105	PB9MD_00, PB9MD_01, PB9MD_10,
106	PB8MD_00, PB8MD_01, PB8MD_10,
107	PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
108	PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
109	PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
110	PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
111	PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
112	PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
113	PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
114	PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
115
116	PB12IRQ_00, PB12IRQ_01, PB12IRQ_10,
117
118	PC14MD_0, PC14MD_1,
119	PC13MD_0, PC13MD_1,
120	PC12MD_0, PC12MD_1,
121	PC11MD_00, PC11MD_01, PC11MD_10,
122	PC10MD_00, PC10MD_01, PC10MD_10,
123	PC9MD_0, PC9MD_1,
124	PC8MD_0, PC8MD_1,
125	PC7MD_0, PC7MD_1,
126	PC6MD_0, PC6MD_1,
127	PC5MD_0, PC5MD_1,
128	PC4MD_0, PC4MD_1,
129	PC3MD_0, PC3MD_1,
130	PC2MD_0, PC2MD_1,
131	PC1MD_0, PC1MD_1,
132	PC0MD_00, PC0MD_01, PC0MD_10,
133
134	PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101,
135	PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101,
136	PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101,
137	PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101,
138	PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101,
139	PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101,
140	PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101,
141	PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101,
142	PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101,
143	PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101,
144	PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101,
145	PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101,
146	PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101,
147	PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101,
148	PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101,
149	PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101,
150
151	PE15MD_00, PE15MD_01, PE15MD_11,
152	PE14MD_00, PE14MD_01, PE14MD_11,
153	PE13MD_00, PE13MD_11,
154	PE12MD_00, PE12MD_11,
155	PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100,
156	PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100,
157	PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
158	PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
159	PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100,
160	PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100,
161	PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100,
162	PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100,
163	PE3MD_00, PE3MD_01, PE3MD_11,
164	PE2MD_00, PE2MD_01, PE2MD_11,
165	PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
166	PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100,
167
168	PF30MD_0, PF30MD_1,
169	PF29MD_0, PF29MD_1,
170	PF28MD_0, PF28MD_1,
171	PF27MD_0, PF27MD_1,
172	PF26MD_0, PF26MD_1,
173	PF25MD_0, PF25MD_1,
174	PF24MD_0, PF24MD_1,
175	PF23MD_00, PF23MD_01, PF23MD_10,
176	PF22MD_00, PF22MD_01, PF22MD_10,
177	PF21MD_00, PF21MD_01, PF21MD_10,
178	PF20MD_00, PF20MD_01, PF20MD_10,
179	PF19MD_00, PF19MD_01, PF19MD_10,
180	PF18MD_00, PF18MD_01, PF18MD_10,
181	PF17MD_00, PF17MD_01, PF17MD_10,
182	PF16MD_00, PF16MD_01, PF16MD_10,
183	PF15MD_00, PF15MD_01, PF15MD_10,
184	PF14MD_00, PF14MD_01, PF14MD_10,
185	PF13MD_00, PF13MD_01, PF13MD_10,
186	PF12MD_00, PF12MD_01, PF12MD_10,
187	PF11MD_00, PF11MD_01, PF11MD_10,
188	PF10MD_00, PF10MD_01, PF10MD_10,
189	PF9MD_00, PF9MD_01, PF9MD_10,
190	PF8MD_00, PF8MD_01, PF8MD_10,
191	PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
192	PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
193	PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
194	PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
195	PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
196	PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
197	PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
198	PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
199	PINMUX_FUNCTION_END,
200
201	PINMUX_MARK_BEGIN,
202	PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK,
203	PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK,
204	PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK,
205	PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK,
206	IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK,
207	IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK,
208	IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK,
209	IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK,
210	IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK,
211	IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
212	WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK,
213	UBCTRG_MARK,
214	CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK,
215	CRX0_MARK, CRX0_CRX1_MARK,
216	SDA3_MARK, SCL3_MARK,
217	SDA2_MARK, SCL2_MARK,
218	SDA1_MARK, SCL1_MARK,
219	SDA0_MARK, SCL0_MARK,
220	TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK,
221	DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK,
222	DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK,
223	DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK,
224	ADTRG_PD_MARK, ADTRG_PE_MARK,
225	D31_MARK, D30_MARK, D29_MARK, D28_MARK,
226	D27_MARK, D26_MARK, D25_MARK, D24_MARK,
227	D23_MARK, D22_MARK, D21_MARK, D20_MARK,
228	D19_MARK, D18_MARK, D17_MARK, D16_MARK,
229	A25_MARK, A24_MARK, A23_MARK, A22_MARK,
230	A21_MARK, CS4_MARK, MRES_MARK, BS_MARK,
231	IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK,
232	CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK,
233	RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK,
234	RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK,
235	WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK,
236	WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK,
237	CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK,
238	TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK,
239	TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK,
240	TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK,
241	TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK,
242	TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK,
243	TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK,
244	SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK,
245	SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK,
246	SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK,
247	SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK,
248	TXD0_MARK, RXD0_MARK, SCK0_MARK,
249	TXD1_MARK, RXD1_MARK, SCK1_MARK,
250	TXD2_MARK, RXD2_MARK, SCK2_MARK,
251	RTS3_MARK, CTS3_MARK, TXD3_MARK,
252	RXD3_MARK, SCK3_MARK,
253	AUDIO_CLK_MARK,
254	SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK,
255	SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK,
256	SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK,
257	SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK,
258	FCE_MARK, FRB_MARK,
259	NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
260	NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK,
261	FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK,
262	LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK,
263	LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK,
264	LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
265	LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
266	LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
267	LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
268	PINMUX_MARK_END,
269	};
270
271	static const u16 pinmux_data[] = {
272	/* PA */
273	PINMUX_DATA(PA7_DATA, PA7_IN),
274	PINMUX_DATA(PA6_DATA, PA6_IN),
275	PINMUX_DATA(PA5_DATA, PA5_IN),
276	PINMUX_DATA(PA4_DATA, PA4_IN),
277	PINMUX_DATA(PA3_DATA, PA3_IN),
278	PINMUX_DATA(PA2_DATA, PA2_IN),
279	PINMUX_DATA(PA1_DATA, PA1_IN),
280	PINMUX_DATA(PA0_DATA, PA0_IN),
281
282	/* PB */
283	PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT),
284	PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
285	PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
286	PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
287	PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10),
288	PINMUX_DATA(UBCTRG_MARK, PB12MD_11),
289
290	PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT),
291	PINMUX_DATA(CTX1_MARK, PB11MD_1),
292
293	PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT),
294	PINMUX_DATA(CRX1_MARK, PB10MD_1),
295
296	PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT),
297	PINMUX_DATA(CTX0_MARK, PB9MD_01),
298	PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10),
299
300	PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT),
301	PINMUX_DATA(CRX0_MARK, PB8MD_01),
302	PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10),
303
304	PINMUX_DATA(PB7_DATA, PB7MD_00, FORCE_IN),
305	PINMUX_DATA(SDA3_MARK, PB7MD_01),
306	PINMUX_DATA(PINT7_PB_MARK, PB7MD_10),
307	PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11),
308
309	PINMUX_DATA(PB6_DATA, PB6MD_00, FORCE_IN),
310	PINMUX_DATA(SCL3_MARK, PB6MD_01),
311	PINMUX_DATA(PINT6_PB_MARK, PB6MD_10),
312	PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11),
313
314	PINMUX_DATA(PB5_DATA, PB5MD_00, FORCE_IN),
315	PINMUX_DATA(SDA2_MARK, PB6MD_01),
316	PINMUX_DATA(PINT5_PB_MARK, PB6MD_10),
317	PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11),
318
319	PINMUX_DATA(PB4_DATA, PB4MD_00, FORCE_IN),
320	PINMUX_DATA(SCL2_MARK, PB4MD_01),
321	PINMUX_DATA(PINT4_PB_MARK, PB4MD_10),
322	PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11),
323
324	PINMUX_DATA(PB3_DATA, PB3MD_00, FORCE_IN),
325	PINMUX_DATA(SDA1_MARK, PB3MD_01),
326	PINMUX_DATA(PINT3_PB_MARK, PB3MD_10),
327	PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11),
328
329	PINMUX_DATA(PB2_DATA, PB2MD_00, FORCE_IN),
330	PINMUX_DATA(SCL1_MARK, PB2MD_01),
331	PINMUX_DATA(PINT2_PB_MARK, PB2MD_10),
332	PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11),
333
334	PINMUX_DATA(PB1_DATA, PB1MD_00, FORCE_IN),
335	PINMUX_DATA(SDA0_MARK, PB1MD_01),
336	PINMUX_DATA(PINT1_PB_MARK, PB1MD_10),
337	PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11),
338
339	PINMUX_DATA(PB0_DATA, PB0MD_00, FORCE_IN),
340	PINMUX_DATA(SCL0_MARK, PB0MD_01),
341	PINMUX_DATA(PINT0_PB_MARK, PB0MD_10),
342	PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11),
343
344	/* PC */
345	PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT),
346	PINMUX_DATA(WAIT_MARK, PC14MD_1),
347
348	PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT),
349	PINMUX_DATA(RDWR_MARK, PC13MD_1),
350
351	PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT),
352	PINMUX_DATA(CKE_MARK, PC12MD_1),
353
354	PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT),
355	PINMUX_DATA(CASU_MARK, PC11MD_01),
356	PINMUX_DATA(BREQ_MARK, PC11MD_10),
357
358	PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT),
359	PINMUX_DATA(RASU_MARK, PC10MD_01),
360	PINMUX_DATA(BACK_MARK, PC10MD_10),
361
362	PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT),
363	PINMUX_DATA(CASL_MARK, PC9MD_1),
364
365	PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT),
366	PINMUX_DATA(RASL_MARK, PC8MD_1),
367
368	PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT),
369	PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1),
370
371	PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT),
372	PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1),
373
374	PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT),
375	PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1),
376
377	PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT),
378	PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1),
379
380	PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT),
381	PINMUX_DATA(CS3_MARK, PC3MD_1),
382
383	PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT),
384	PINMUX_DATA(CS2_MARK, PC2MD_1),
385
386	PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT),
387	PINMUX_DATA(A1_MARK, PC1MD_1),
388
389	PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT),
390	PINMUX_DATA(A0_MARK, PC0MD_01),
391	PINMUX_DATA(CS7_MARK, PC0MD_10),
392
393	/* PD */
394	PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT),
395	PINMUX_DATA(D31_MARK, PD15MD_001),
396	PINMUX_DATA(PINT7_PD_MARK, PD15MD_010),
397	PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100),
398	PINMUX_DATA(TIOC4D_MARK, PD15MD_101),
399
400	PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT),
401	PINMUX_DATA(D30_MARK, PD14MD_001),
402	PINMUX_DATA(PINT6_PD_MARK, PD14MD_010),
403	PINMUX_DATA(TIOC4C_MARK, PD14MD_101),
404
405	PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT),
406	PINMUX_DATA(D29_MARK, PD13MD_001),
407	PINMUX_DATA(PINT5_PD_MARK, PD13MD_010),
408	PINMUX_DATA(TEND1_PD_MARK, PD13MD_100),
409	PINMUX_DATA(TIOC4B_MARK, PD13MD_101),
410
411	PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT),
412	PINMUX_DATA(D28_MARK, PD12MD_001),
413	PINMUX_DATA(PINT4_PD_MARK, PD12MD_010),
414	PINMUX_DATA(DACK1_PD_MARK, PD12MD_100),
415	PINMUX_DATA(TIOC4A_MARK, PD12MD_101),
416
417	PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT),
418	PINMUX_DATA(D27_MARK, PD11MD_001),
419	PINMUX_DATA(PINT3_PD_MARK, PD11MD_010),
420	PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100),
421	PINMUX_DATA(TIOC3D_MARK, PD11MD_101),
422
423	PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT),
424	PINMUX_DATA(D26_MARK, PD10MD_001),
425	PINMUX_DATA(PINT2_PD_MARK, PD10MD_010),
426	PINMUX_DATA(TEND0_PD_MARK, PD10MD_100),
427	PINMUX_DATA(TIOC3C_MARK, PD10MD_101),
428
429	PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT),
430	PINMUX_DATA(D25_MARK, PD9MD_001),
431	PINMUX_DATA(PINT1_PD_MARK, PD9MD_010),
432	PINMUX_DATA(DACK0_PD_MARK, PD9MD_100),
433	PINMUX_DATA(TIOC3B_MARK, PD9MD_101),
434
435	PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT),
436	PINMUX_DATA(D24_MARK, PD8MD_001),
437	PINMUX_DATA(PINT0_PD_MARK, PD8MD_010),
438	PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100),
439	PINMUX_DATA(TIOC3A_MARK, PD8MD_101),
440
441	PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT),
442	PINMUX_DATA(D23_MARK, PD7MD_001),
443	PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010),
444	PINMUX_DATA(SCS1_PD_MARK, PD7MD_011),
445	PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100),
446	PINMUX_DATA(TIOC2B_MARK, PD7MD_101),
447
448	PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT),
449	PINMUX_DATA(D22_MARK, PD6MD_001),
450	PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010),
451	PINMUX_DATA(SSO1_PD_MARK, PD6MD_011),
452	PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100),
453	PINMUX_DATA(TIOC2A_MARK, PD6MD_101),
454
455	PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT),
456	PINMUX_DATA(D21_MARK, PD5MD_001),
457	PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010),
458	PINMUX_DATA(SSI1_PD_MARK, PD5MD_011),
459	PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100),
460	PINMUX_DATA(TIOC1B_MARK, PD5MD_101),
461
462	PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT),
463	PINMUX_DATA(D20_MARK, PD4MD_001),
464	PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010),
465	PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011),
466	PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100),
467	PINMUX_DATA(TIOC1A_MARK, PD4MD_101),
468
469	PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT),
470	PINMUX_DATA(D19_MARK, PD3MD_001),
471	PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010),
472	PINMUX_DATA(SCS0_PD_MARK, PD3MD_011),
473	PINMUX_DATA(DACK3_MARK, PD3MD_100),
474	PINMUX_DATA(TIOC0D_MARK, PD3MD_101),
475
476	PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT),
477	PINMUX_DATA(D18_MARK, PD2MD_001),
478	PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010),
479	PINMUX_DATA(SSO0_PD_MARK, PD2MD_011),
480	PINMUX_DATA(DREQ3_MARK, PD2MD_100),
481	PINMUX_DATA(TIOC0C_MARK, PD2MD_101),
482
483	PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT),
484	PINMUX_DATA(D17_MARK, PD1MD_001),
485	PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010),
486	PINMUX_DATA(SSI0_PD_MARK, PD1MD_011),
487	PINMUX_DATA(DACK2_MARK, PD1MD_100),
488	PINMUX_DATA(TIOC0B_MARK, PD1MD_101),
489
490	PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT),
491	PINMUX_DATA(D16_MARK, PD0MD_001),
492	PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010),
493	PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011),
494	PINMUX_DATA(DREQ2_MARK, PD0MD_100),
495	PINMUX_DATA(TIOC0A_MARK, PD0MD_101),
496
497	/* PE */
498	PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT),
499	PINMUX_DATA(IOIS16_MARK, PE15MD_01),
500	PINMUX_DATA(RTS3_MARK, PE15MD_11),
501
502	PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT),
503	PINMUX_DATA(CS1_MARK, PE14MD_01),
504	PINMUX_DATA(CTS3_MARK, PE14MD_11),
505
506	PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT),
507	PINMUX_DATA(TXD3_MARK, PE13MD_11),
508
509	PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT),
510	PINMUX_DATA(RXD3_MARK, PE12MD_11),
511
512	PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT),
513	PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001),
514	PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010),
515	PINMUX_DATA(TEND1_PE_MARK, PE11MD_100),
516
517	PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT),
518	PINMUX_DATA(CE2B_MARK, PE10MD_001),
519	PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010),
520	PINMUX_DATA(TEND0_PE_MARK, PE10MD_100),
521
522	PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT),
523	PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01),
524	PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10),
525	PINMUX_DATA(SCK3_MARK, PE9MD_11),
526
527	PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT),
528	PINMUX_DATA(CE2A_MARK, PE8MD_01),
529	PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10),
530	PINMUX_DATA(SCK2_MARK, PE8MD_11),
531
532	PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT),
533	PINMUX_DATA(FRAME_MARK, PE7MD_001),
534	PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010),
535	PINMUX_DATA(TXD2_MARK, PE7MD_011),
536	PINMUX_DATA(DACK1_PE_MARK, PE7MD_100),
537
538	PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT),
539	PINMUX_DATA(A25_MARK, PE6MD_001),
540	PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010),
541	PINMUX_DATA(RXD2_MARK, PE6MD_011),
542	PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100),
543
544	PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT),
545	PINMUX_DATA(A24_MARK, PE5MD_001),
546	PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010),
547	PINMUX_DATA(TXD1_MARK, PE5MD_011),
548	PINMUX_DATA(DACK0_PE_MARK, PE5MD_100),
549
550	PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT),
551	PINMUX_DATA(A23_MARK, PE4MD_001),
552	PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010),
553	PINMUX_DATA(RXD1_MARK, PE4MD_011),
554	PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100),
555
556	PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT),
557	PINMUX_DATA(A22_MARK, PE3MD_01),
558	PINMUX_DATA(SCK1_MARK, PE3MD_11),
559
560	PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT),
561	PINMUX_DATA(A21_MARK, PE2MD_01),
562	PINMUX_DATA(SCK0_MARK, PE2MD_11),
563
564	PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT),
565	PINMUX_DATA(CS4_MARK, PE1MD_01),
566	PINMUX_DATA(MRES_MARK, PE1MD_10),
567	PINMUX_DATA(TXD0_MARK, PE1MD_11),
568
569	PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT),
570	PINMUX_DATA(BS_MARK, PE0MD_001),
571	PINMUX_DATA(RXD0_MARK, PE0MD_011),
572	PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100),
573
574	/* PF */
575	PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT),
576	PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1),
577
578	PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT),
579	PINMUX_DATA(SSIDATA3_MARK, PF29MD_1),
580
581	PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT),
582	PINMUX_DATA(SSIWS3_MARK, PF28MD_1),
583
584	PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT),
585	PINMUX_DATA(SSISCK3_MARK, PF27MD_1),
586
587	PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT),
588	PINMUX_DATA(SSIDATA2_MARK, PF26MD_1),
589
590	PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT),
591	PINMUX_DATA(SSIWS2_MARK, PF25MD_1),
592
593	PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT),
594	PINMUX_DATA(SSISCK2_MARK, PF24MD_1),
595
596	PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT),
597	PINMUX_DATA(SSIDATA1_MARK, PF23MD_01),
598	PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10),
599
600	PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT),
601	PINMUX_DATA(SSIWS1_MARK, PF22MD_01),
602	PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10),
603
604	PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT),
605	PINMUX_DATA(SSISCK1_MARK, PF21MD_01),
606	PINMUX_DATA(LCD_CLK_MARK, PF21MD_10),
607
608	PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT),
609	PINMUX_DATA(SSIDATA0_MARK, PF20MD_01),
610	PINMUX_DATA(LCD_FLM_MARK, PF20MD_10),
611
612	PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT),
613	PINMUX_DATA(SSIWS0_MARK, PF19MD_01),
614	PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10),
615
616	PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT),
617	PINMUX_DATA(SSISCK0_MARK, PF18MD_01),
618	PINMUX_DATA(LCD_CL2_MARK, PF18MD_10),
619
620	PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT),
621	PINMUX_DATA(FCE_MARK, PF17MD_01),
622	PINMUX_DATA(LCD_CL1_MARK, PF17MD_10),
623
624	PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT),
625	PINMUX_DATA(FRB_MARK, PF16MD_01),
626	PINMUX_DATA(LCD_DON_MARK, PF16MD_10),
627
628	PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT),
629	PINMUX_DATA(NAF7_MARK, PF15MD_01),
630	PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10),
631
632	PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT),
633	PINMUX_DATA(NAF6_MARK, PF14MD_01),
634	PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10),
635
636	PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT),
637	PINMUX_DATA(NAF5_MARK, PF13MD_01),
638	PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10),
639
640	PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT),
641	PINMUX_DATA(NAF4_MARK, PF12MD_01),
642	PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10),
643
644	PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT),
645	PINMUX_DATA(NAF3_MARK, PF11MD_01),
646	PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10),
647
648	PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT),
649	PINMUX_DATA(NAF2_MARK, PF10MD_01),
650	PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10),
651
652	PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT),
653	PINMUX_DATA(NAF1_MARK, PF9MD_01),
654	PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10),
655
656	PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT),
657	PINMUX_DATA(NAF0_MARK, PF8MD_01),
658	PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10),
659
660	PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT),
661	PINMUX_DATA(FSC_MARK, PF7MD_01),
662	PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10),
663	PINMUX_DATA(SCS1_PF_MARK, PF7MD_11),
664
665	PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT),
666	PINMUX_DATA(FOE_MARK, PF6MD_01),
667	PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10),
668	PINMUX_DATA(SSO1_PF_MARK, PF6MD_11),
669
670	PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT),
671	PINMUX_DATA(FCDE_MARK, PF5MD_01),
672	PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10),
673	PINMUX_DATA(SSI1_PF_MARK, PF5MD_11),
674
675	PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT),
676	PINMUX_DATA(FWE_MARK, PF4MD_01),
677	PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10),
678	PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11),
679
680	PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT),
681	PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01),
682	PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10),
683	PINMUX_DATA(SCS0_PF_MARK, PF3MD_11),
684
685	PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT),
686	PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01),
687	PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10),
688	PINMUX_DATA(SSO0_PF_MARK, PF2MD_11),
689
690	PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT),
691	PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01),
692	PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10),
693	PINMUX_DATA(SSI0_PF_MARK, PF1MD_11),
694
695	PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT),
696	PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01),
697	PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10),
698	PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
699	};
700
701	static const struct sh_pfc_pin pinmux_pins[] = {
702	/* PA */
703	PINMUX_GPIO(PA7),
704	PINMUX_GPIO(PA6),
705	PINMUX_GPIO(PA5),
706	PINMUX_GPIO(PA4),
707	PINMUX_GPIO(PA3),
708	PINMUX_GPIO(PA2),
709	PINMUX_GPIO(PA1),
710	PINMUX_GPIO(PA0),
711
712	/* PB */
713	PINMUX_GPIO(PB12),
714	PINMUX_GPIO(PB11),
715	PINMUX_GPIO(PB10),
716	PINMUX_GPIO(PB9),
717	PINMUX_GPIO(PB8),
718	PINMUX_GPIO(PB7),
719	PINMUX_GPIO(PB6),
720	PINMUX_GPIO(PB5),
721	PINMUX_GPIO(PB4),
722	PINMUX_GPIO(PB3),
723	PINMUX_GPIO(PB2),
724	PINMUX_GPIO(PB1),
725	PINMUX_GPIO(PB0),
726
727	/* PC */
728	PINMUX_GPIO(PC14),
729	PINMUX_GPIO(PC13),
730	PINMUX_GPIO(PC12),
731	PINMUX_GPIO(PC11),
732	PINMUX_GPIO(PC10),
733	PINMUX_GPIO(PC9),
734	PINMUX_GPIO(PC8),
735	PINMUX_GPIO(PC7),
736	PINMUX_GPIO(PC6),
737	PINMUX_GPIO(PC5),
738	PINMUX_GPIO(PC4),
739	PINMUX_GPIO(PC3),
740	PINMUX_GPIO(PC2),
741	PINMUX_GPIO(PC1),
742	PINMUX_GPIO(PC0),
743
744	/* PD */
745	PINMUX_GPIO(PD15),
746	PINMUX_GPIO(PD14),
747	PINMUX_GPIO(PD13),
748	PINMUX_GPIO(PD12),
749	PINMUX_GPIO(PD11),
750	PINMUX_GPIO(PD10),
751	PINMUX_GPIO(PD9),
752	PINMUX_GPIO(PD8),
753	PINMUX_GPIO(PD7),
754	PINMUX_GPIO(PD6),
755	PINMUX_GPIO(PD5),
756	PINMUX_GPIO(PD4),
757	PINMUX_GPIO(PD3),
758	PINMUX_GPIO(PD2),
759	PINMUX_GPIO(PD1),
760	PINMUX_GPIO(PD0),
761
762	/* PE */
763	PINMUX_GPIO(PE15),
764	PINMUX_GPIO(PE14),
765	PINMUX_GPIO(PE13),
766	PINMUX_GPIO(PE12),
767	PINMUX_GPIO(PE11),
768	PINMUX_GPIO(PE10),
769	PINMUX_GPIO(PE9),
770	PINMUX_GPIO(PE8),
771	PINMUX_GPIO(PE7),
772	PINMUX_GPIO(PE6),
773	PINMUX_GPIO(PE5),
774	PINMUX_GPIO(PE4),
775	PINMUX_GPIO(PE3),
776	PINMUX_GPIO(PE2),
777	PINMUX_GPIO(PE1),
778	PINMUX_GPIO(PE0),
779
780	/* PF */
781	PINMUX_GPIO(PF30),
782	PINMUX_GPIO(PF29),
783	PINMUX_GPIO(PF28),
784	PINMUX_GPIO(PF27),
785	PINMUX_GPIO(PF26),
786	PINMUX_GPIO(PF25),
787	PINMUX_GPIO(PF24),
788	PINMUX_GPIO(PF23),
789	PINMUX_GPIO(PF22),
790	PINMUX_GPIO(PF21),
791	PINMUX_GPIO(PF20),
792	PINMUX_GPIO(PF19),
793	PINMUX_GPIO(PF18),
794	PINMUX_GPIO(PF17),
795	PINMUX_GPIO(PF16),
796	PINMUX_GPIO(PF15),
797	PINMUX_GPIO(PF14),
798	PINMUX_GPIO(PF13),
799	PINMUX_GPIO(PF12),
800	PINMUX_GPIO(PF11),
801	PINMUX_GPIO(PF10),
802	PINMUX_GPIO(PF9),
803	PINMUX_GPIO(PF8),
804	PINMUX_GPIO(PF7),
805	PINMUX_GPIO(PF6),
806	PINMUX_GPIO(PF5),
807	PINMUX_GPIO(PF4),
808	PINMUX_GPIO(PF3),
809	PINMUX_GPIO(PF2),
810	PINMUX_GPIO(PF1),
811	PINMUX_GPIO(PF0),
812	};
813
814	#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
815
816	static const struct pinmux_func pinmux_func_gpios[] = {
817	/* INTC */
818	GPIO_FN(PINT7_PB),
819	GPIO_FN(PINT6_PB),
820	GPIO_FN(PINT5_PB),
821	GPIO_FN(PINT4_PB),
822	GPIO_FN(PINT3_PB),
823	GPIO_FN(PINT2_PB),
824	GPIO_FN(PINT1_PB),
825	GPIO_FN(PINT0_PB),
826	GPIO_FN(PINT7_PD),
827	GPIO_FN(PINT6_PD),
828	GPIO_FN(PINT5_PD),
829	GPIO_FN(PINT4_PD),
830	GPIO_FN(PINT3_PD),
831	GPIO_FN(PINT2_PD),
832	GPIO_FN(PINT1_PD),
833	GPIO_FN(PINT0_PD),
834	GPIO_FN(IRQ7_PB),
835	GPIO_FN(IRQ6_PB),
836	GPIO_FN(IRQ5_PB),
837	GPIO_FN(IRQ4_PB),
838	GPIO_FN(IRQ3_PB),
839	GPIO_FN(IRQ2_PB),
840	GPIO_FN(IRQ1_PB),
841	GPIO_FN(IRQ0_PB),
842	GPIO_FN(IRQ7_PD),
843	GPIO_FN(IRQ6_PD),
844	GPIO_FN(IRQ5_PD),
845	GPIO_FN(IRQ4_PD),
846	GPIO_FN(IRQ3_PD),
847	GPIO_FN(IRQ2_PD),
848	GPIO_FN(IRQ1_PD),
849	GPIO_FN(IRQ0_PD),
850	GPIO_FN(IRQ7_PE),
851	GPIO_FN(IRQ6_PE),
852	GPIO_FN(IRQ5_PE),
853	GPIO_FN(IRQ4_PE),
854	GPIO_FN(IRQ3_PE),
855	GPIO_FN(IRQ2_PE),
856	GPIO_FN(IRQ1_PE),
857	GPIO_FN(IRQ0_PE),
858
859	GPIO_FN(WDTOVF),
860	GPIO_FN(IRQOUT),
861	GPIO_FN(REFOUT),
862	GPIO_FN(IRQOUT_REFOUT),
863	GPIO_FN(UBCTRG),
864
865	/* CAN */
866	GPIO_FN(CTX1),
867	GPIO_FN(CRX1),
868	GPIO_FN(CTX0),
869	GPIO_FN(CTX0_CTX1),
870	GPIO_FN(CRX0),
871	GPIO_FN(CRX0_CRX1),
872
873	/* IIC3 */
874	GPIO_FN(SDA3),
875	GPIO_FN(SCL3),
876	GPIO_FN(SDA2),
877	GPIO_FN(SCL2),
878	GPIO_FN(SDA1),
879	GPIO_FN(SCL1),
880	GPIO_FN(SDA0),
881	GPIO_FN(SCL0),
882
883	/* DMAC */
884	GPIO_FN(TEND0_PD),
885	GPIO_FN(TEND0_PE),
886	GPIO_FN(DACK0_PD),
887	GPIO_FN(DACK0_PE),
888	GPIO_FN(DREQ0_PD),
889	GPIO_FN(DREQ0_PE),
890	GPIO_FN(TEND1_PD),
891	GPIO_FN(TEND1_PE),
892	GPIO_FN(DACK1_PD),
893	GPIO_FN(DACK1_PE),
894	GPIO_FN(DREQ1_PD),
895	GPIO_FN(DREQ1_PE),
896	GPIO_FN(DACK2),
897	GPIO_FN(DREQ2),
898	GPIO_FN(DACK3),
899	GPIO_FN(DREQ3),
900
901	/* ADC */
902	GPIO_FN(ADTRG_PD),
903	GPIO_FN(ADTRG_PE),
904
905	/* BSC */
906	GPIO_FN(D31),
907	GPIO_FN(D30),
908	GPIO_FN(D29),
909	GPIO_FN(D28),
910	GPIO_FN(D27),
911	GPIO_FN(D26),
912	GPIO_FN(D25),
913	GPIO_FN(D24),
914	GPIO_FN(D23),
915	GPIO_FN(D22),
916	GPIO_FN(D21),
917	GPIO_FN(D20),
918	GPIO_FN(D19),
919	GPIO_FN(D18),
920	GPIO_FN(D17),
921	GPIO_FN(D16),
922	GPIO_FN(A25),
923	GPIO_FN(A24),
924	GPIO_FN(A23),
925	GPIO_FN(A22),
926	GPIO_FN(A21),
927	GPIO_FN(CS4),
928	GPIO_FN(MRES),
929	GPIO_FN(BS),
930	GPIO_FN(IOIS16),
931	GPIO_FN(CS1),
932	GPIO_FN(CS6_CE1B),
933	GPIO_FN(CE2B),
934	GPIO_FN(CS5_CE1A),
935	GPIO_FN(CE2A),
936	GPIO_FN(FRAME),
937	GPIO_FN(WAIT),
938	GPIO_FN(RDWR),
939	GPIO_FN(CKE),
940	GPIO_FN(CASU),
941	GPIO_FN(BREQ),
942	GPIO_FN(RASU),
943	GPIO_FN(BACK),
944	GPIO_FN(CASL),
945	GPIO_FN(RASL),
946	GPIO_FN(WE3_DQMUU_AH_ICIO_WR),
947	GPIO_FN(WE2_DQMUL_ICIORD),
948	GPIO_FN(WE1_DQMLU_WE),
949	GPIO_FN(WE0_DQMLL),
950	GPIO_FN(CS3),
951	GPIO_FN(CS2),
952	GPIO_FN(A1),
953	GPIO_FN(A0),
954	GPIO_FN(CS7),
955
956	/* TMU */
957	GPIO_FN(TIOC4D),
958	GPIO_FN(TIOC4C),
959	GPIO_FN(TIOC4B),
960	GPIO_FN(TIOC4A),
961	GPIO_FN(TIOC3D),
962	GPIO_FN(TIOC3C),
963	GPIO_FN(TIOC3B),
964	GPIO_FN(TIOC3A),
965	GPIO_FN(TIOC2B),
966	GPIO_FN(TIOC1B),
967	GPIO_FN(TIOC2A),
968	GPIO_FN(TIOC1A),
969	GPIO_FN(TIOC0D),
970	GPIO_FN(TIOC0C),
971	GPIO_FN(TIOC0B),
972	GPIO_FN(TIOC0A),
973	GPIO_FN(TCLKD_PD),
974	GPIO_FN(TCLKC_PD),
975	GPIO_FN(TCLKB_PD),
976	GPIO_FN(TCLKA_PD),
977	GPIO_FN(TCLKD_PF),
978	GPIO_FN(TCLKC_PF),
979	GPIO_FN(TCLKB_PF),
980	GPIO_FN(TCLKA_PF),
981
982	/* SSU */
983	GPIO_FN(SCS0_PD),
984	GPIO_FN(SSO0_PD),
985	GPIO_FN(SSI0_PD),
986	GPIO_FN(SSCK0_PD),
987	GPIO_FN(SCS0_PF),
988	GPIO_FN(SSO0_PF),
989	GPIO_FN(SSI0_PF),
990	GPIO_FN(SSCK0_PF),
991	GPIO_FN(SCS1_PD),
992	GPIO_FN(SSO1_PD),
993	GPIO_FN(SSI1_PD),
994	GPIO_FN(SSCK1_PD),
995	GPIO_FN(SCS1_PF),
996	GPIO_FN(SSO1_PF),
997	GPIO_FN(SSI1_PF),
998	GPIO_FN(SSCK1_PF),
999
1000	/* SCIF */
1001	GPIO_FN(TXD0),
1002	GPIO_FN(RXD0),
1003	GPIO_FN(SCK0),
1004	GPIO_FN(TXD1),
1005	GPIO_FN(RXD1),
1006	GPIO_FN(SCK1),
1007	GPIO_FN(TXD2),
1008	GPIO_FN(RXD2),
1009	GPIO_FN(SCK2),
1010	GPIO_FN(RTS3),
1011	GPIO_FN(CTS3),
1012	GPIO_FN(TXD3),
1013	GPIO_FN(RXD3),
1014	GPIO_FN(SCK3),
1015
1016	/* SSI */
1017	GPIO_FN(AUDIO_CLK),
1018	GPIO_FN(SSIDATA3),
1019	GPIO_FN(SSIWS3),
1020	GPIO_FN(SSISCK3),
1021	GPIO_FN(SSIDATA2),
1022	GPIO_FN(SSIWS2),
1023	GPIO_FN(SSISCK2),
1024	GPIO_FN(SSIDATA1),
1025	GPIO_FN(SSIWS1),
1026	GPIO_FN(SSISCK1),
1027	GPIO_FN(SSIDATA0),
1028	GPIO_FN(SSIWS0),
1029	GPIO_FN(SSISCK0),
1030
1031	/* FLCTL */
1032	GPIO_FN(FCE),
1033	GPIO_FN(FRB),
1034	GPIO_FN(NAF7),
1035	GPIO_FN(NAF6),
1036	GPIO_FN(NAF5),
1037	GPIO_FN(NAF4),
1038	GPIO_FN(NAF3),
1039	GPIO_FN(NAF2),
1040	GPIO_FN(NAF1),
1041	GPIO_FN(NAF0),
1042	GPIO_FN(FSC),
1043	GPIO_FN(FOE),
1044	GPIO_FN(FCDE),
1045	GPIO_FN(FWE),
1046
1047	/* LCDC */
1048	GPIO_FN(LCD_VEPWC),
1049	GPIO_FN(LCD_VCPWC),
1050	GPIO_FN(LCD_CLK),
1051	GPIO_FN(LCD_FLM),
1052	GPIO_FN(LCD_M_DISP),
1053	GPIO_FN(LCD_CL2),
1054	GPIO_FN(LCD_CL1),
1055	GPIO_FN(LCD_DON),
1056	GPIO_FN(LCD_DATA15),
1057	GPIO_FN(LCD_DATA14),
1058	GPIO_FN(LCD_DATA13),
1059	GPIO_FN(LCD_DATA12),
1060	GPIO_FN(LCD_DATA11),
1061	GPIO_FN(LCD_DATA10),
1062	GPIO_FN(LCD_DATA9),
1063	GPIO_FN(LCD_DATA8),
1064	GPIO_FN(LCD_DATA7),
1065	GPIO_FN(LCD_DATA6),
1066	GPIO_FN(LCD_DATA5),
1067	GPIO_FN(LCD_DATA4),
1068	GPIO_FN(LCD_DATA3),
1069	GPIO_FN(LCD_DATA2),
1070	GPIO_FN(LCD_DATA1),
1071	GPIO_FN(LCD_DATA0),
1072	};
1073
1074	static const struct pinmux_cfg_reg pinmux_config_regs[] = {
1075	{ PINMUX_CFG_REG_VAR("PBIORL", 0xfffe3886, 16,
1076	GROUP(-4, 1, 1, 1, 1, -8),
1077	GROUP(
1078	/* RESERVED [4] */
1079	PB11_IN, PB11_OUT,
1080	PB10_IN, PB10_OUT,
1081	PB9_IN, PB9_OUT,
1082	PB8_IN, PB8_OUT,
1083	/* RESERVED [8] */ ))
1084	},
1085	{ PINMUX_CFG_REG_VAR("PBCRL4", 0xfffe3890, 16,
1086	GROUP(-12, 4),
1087	GROUP(
1088	/* RESERVED [12] */
1089	PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
1090	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1091	},
1092	{ PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4, GROUP(
1093	PB11MD_0, PB11MD_1,
1094	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1095
1096	PB10MD_0, PB10MD_1,
1097	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1098
1099	PB9MD_00, PB9MD_01, PB9MD_10, 0,
1100	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1101
1102	PB8MD_00, PB8MD_01, PB8MD_10, 0,
1103	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1104	},
1105	{ PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4, GROUP(
1106	PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
1107	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1108
1109	PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
1110	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1111
1112	PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
1113	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1114
1115	PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
1116	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1117	},
1118	{ PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4, GROUP(
1119	PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
1120	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1121
1122	PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
1123	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1124
1125	PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
1126	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1127
1128	PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
1129	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1130	},
1131	{ PINMUX_CFG_REG_VAR("IFCR", 0xfffe38a2, 16,
1132	GROUP(-12, 4),
1133	GROUP(
1134	/* RESERVED [12] */
1135	PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0,
1136	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1137	},
1138	{ PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1, GROUP(
1139	0, 0,
1140	PC14_IN, PC14_OUT,
1141	PC13_IN, PC13_OUT,
1142	PC12_IN, PC12_OUT,
1143	PC11_IN, PC11_OUT,
1144	PC10_IN, PC10_OUT,
1145	PC9_IN, PC9_OUT,
1146	PC8_IN, PC8_OUT,
1147	PC7_IN, PC7_OUT,
1148	PC6_IN, PC6_OUT,
1149	PC5_IN, PC5_OUT,
1150	PC4_IN, PC4_OUT,
1151	PC3_IN, PC3_OUT,
1152	PC2_IN, PC2_OUT,
1153	PC1_IN, PC1_OUT,
1154	PC0_IN, PC0_OUT ))
1155	},
1156	{ PINMUX_CFG_REG_VAR("PCCRL4", 0xfffe3910, 16,
1157	GROUP(-4, 4, 4, 4),
1158	GROUP(
1159	/* RESERVED [4] */
1160	PC14MD_0, PC14MD_1,
1161	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1162
1163	PC13MD_0, PC13MD_1,
1164	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1165
1166	PC12MD_0, PC12MD_1,
1167	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1168	},
1169	{ PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4, GROUP(
1170	PC11MD_00, PC11MD_01, PC11MD_10, 0,
1171	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1172
1173	PC10MD_00, PC10MD_01, PC10MD_10, 0,
1174	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1175
1176	PC9MD_0, PC9MD_1,
1177	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1178
1179	PC8MD_0, PC8MD_1,
1180	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1181	},
1182	{ PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4, GROUP(
1183	PC7MD_0, PC7MD_1,
1184	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1185
1186	PC6MD_0, PC6MD_1,
1187	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1188
1189	PC5MD_0, PC5MD_1,
1190	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1191
1192	PC4MD_0, PC4MD_1,
1193	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1194	},
1195	{ PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4, GROUP(
1196	PC3MD_0, PC3MD_1,
1197	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1198
1199	PC2MD_0, PC2MD_1,
1200	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1201
1202	PC1MD_0, PC1MD_1,
1203	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1204
1205	PC0MD_00, PC0MD_01, PC0MD_10, 0,
1206	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1207	},
1208	{ PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1, GROUP(
1209	PD15_IN, PD15_OUT,
1210	PD14_IN, PD14_OUT,
1211	PD13_IN, PD13_OUT,
1212	PD12_IN, PD12_OUT,
1213	PD11_IN, PD11_OUT,
1214	PD10_IN, PD10_OUT,
1215	PD9_IN, PD9_OUT,
1216	PD8_IN, PD8_OUT,
1217	PD7_IN, PD7_OUT,
1218	PD6_IN, PD6_OUT,
1219	PD5_IN, PD5_OUT,
1220	PD4_IN, PD4_OUT,
1221	PD3_IN, PD3_OUT,
1222	PD2_IN, PD2_OUT,
1223	PD1_IN, PD1_OUT,
1224	PD0_IN, PD0_OUT ))
1225	},
1226	{ PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4, GROUP(
1227	PD15MD_000, PD15MD_001, PD15MD_010, 0,
1228	PD15MD_100, PD15MD_101, 0, 0,
1229	0, 0, 0, 0, 0, 0, 0, 0,
1230
1231	PD14MD_000, PD14MD_001, PD14MD_010, 0,
1232	0, PD14MD_101, 0, 0,
1233	0, 0, 0, 0, 0, 0, 0, 0,
1234
1235	PD13MD_000, PD13MD_001, PD13MD_010, 0,
1236	PD13MD_100, PD13MD_101, 0, 0,
1237	0, 0, 0, 0, 0, 0, 0, 0,
1238
1239	PD12MD_000, PD12MD_001, PD12MD_010, 0,
1240	PD12MD_100, PD12MD_101, 0, 0,
1241	0, 0, 0, 0, 0, 0, 0, 0 ))
1242	},
1243	{ PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4, GROUP(
1244	PD11MD_000, PD11MD_001, PD11MD_010, 0,
1245	PD11MD_100, PD11MD_101, 0, 0,
1246	0, 0, 0, 0, 0, 0, 0, 0,
1247
1248	PD10MD_000, PD10MD_001, PD10MD_010, 0,
1249	PD10MD_100, PD10MD_101, 0, 0,
1250	0, 0, 0, 0, 0, 0, 0, 0,
1251
1252	PD9MD_000, PD9MD_001, PD9MD_010, 0,
1253	PD9MD_100, PD9MD_101, 0, 0,
1254	0, 0, 0, 0, 0, 0, 0, 0,
1255
1256	PD8MD_000, PD8MD_001, PD8MD_010, 0,
1257	PD8MD_100, PD8MD_101, 0, 0,
1258	0, 0, 0, 0, 0, 0, 0, 0 ))
1259	},
1260	{ PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4, GROUP(
1261	PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011,
1262	PD7MD_100, PD7MD_101, 0, 0,
1263	0, 0, 0, 0, 0, 0, 0, 0,
1264
1265	PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011,
1266	PD6MD_100, PD6MD_101, 0, 0,
1267	0, 0, 0, 0, 0, 0, 0, 0,
1268
1269	PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011,
1270	PD5MD_100, PD5MD_101, 0, 0,
1271	0, 0, 0, 0, 0, 0, 0, 0,
1272
1273	PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011,
1274	PD4MD_100, PD4MD_101, 0, 0,
1275	0, 0, 0, 0, 0, 0, 0, 0 ))
1276	},
1277	{ PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4, GROUP(
1278	PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011,
1279	PD3MD_100, PD3MD_101, 0, 0,
1280	0, 0, 0, 0, 0, 0, 0, 0,
1281
1282	PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011,
1283	PD2MD_100, PD2MD_101, 0, 0,
1284	0, 0, 0, 0, 0, 0, 0, 0,
1285
1286	PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011,
1287	PD1MD_100, PD1MD_101, 0, 0,
1288	0, 0, 0, 0, 0, 0, 0, 0,
1289
1290	PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011,
1291	PD0MD_100, PD0MD_101, 0, 0,
1292	0, 0, 0, 0, 0, 0, 0, 0 ))
1293	},
1294	{ PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1, GROUP(
1295	PE15_IN, PE15_OUT,
1296	PE14_IN, PE14_OUT,
1297	PE13_IN, PE13_OUT,
1298	PE12_IN, PE12_OUT,
1299	PE11_IN, PE11_OUT,
1300	PE10_IN, PE10_OUT,
1301	PE9_IN, PE9_OUT,
1302	PE8_IN, PE8_OUT,
1303	PE7_IN, PE7_OUT,
1304	PE6_IN, PE6_OUT,
1305	PE5_IN, PE5_OUT,
1306	PE4_IN, PE4_OUT,
1307	PE3_IN, PE3_OUT,
1308	PE2_IN, PE2_OUT,
1309	PE1_IN, PE1_OUT,
1310	PE0_IN, PE0_OUT ))
1311	},
1312	{ PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4, GROUP(
1313	PE15MD_00, PE15MD_01, 0, PE15MD_11,
1314	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1315
1316	PE14MD_00, PE14MD_01, 0, PE14MD_11,
1317	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1318
1319	PE13MD_00, 0, 0, PE13MD_11,
1320	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1321
1322	PE12MD_00, 0, 0, PE12MD_11,
1323	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1324	},
1325	{ PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4, GROUP(
1326	PE11MD_000, PE11MD_001, PE11MD_010, 0,
1327	PE11MD_100, 0, 0, 0,
1328	0, 0, 0, 0, 0, 0, 0, 0,
1329
1330	PE10MD_000, PE10MD_001, PE10MD_010, 0,
1331	PE10MD_100, 0, 0, 0,
1332	0, 0, 0, 0, 0, 0, 0, 0,
1333
1334	PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
1335	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1336
1337	PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
1338	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1339	},
1340	{ PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4, GROUP(
1341	PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011,
1342	PE7MD_100, 0, 0, 0,
1343	0, 0, 0, 0, 0, 0, 0, 0,
1344
1345	PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011,
1346	PE6MD_100, 0, 0, 0,
1347	0, 0, 0, 0, 0, 0, 0, 0,
1348
1349	PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011,
1350	PE5MD_100, 0, 0, 0,
1351	0, 0, 0, 0, 0, 0, 0, 0,
1352
1353	PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011,
1354	PE4MD_100, 0, 0, 0,
1355	0, 0, 0, 0, 0, 0, 0, 0 ))
1356	},
1357	{ PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4, GROUP(
1358	PE3MD_00, PE3MD_01, 0, PE3MD_11,
1359	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1360
1361	PE2MD_00, PE2MD_01, 0, PE2MD_11,
1362	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1363
1364	PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
1365	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1366
1367	PE0MD_000, PE0MD_001, 0, PE0MD_011,
1368	PE0MD_100, 0, 0, 0,
1369	0, 0, 0, 0, 0, 0, 0, 0 ))
1370	},
1371	{ PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1, GROUP(
1372	0, 0,
1373	PF30_IN, PF30_OUT,
1374	PF29_IN, PF29_OUT,
1375	PF28_IN, PF28_OUT,
1376	PF27_IN, PF27_OUT,
1377	PF26_IN, PF26_OUT,
1378	PF25_IN, PF25_OUT,
1379	PF24_IN, PF24_OUT,
1380	PF23_IN, PF23_OUT,
1381	PF22_IN, PF22_OUT,
1382	PF21_IN, PF21_OUT,
1383	PF20_IN, PF20_OUT,
1384	PF19_IN, PF19_OUT,
1385	PF18_IN, PF18_OUT,
1386	PF17_IN, PF17_OUT,
1387	PF16_IN, PF16_OUT ))
1388	},
1389	{ PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1, GROUP(
1390	PF15_IN, PF15_OUT,
1391	PF14_IN, PF14_OUT,
1392	PF13_IN, PF13_OUT,
1393	PF12_IN, PF12_OUT,
1394	PF11_IN, PF11_OUT,
1395	PF10_IN, PF10_OUT,
1396	PF9_IN, PF9_OUT,
1397	PF8_IN, PF8_OUT,
1398	PF7_IN, PF7_OUT,
1399	PF6_IN, PF6_OUT,
1400	PF5_IN, PF5_OUT,
1401	PF4_IN, PF4_OUT,
1402	PF3_IN, PF3_OUT,
1403	PF2_IN, PF2_OUT,
1404	PF1_IN, PF1_OUT,
1405	PF0_IN, PF0_OUT ))
1406	},
1407	{ PINMUX_CFG_REG_VAR("PFCRH4", 0xfffe3a88, 16,
1408	GROUP(-4, 4, 4, 4),
1409	GROUP(
1410	/* RESERVED [4] */
1411
1412	PF30MD_0, PF30MD_1,
1413	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1414
1415	PF29MD_0, PF29MD_1,
1416	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1417
1418	PF28MD_0, PF28MD_1,
1419	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1420	},
1421	{ PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4, GROUP(
1422	PF27MD_0, PF27MD_1,
1423	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1424
1425	PF26MD_0, PF26MD_1,
1426	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1427
1428	PF25MD_0, PF25MD_1,
1429	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1430
1431	PF24MD_0, PF24MD_1,
1432	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1433	},
1434	{ PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4, GROUP(
1435	PF23MD_00, PF23MD_01, PF23MD_10, 0,
1436	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1437
1438	PF22MD_00, PF22MD_01, PF22MD_10, 0,
1439	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1440
1441	PF21MD_00, PF21MD_01, PF21MD_10, 0,
1442	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1443
1444	PF20MD_00, PF20MD_01, PF20MD_10, 0,
1445	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1446	},
1447	{ PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4, GROUP(
1448	PF19MD_00, PF19MD_01, PF19MD_10, 0,
1449	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1450
1451	PF18MD_00, PF18MD_01, PF18MD_10, 0,
1452	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1453
1454	PF17MD_00, PF17MD_01, PF17MD_10, 0,
1455	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1456
1457	PF16MD_00, PF16MD_01, PF16MD_10, 0,
1458	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1459	},
1460	{ PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4, GROUP(
1461	PF15MD_00, PF15MD_01, PF15MD_10, 0,
1462	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1463
1464	PF14MD_00, PF14MD_01, PF14MD_10, 0,
1465	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1466
1467	PF13MD_00, PF13MD_01, PF13MD_10, 0,
1468	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1469
1470	PF12MD_00, PF12MD_01, PF12MD_10, 0,
1471	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1472	},
1473	{ PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4, GROUP(
1474	PF11MD_00, PF11MD_01, PF11MD_10, 0,
1475	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1476
1477	PF10MD_00, PF10MD_01, PF10MD_10, 0,
1478	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1479
1480	PF9MD_00, PF9MD_01, PF9MD_10, 0,
1481	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1482
1483	PF8MD_00, PF8MD_01, PF8MD_10, 0,
1484	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1485	},
1486	{ PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4, GROUP(
1487	PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
1488	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1489
1490	PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
1491	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1492
1493	PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
1494	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1495
1496	PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
1497	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1498	},
1499	{ PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4, GROUP(
1500	PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
1501	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1502
1503	PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
1504	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1505
1506	PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
1507	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1508
1509	PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
1510	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
1511	},
1512	{ /* sentinel */ }
1513	};
1514
1515	static const struct pinmux_data_reg pinmux_data_regs[] = {
1516	{ PINMUX_DATA_REG("PADRL", 0xfffe3802, 16, GROUP(
1517	0, 0, 0, 0,
1518	0, 0, 0, 0,
1519	PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1520	PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA ))
1521	},
1522	{ PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16, GROUP(
1523	0, 0, 0, PB12_DATA,
1524	PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
1525	PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1526	PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA ))
1527	},
1528	{ PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16, GROUP(
1529	0, PC14_DATA, PC13_DATA, PC12_DATA,
1530	PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
1531	PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1532	PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
1533	},
1534	{ PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16, GROUP(
1535	PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
1536	PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
1537	PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1538	PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
1539	},
1540	{ PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16, GROUP(
1541	PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
1542	PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
1543	PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
1544	PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA ))
1545	},
1546	{ PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16, GROUP(
1547	0, PF30_DATA, PF29_DATA, PF28_DATA,
1548	PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
1549	PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
1550	PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA ))
1551	},
1552	{ PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16, GROUP(
1553	PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
1554	PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
1555	PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1556	PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
1557	},
1558	{ /* sentinel */ }
1559	};
1560
1561	const struct sh_pfc_soc_info sh7203_pinmux_info = {
1562	.name = "sh7203_pfc",
1563	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
1564	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
1565	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1566
1567	.pins = pinmux_pins,
1568	.nr_pins = ARRAY_SIZE(pinmux_pins),
1569	.func_gpios = pinmux_func_gpios,
1570	.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
1571
1572	.cfg_regs = pinmux_config_regs,
1573	.data_regs = pinmux_data_regs,
1574
1575	.pinmux_data = pinmux_data,
1576	.pinmux_data_size = ARRAY_SIZE(pinmux_data),
1577	};
1578