1 | /* |
2 | * PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver |
3 | * |
4 | * Copyright (c) 2008-2009 USI Co., Ltd. |
5 | * All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions, and the following disclaimer, |
12 | * without modification. |
13 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer |
14 | * substantially similar to the "NO WARRANTY" disclaimer below |
15 | * ("Disclaimer") and any redistribution must be conditioned upon |
16 | * including a substantially similar Disclaimer requirement for further |
17 | * binary redistribution. |
18 | * 3. Neither the names of the above-listed copyright holders nor the names |
19 | * of any contributors may be used to endorse or promote products derived |
20 | * from this software without specific prior written permission. |
21 | * |
22 | * Alternatively, this software may be distributed under the terms of the |
23 | * GNU General Public License ("GPL") version 2 as published by the Free |
24 | * Software Foundation. |
25 | * |
26 | * NO WARRANTY |
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR |
30 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
31 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
33 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
34 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
35 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
36 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
37 | * POSSIBILITY OF SUCH DAMAGES. |
38 | * |
39 | */ |
40 | |
41 | #ifndef _PM8001_DEFS_H_ |
42 | #define _PM8001_DEFS_H_ |
43 | |
44 | enum chip_flavors { |
45 | chip_8001, |
46 | chip_8008, |
47 | chip_8009, |
48 | chip_8018, |
49 | chip_8019, |
50 | chip_8074, |
51 | chip_8076, |
52 | chip_8077, |
53 | chip_8006, |
54 | chip_8070, |
55 | chip_8072 |
56 | }; |
57 | |
58 | enum phy_speed { |
59 | PHY_SPEED_15 = 0x01, |
60 | PHY_SPEED_30 = 0x02, |
61 | PHY_SPEED_60 = 0x04, |
62 | PHY_SPEED_120 = 0x08, |
63 | }; |
64 | |
65 | enum data_direction { |
66 | DATA_DIR_NONE = 0x0, /* NO TRANSFER */ |
67 | DATA_DIR_IN = 0x01, /* INBOUND */ |
68 | DATA_DIR_OUT = 0x02, /* OUTBOUND */ |
69 | DATA_DIR_BYRECIPIENT = 0x04, /* UNSPECIFIED */ |
70 | }; |
71 | |
72 | enum port_type { |
73 | PORT_TYPE_SAS = (1L << 1), |
74 | PORT_TYPE_SATA = (1L << 0), |
75 | }; |
76 | |
77 | /* driver compile-time configuration */ |
78 | #define PM8001_MAX_CCB 1024 /* max ccbs supported */ |
79 | #define PM8001_MPI_QUEUE 1024 /* maximum mpi queue entries */ |
80 | #define PM8001_MAX_INB_NUM 64 |
81 | #define PM8001_MAX_OUTB_NUM 64 |
82 | #define PM8001_CAN_QUEUE 508 /* SCSI Queue depth */ |
83 | |
84 | /* Inbound/Outbound queue size */ |
85 | #define IOMB_SIZE_SPC 64 |
86 | #define IOMB_SIZE_SPCV 128 |
87 | |
88 | /* unchangeable hardware details */ |
89 | #define PM8001_MAX_PHYS 16 /* max. possible phys */ |
90 | #define PM8001_MAX_PORTS 16 /* max. possible ports */ |
91 | #define PM8001_MAX_DEVICES 2048 /* max supported device */ |
92 | #define PM8001_MAX_MSIX_VEC 64 /* max msi-x int for spcv/ve */ |
93 | #define PM8001_RESERVE_SLOT 128 |
94 | |
95 | #define PM8001_SECTOR_SIZE 512 |
96 | #define PM8001_PAGE_SIZE_4K 4096 |
97 | #define PM8001_MAX_IO_SIZE (4 * 1024 * 1024) |
98 | #define PM8001_MAX_DMA_SG (PM8001_MAX_IO_SIZE / PM8001_PAGE_SIZE_4K) |
99 | #define PM8001_MAX_SECTORS (PM8001_MAX_IO_SIZE / PM8001_SECTOR_SIZE) |
100 | |
101 | enum memory_region_num { |
102 | AAP1 = 0x0, /* application acceleration processor */ |
103 | IOP, /* IO processor */ |
104 | NVMD, /* NVM device */ |
105 | FW_FLASH, /* memory for fw flash update */ |
106 | FORENSIC_MEM, /* memory for fw forensic data */ |
107 | USI_MAX_MEMCNT_BASE |
108 | }; |
109 | #define PM8001_EVENT_LOG_SIZE (128 * 1024) |
110 | |
111 | /** |
112 | * maximum DMA memory regions(number of IBQ + number of IBQ CI |
113 | * + number of OBQ + number of OBQ PI) |
114 | */ |
115 | #define USI_MAX_MEMCNT (USI_MAX_MEMCNT_BASE + ((2 * PM8001_MAX_INB_NUM) \ |
116 | + (2 * PM8001_MAX_OUTB_NUM))) |
117 | /*error code*/ |
118 | enum mpi_err { |
119 | MPI_IO_STATUS_SUCCESS = 0x0, |
120 | MPI_IO_STATUS_BUSY = 0x01, |
121 | MPI_IO_STATUS_FAIL = 0x02, |
122 | }; |
123 | |
124 | /** |
125 | * Phy Control constants |
126 | */ |
127 | enum phy_control_type { |
128 | PHY_LINK_RESET = 0x01, |
129 | PHY_HARD_RESET = 0x02, |
130 | PHY_NOTIFY_ENABLE_SPINUP = 0x10, |
131 | }; |
132 | |
133 | enum pm8001_hba_info_flags { |
134 | PM8001F_INIT_TIME = (1U << 0), |
135 | PM8001F_RUN_TIME = (1U << 1), |
136 | }; |
137 | |
138 | /** |
139 | * Phy Status |
140 | */ |
141 | #define PHY_LINK_DISABLE 0x00 |
142 | #define PHY_LINK_DOWN 0x01 |
143 | #define PHY_STATE_LINK_UP_SPCV 0x2 |
144 | #define PHY_STATE_LINK_UP_SPC 0x1 |
145 | |
146 | #endif |
147 | |