| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * Freescale SPI controller driver. |
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| 4 | * |
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| 5 | * Maintainer: Kumar Gala |
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| 6 | * |
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| 7 | * Copyright (C) 2006 Polycom, Inc. |
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| 8 | * Copyright 2010 Freescale Semiconductor, Inc. |
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| 9 | * |
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| 10 | * CPM SPI and QE buffer descriptors mode support: |
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| 11 | * Copyright (c) 2009 MontaVista Software, Inc. |
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| 12 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> |
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| 13 | * |
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| 14 | * GRLIB support: |
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| 15 | * Copyright (c) 2012 Aeroflex Gaisler AB. |
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| 16 | * Author: Andreas Larsson <andreas@gaisler.com> |
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| 17 | */ |
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| 18 | |
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| 19 | #ifndef __SPI_FSL_SPI_H__ |
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| 20 | #define __SPI_FSL_SPI_H__ |
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| 21 | |
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| 22 | /* SPI Controller registers */ |
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| 23 | struct fsl_spi_reg { |
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| 24 | __be32 cap; /* TYPE_GRLIB specific */ |
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| 25 | u8 res1[0x1C]; |
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| 26 | __be32 mode; |
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| 27 | __be32 event; |
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| 28 | __be32 mask; |
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| 29 | __be32 command; |
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| 30 | __be32 transmit; |
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| 31 | __be32 receive; |
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| 32 | __be32 slvsel; /* TYPE_GRLIB specific */ |
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| 33 | }; |
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| 34 | |
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| 35 | /* SPI Controller mode register definitions */ |
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| 36 | #define SPMODE_LOOP (1 << 30) |
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| 37 | #define SPMODE_CI_INACTIVEHIGH (1 << 29) |
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| 38 | #define SPMODE_CP_BEGIN_EDGECLK (1 << 28) |
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| 39 | #define SPMODE_DIV16 (1 << 27) |
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| 40 | #define SPMODE_REV (1 << 26) |
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| 41 | #define SPMODE_MS (1 << 25) |
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| 42 | #define SPMODE_ENABLE (1 << 24) |
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| 43 | #define SPMODE_LEN(x) ((x) << 20) |
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| 44 | #define SPMODE_PM(x) ((x) << 16) |
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| 45 | #define SPMODE_OP (1 << 14) |
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| 46 | #define SPMODE_CG(x) ((x) << 7) |
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| 47 | |
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| 48 | /* TYPE_GRLIB SPI Controller capability register definitions */ |
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| 49 | #define SPCAP_SSEN(x) (((x) >> 16) & 0x1) |
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| 50 | #define SPCAP_SSSZ(x) (((x) >> 24) & 0xff) |
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| 51 | #define SPCAP_MAXWLEN(x) (((x) >> 20) & 0xf) |
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| 52 | |
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| 53 | /* |
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| 54 | * Default for SPI Mode: |
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| 55 | * SPI MODE 0 (inactive low, phase middle, MSB, 8-bit length, slow clk |
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| 56 | */ |
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| 57 | #define SPMODE_INIT_VAL (SPMODE_CI_INACTIVEHIGH | SPMODE_DIV16 | SPMODE_REV | \ |
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| 58 | SPMODE_MS | SPMODE_LEN(7) | SPMODE_PM(0xf)) |
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| 59 | |
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| 60 | /* SPIE register values */ |
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| 61 | #define SPIE_NE 0x00000200 /* Not empty */ |
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| 62 | #define SPIE_NF 0x00000100 /* Not full */ |
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| 63 | |
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| 64 | /* SPIM register values */ |
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| 65 | #define SPIM_NE 0x00000200 /* Not empty */ |
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| 66 | #define SPIM_NF 0x00000100 /* Not full */ |
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| 67 | |
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| 68 | #endif /* __SPI_FSL_SPI_H__ */ |
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| 69 | |
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