1	/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2	/******************************************************************************
3	*
4	* Name: actbl2.h - ACPI Table Definitions
5	*
6	* Copyright (C) 2000 - 2025, Intel Corp.
7	*
8	*****************************************************************************/
9
10	#ifndef __ACTBL2_H__
11	#define __ACTBL2_H__
12
13	/*******************************************************************************
14	*
15	* Additional ACPI Tables (2)
16	*
17	* These tables are not consumed directly by the ACPICA subsystem, but are
18	* included here to support device drivers and the AML disassembler.
19	*
20	******************************************************************************/
21
22	/*
23	* Values for description table header signatures for tables defined in this
24	* file. Useful because they make it more difficult to inadvertently type in
25	* the wrong signature.
26	*/
27	#define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
28	#define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */
29	#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
30	#define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */
31	#define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */
32	#define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */
33	#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
34	#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
35	#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
36	#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
37	#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
38	#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
39	#define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */
40	#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
41	#define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */
42	#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
43	#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
44	#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
45	#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
46	#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
47	#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
48	#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
49	#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
50	#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
51	#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
52	#define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */
53	#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
54	#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
55	#define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */
56	#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
57	#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
58	#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
59	#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
60	#define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
61
62	/*
63	* All tables must be byte-packed to match the ACPI specification, since
64	* the tables are provided by the system BIOS.
65	*/
66	#pragma pack(1)
67
68	/*
69	* Note: C bitfields are not used for this reason:
70	*
71	* "Bitfields are great and easy to read, but unfortunately the C language
72	* does not specify the layout of bitfields in memory, which means they are
73	* essentially useless for dealing with packed data in on-disk formats or
74	* binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
75	* this decision was a design error in C. Ritchie could have picked an order
76	* and stuck with it." Norman Ramsey.
77	* See http://stackoverflow.com/a/1053662/41661
78	*/
79
80	/*******************************************************************************
81	*
82	* AEST - Arm Error Source Table
83	*
84	* Conforms to: ACPI for the Armv8 RAS Extensions 1.1(Sep 2020) and
85	* 2.0(May 2023) Platform Design Document.
86	*
87	******************************************************************************/
88
89	struct acpi_table_aest {
90	struct acpi_table_header header;
91	};
92
93	/* Common Subtable header - one per Node Structure (Subtable) */
94
95	struct acpi_aest_hdr {
96	u8 type;
97	u16 length;
98	u8 reserved;
99	u32 node_specific_offset;
100	u32 node_interface_offset;
101	u32 node_interrupt_offset;
102	u32 node_interrupt_count;
103	u64 timestamp_rate;
104	u64 reserved1;
105	u64 error_injection_rate;
106	};
107
108	/* Values for Type above */
109
110	#define ACPI_AEST_PROCESSOR_ERROR_NODE 0
111	#define ACPI_AEST_MEMORY_ERROR_NODE 1
112	#define ACPI_AEST_SMMU_ERROR_NODE 2
113	#define ACPI_AEST_VENDOR_ERROR_NODE 3
114	#define ACPI_AEST_GIC_ERROR_NODE 4
115	#define ACPI_AEST_PCIE_ERROR_NODE 5
116	#define ACPI_AEST_PROXY_ERROR_NODE 6
117	#define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */
118
119	/*
120	* AEST subtables (Error nodes)
121	*/
122
123	/* 0: Processor Error */
124
125	typedef struct acpi_aest_processor {
126	u32 processor_id;
127	u8 resource_type;
128	u8 reserved;
129	u8 flags;
130	u8 revision;
131	u64 processor_affinity;
132
133	} acpi_aest_processor;
134
135	/* Values for resource_type above, related structs below */
136
137	#define ACPI_AEST_CACHE_RESOURCE 0
138	#define ACPI_AEST_TLB_RESOURCE 1
139	#define ACPI_AEST_GENERIC_RESOURCE 2
140	#define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
141
142	/* 0R: Processor Cache Resource Substructure */
143
144	typedef struct acpi_aest_processor_cache {
145	u32 cache_reference;
146	u32 reserved;
147
148	} acpi_aest_processor_cache;
149
150	/* Values for cache_type above */
151
152	#define ACPI_AEST_CACHE_DATA 0
153	#define ACPI_AEST_CACHE_INSTRUCTION 1
154	#define ACPI_AEST_CACHE_UNIFIED 2
155	#define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
156
157	/* 1R: Processor TLB Resource Substructure */
158
159	typedef struct acpi_aest_processor_tlb {
160	u32 tlb_level;
161	u32 reserved;
162
163	} acpi_aest_processor_tlb;
164
165	/* 2R: Processor Generic Resource Substructure */
166
167	typedef struct acpi_aest_processor_generic {
168	u32 resource;
169
170	} acpi_aest_processor_generic;
171
172	/* 1: Memory Error */
173
174	typedef struct acpi_aest_memory {
175	u32 srat_proximity_domain;
176
177	} acpi_aest_memory;
178
179	/* 2: Smmu Error */
180
181	typedef struct acpi_aest_smmu {
182	u32 iort_node_reference;
183	u32 subcomponent_reference;
184
185	} acpi_aest_smmu;
186
187	/* 3: Vendor Defined */
188
189	typedef struct acpi_aest_vendor {
190	u32 acpi_hid;
191	u32 acpi_uid;
192	u8 vendor_specific_data[16];
193
194	} acpi_aest_vendor;
195
196	struct acpi_aest_vendor_v2 {
197	char acpi_hid[8];
198	u32 acpi_uid;
199	u8 vendor_specific_data[16];
200	};
201
202	/* 4: Gic Error */
203
204	typedef struct acpi_aest_gic {
205	u32 interface_type;
206	u32 instance_id;
207
208	} acpi_aest_gic;
209
210	/* Values for interface_type above */
211
212	#define ACPI_AEST_GIC_CPU 0
213	#define ACPI_AEST_GIC_DISTRIBUTOR 1
214	#define ACPI_AEST_GIC_REDISTRIBUTOR 2
215	#define ACPI_AEST_GIC_ITS 3
216	#define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
217
218	/* 5: PCIe Error */
219
220	struct acpi_aest_pcie {
221	u32 iort_node_reference;
222	};
223
224	/* 6: Proxy Error */
225
226	struct acpi_aest_proxy {
227	u64 node_address;
228	};
229
230	/* Node Interface Structure */
231
232	typedef struct acpi_aest_node_interface {
233	u8 type;
234	u8 reserved[3];
235	u32 flags;
236	u64 address;
237	u32 error_record_index;
238	u32 error_record_count;
239	u64 error_record_implemented;
240	u64 error_status_reporting;
241	u64 addressing_mode;
242
243	} acpi_aest_node_interface;
244
245	/* Node Interface Structure V2 */
246
247	struct acpi_aest_node_interface_header {
248	u8 type;
249	u8 group_format;
250	u8 reserved[2];
251	u32 flags;
252	u64 address;
253	u32 error_record_index;
254	u32 error_record_count;
255	};
256
257	#define ACPI_AEST_NODE_GROUP_FORMAT_4K 0
258	#define ACPI_AEST_NODE_GROUP_FORMAT_16K 1
259	#define ACPI_AEST_NODE_GROUP_FORMAT_64K 2
260
261	struct acpi_aest_node_interface_common {
262	u32 error_node_device;
263	u32 processor_affinity;
264	u64 error_group_register_base;
265	u64 fault_inject_register_base;
266	u64 interrupt_config_register_base;
267	};
268
269	struct acpi_aest_node_interface_4k {
270	u64 error_record_implemented;
271	u64 error_status_reporting;
272	u64 addressing_mode;
273	struct acpi_aest_node_interface_common common;
274	};
275
276	struct acpi_aest_node_interface_16k {
277	u64 error_record_implemented[4];
278	u64 error_status_reporting[4];
279	u64 addressing_mode[4];
280	struct acpi_aest_node_interface_common common;
281	};
282
283	struct acpi_aest_node_interface_64k {
284	u64 error_record_implemented[14];
285	u64 error_status_reporting[14];
286	u64 addressing_mode[14];
287	struct acpi_aest_node_interface_common common;
288	};
289
290	/* Values for Type field above */
291
292	#define ACPI_AEST_NODE_SYSTEM_REGISTER 0
293	#define ACPI_AEST_NODE_MEMORY_MAPPED 1
294	#define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2
295	#define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */
296
297	/* Node Interrupt Structure */
298
299	typedef struct acpi_aest_node_interrupt {
300	u8 type;
301	u8 reserved[2];
302	u8 flags;
303	u32 gsiv;
304	u8 iort_id;
305	u8 reserved1[3];
306
307	} acpi_aest_node_interrupt;
308
309	/* Node Interrupt Structure V2 */
310
311	struct acpi_aest_node_interrupt_v2 {
312	u8 type;
313	u8 reserved[2];
314	u8 flags;
315	u32 gsiv;
316	u8 reserved1[4];
317	};
318
319	/* Values for Type field above */
320
321	#define ACPI_AEST_NODE_FAULT_HANDLING 0
322	#define ACPI_AEST_NODE_ERROR_RECOVERY 1
323	#define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
324
325	/*******************************************************************************
326	* AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
327	*
328	* Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
329	* ARM DEN0093 v1.1
330	*
331	******************************************************************************/
332	struct acpi_table_agdi {
333	struct acpi_table_header header; /* Common ACPI table header */
334	u8 flags;
335	u8 reserved[3];
336	u32 sdei_event;
337	u32 gsiv;
338	};
339
340	/* Mask for Flags field above */
341
342	#define ACPI_AGDI_SIGNALING_MODE (1)
343
344	/*******************************************************************************
345	*
346	* APMT - ARM Performance Monitoring Unit Table
347	*
348	* Conforms to:
349	* ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document
350	* ARM DEN0117 v1.0 November 25, 2021
351	*
352	******************************************************************************/
353
354	struct acpi_table_apmt {
355	struct acpi_table_header header; /* Common ACPI table header */
356	};
357
358	#define ACPI_APMT_NODE_ID_LENGTH 4
359
360	/*
361	* APMT subtables
362	*/
363	struct acpi_apmt_node {
364	u16 length;
365	u8 flags;
366	u8 type;
367	u32 id;
368	u64 inst_primary;
369	u32 inst_secondary;
370	u64 base_address0;
371	u64 base_address1;
372	u32 ovflw_irq;
373	u32 reserved;
374	u32 ovflw_irq_flags;
375	u32 proc_affinity;
376	u32 impl_id;
377	};
378
379	/* Masks for Flags field above */
380
381	#define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)
382	#define ACPI_APMT_FLAGS_AFFINITY (1<<1)
383	#define ACPI_APMT_FLAGS_ATOMIC (1<<2)
384
385	/* Values for Flags dual page field above */
386
387	#define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)
388	#define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0)
389
390	/* Values for Flags processor affinity field above */
391	#define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)
392	#define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1)
393
394	/* Values for Flags 64-bit atomic field above */
395	#define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)
396	#define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2)
397
398	/* Values for Type field above */
399
400	enum acpi_apmt_node_type {
401	ACPI_APMT_NODE_TYPE_MC = 0x00,
402	ACPI_APMT_NODE_TYPE_SMMU = 0x01,
403	ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02,
404	ACPI_APMT_NODE_TYPE_ACPI = 0x03,
405	ACPI_APMT_NODE_TYPE_CACHE = 0x04,
406	ACPI_APMT_NODE_TYPE_COUNT
407	};
408
409	/* Masks for ovflw_irq_flags field above */
410
411	#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)
412	#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1)
413
414	/* Values for ovflw_irq_flags mode field above */
415
416	#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)
417	#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0)
418
419	/* Values for ovflw_irq_flags type field above */
420
421	#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1)
422
423	/*******************************************************************************
424	*
425	* BDAT - BIOS Data ACPI Table
426	*
427	* Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
428	* Nov 2020
429	*
430	******************************************************************************/
431
432	struct acpi_table_bdat {
433	struct acpi_table_header header;
434	struct acpi_generic_address gas;
435	};
436
437	/*******************************************************************************
438	*
439	* CCEL - CC-Event Log
440	* From: "Guest-Host-Communication Interface (GHCI) for Intel
441	* Trust Domain Extensions (Intel TDX)". Feb 2022
442	*
443	******************************************************************************/
444
445	struct acpi_table_ccel {
446	struct acpi_table_header header; /* Common ACPI table header */
447	u8 CCtype;
448	u8 Ccsub_type;
449	u16 reserved;
450	u64 log_area_minimum_length;
451	u64 log_area_start_address;
452	};
453
454	/*******************************************************************************
455	*
456	* ERDT - Enhanced Resource Director Technology (ERDT) table
457	*
458	* Conforms to "Intel Resource Director Technology Architecture Specification"
459	* Version 1.1, January 2025
460	*
461	******************************************************************************/
462
463	struct acpi_table_erdt {
464	struct acpi_table_header header; /* Common ACPI table header */
465	u32 max_clos; /* Maximum classes of service */
466	u8 reserved[24];
467	u8 erdt_substructures[];
468	};
469
470	/* Values for subtable type in struct acpi_subtbl_hdr_16 */
471
472	enum acpi_erdt_type {
473	ACPI_ERDT_TYPE_RMDD = 0,
474	ACPI_ERDT_TYPE_CACD = 1,
475	ACPI_ERDT_TYPE_DACD = 2,
476	ACPI_ERDT_TYPE_CMRC = 3,
477	ACPI_ERDT_TYPE_MMRC = 4,
478	ACPI_ERDT_TYPE_MARC = 5,
479	ACPI_ERDT_TYPE_CARC = 6,
480	ACPI_ERDT_TYPE_CMRD = 7,
481	ACPI_ERDT_TYPE_IBRD = 8,
482	ACPI_ERDT_TYPE_IBAD = 9,
483	ACPI_ERDT_TYPE_CARD = 10,
484	ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */
485	};
486
487	/*
488	* ERDT Subtables, correspond to Type in struct acpi_subtbl_hdr_16
489	*/
490
491	/* 0: RMDD - Resource Management Domain Description */
492
493	struct acpi_erdt_rmdd {
494	struct acpi_subtbl_hdr_16 header;
495	u16 flags;
496	u16 IO_l3_slices; /* Number of slices in IO cache */
497	u8 IO_l3_sets; /* Number of sets in IO cache */
498	u8 IO_l3_ways; /* Number of ways in IO cache */
499	u64 reserved;
500	u16 domain_id; /* Unique domain ID */
501	u32 max_rmid; /* Maximun RMID supported */
502	u64 creg_base; /* Control Register Base Address */
503	u16 creg_size; /* Control Register Size (4K pages) */
504	u8 rmdd_structs[];
505	};
506
507	/* 1: CACD - CPU Agent Collection Description */
508
509	struct acpi_erdt_cacd {
510	struct acpi_subtbl_hdr_16 header;
511	u16 reserved;
512	u16 domain_id; /* Unique domain ID */
513	u32 X2APICIDS[];
514	};
515
516	/* 2: DACD - Device Agent Collection Description */
517
518	struct acpi_erdt_dacd {
519	struct acpi_subtbl_hdr_16 header;
520	u16 reserved;
521	u16 domain_id; /* Unique domain ID */
522	u8 dev_paths[];
523	};
524
525	struct acpi_erdt_dacd_dev_paths {
526	struct acpi_subtable_header header;
527	u16 segment;
528	u8 reserved;
529	u8 start_bus;
530	u8 path[];
531	};
532
533	/* 3: CMRC - Cache Monitoring Registers for CPU Agents */
534
535	struct acpi_erdt_cmrc {
536	struct acpi_subtbl_hdr_16 header;
537	u32 reserved1;
538	u32 flags;
539	u8 index_fn;
540	u8 reserved2[11];
541	u64 cmt_reg_base;
542	u32 cmt_reg_size;
543	u16 clump_size;
544	u16 clump_stride;
545	u64 up_scale;
546	};
547
548	/* 4: MMRC - Memory-bandwidth Monitoring Registers for CPU Agents */
549
550	struct acpi_erdt_mmrc {
551	struct acpi_subtbl_hdr_16 header;
552	u32 reserved1;
553	u32 flags;
554	u8 index_fn;
555	u8 reserved2[11];
556	u64 reg_base;
557	u32 reg_size;
558	u8 counter_width;
559	u64 up_scale;
560	u8 reserved3[7];
561	u32 corr_factor_list_len;
562	u32 corr_factor_list[];
563	};
564
565	/* 5: MARC - Memory-bandwidth Allocation Registers for CPU Agents */
566
567	struct acpi_erdt_marc {
568	struct acpi_subtbl_hdr_16 header;
569	u16 reserved1;
570	u16 flags;
571	u8 index_fn;
572	u8 reserved2[7];
573	u64 reg_base_opt;
574	u64 reg_base_min;
575	u64 reg_base_max;
576	u32 mba_reg_size;
577	u32 mba_ctrl_range;
578	};
579
580	/* 6: CARC - Cache Allocation Registers for CPU Agents */
581
582	struct acpi_erdt_carc {
583	struct acpi_subtbl_hdr_16 header;
584	};
585
586	/* 7: CMRD - Cache Monitoring Registers for Device Agents */
587
588	struct acpi_erdt_cmrd {
589	struct acpi_subtbl_hdr_16 header;
590	u32 reserved1;
591	u32 flags;
592	u8 index_fn;
593	u8 reserved2[11];
594	u64 reg_base;
595	u32 reg_size;
596	u16 cmt_reg_off;
597	u16 cmt_clump_size;
598	u64 up_scale;
599	};
600
601	/* 8: IBRD - Cache Monitoring Registers for Device Agents */
602
603	struct acpi_erdt_ibrd {
604	struct acpi_subtbl_hdr_16 header;
605	u32 reserved1;
606	u32 flags;
607	u8 index_fn;
608	u8 reserved2[11];
609	u64 reg_base;
610	u32 reg_size;
611	u16 total_bw_offset;
612	u16 Iomiss_bw_offset;
613	u16 total_bw_clump;
614	u16 Iomiss_bw_clump;
615	u8 reserved3[7];
616	u8 counter_width;
617	u64 up_scale;
618	u32 corr_factor_list_len;
619	u32 corr_factor_list[];
620	};
621
622	/* 9: IBAD - IO bandwidth Allocation Registers for device agents */
623
624	struct acpi_erdt_ibad {
625	struct acpi_subtbl_hdr_16 header;
626	};
627
628	/* 10: CARD - IO bandwidth Allocation Registers for Device Agents */
629
630	struct acpi_erdt_card {
631	struct acpi_subtbl_hdr_16 header;
632	u32 reserved1;
633	u32 flags;
634	u32 contention_mask;
635	u8 index_fn;
636	u8 reserved2[7];
637	u64 reg_base;
638	u32 reg_size;
639	u16 cat_reg_offset;
640	u16 cat_reg_block_size;
641	};
642
643	/*******************************************************************************
644	*
645	* IORT - IO Remapping Table
646	*
647	* Conforms to "IO Remapping Table System Software on ARM Platforms",
648	* Document number: ARM DEN 0049E.f, Apr 2024
649	*
650	******************************************************************************/
651
652	struct acpi_table_iort {
653	struct acpi_table_header header;
654	u32 node_count;
655	u32 node_offset;
656	u32 reserved;
657	};
658
659	/*
660	* IORT subtables
661	*/
662	struct acpi_iort_node {
663	u8 type;
664	u16 length;
665	u8 revision;
666	u32 identifier;
667	u32 mapping_count;
668	u32 mapping_offset;
669	char node_data[];
670	};
671
672	/* Values for subtable Type above */
673
674	enum acpi_iort_node_type {
675	ACPI_IORT_NODE_ITS_GROUP = 0x00,
676	ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
677	ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
678	ACPI_IORT_NODE_SMMU = 0x03,
679	ACPI_IORT_NODE_SMMU_V3 = 0x04,
680	ACPI_IORT_NODE_PMCG = 0x05,
681	ACPI_IORT_NODE_RMR = 0x06,
682	};
683
684	struct acpi_iort_id_mapping {
685	u32 input_base; /* Lowest value in input range */
686	u32 id_count; /* Number of IDs */
687	u32 output_base; /* Lowest value in output range */
688	u32 output_reference; /* A reference to the output node */
689	u32 flags;
690	};
691
692	/* Masks for Flags field above for IORT subtable */
693
694	#define ACPI_IORT_ID_SINGLE_MAPPING (1)
695
696	struct acpi_iort_memory_access {
697	u32 cache_coherency;
698	u8 hints;
699	u16 reserved;
700	u8 memory_flags;
701	};
702
703	/* Values for cache_coherency field above */
704
705	#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
706	#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
707
708	/* Masks for Hints field above */
709
710	#define ACPI_IORT_HT_TRANSIENT (1)
711	#define ACPI_IORT_HT_WRITE (1<<1)
712	#define ACPI_IORT_HT_READ (1<<2)
713	#define ACPI_IORT_HT_OVERRIDE (1<<3)
714
715	/* Masks for memory_flags field above */
716
717	#define ACPI_IORT_MF_COHERENCY (1)
718	#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
719	#define ACPI_IORT_MF_CANWBS (1<<2)
720
721	/*
722	* IORT node specific subtables
723	*/
724	struct acpi_iort_its_group {
725	u32 its_count;
726	u32 identifiers[]; /* GIC ITS identifier array */
727	};
728
729	struct acpi_iort_named_component {
730	u32 node_flags;
731	u64 memory_properties; /* Memory access properties */
732	u8 memory_address_limit; /* Memory address size limit */
733	char device_name[]; /* Path of namespace object */
734	};
735
736	/* Masks for Flags field above */
737
738	#define ACPI_IORT_NC_STALL_SUPPORTED (1)
739	#define ACPI_IORT_NC_PASID_BITS (31<<1)
740
741	struct acpi_iort_root_complex {
742	u64 memory_properties; /* Memory access properties */
743	u32 ats_attribute;
744	u32 pci_segment_number;
745	u8 memory_address_limit; /* Memory address size limit */
746	u16 pasid_capabilities; /* PASID Capabilities */
747	u8 reserved[]; /* Reserved, must be zero */
748	};
749
750	/* Masks for ats_attribute field above */
751
752	#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
753	#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
754	#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
755
756	/* Masks for pasid_capabilities field above */
757	#define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
758
759	struct acpi_iort_smmu {
760	u64 base_address; /* SMMU base address */
761	u64 span; /* Length of memory range */
762	u32 model;
763	u32 flags;
764	u32 global_interrupt_offset;
765	u32 context_interrupt_count;
766	u32 context_interrupt_offset;
767	u32 pmu_interrupt_count;
768	u32 pmu_interrupt_offset;
769	u64 interrupts[]; /* Interrupt array */
770	};
771
772	/* Values for Model field above */
773
774	#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
775	#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
776	#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
777	#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
778	#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
779	#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
780
781	/* Masks for Flags field above */
782
783	#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
784	#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
785
786	/* Global interrupt format */
787
788	struct acpi_iort_smmu_gsi {
789	u32 nsg_irpt;
790	u32 nsg_irpt_flags;
791	u32 nsg_cfg_irpt;
792	u32 nsg_cfg_irpt_flags;
793	};
794
795	struct acpi_iort_smmu_v3 {
796	u64 base_address; /* SMMUv3 base address */
797	u32 flags;
798	u32 reserved;
799	u64 vatos_address;
800	u32 model;
801	u32 event_gsiv;
802	u32 pri_gsiv;
803	u32 gerr_gsiv;
804	u32 sync_gsiv;
805	u32 pxm;
806	u32 id_mapping_index;
807	};
808
809	/* Values for Model field above */
810
811	#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
812	#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
813	#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
814
815	/* Masks for Flags field above */
816
817	#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
818	#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
819	#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
820	#define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4)
821
822	struct acpi_iort_pmcg {
823	u64 page0_base_address;
824	u32 overflow_gsiv;
825	u32 node_reference;
826	u64 page1_base_address;
827	};
828
829	struct acpi_iort_rmr {
830	u32 flags;
831	u32 rmr_count;
832	u32 rmr_offset;
833	};
834
835	/* Masks for Flags field above */
836	#define ACPI_IORT_RMR_REMAP_PERMITTED (1)
837	#define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1)
838
839	/*
840	* Macro to access the Access Attributes in flags field above:
841	* Access Attributes is encoded in bits 9:2
842	*/
843	#define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF)
844
845	/* Values for above Access Attributes */
846
847	#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00
848	#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01
849	#define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02
850	#define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03
851	#define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04
852	#define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05
853
854	struct acpi_iort_rmr_desc {
855	u64 base_address;
856	u64 length;
857	u32 reserved;
858	};
859
860	/*******************************************************************************
861	*
862	* IVRS - I/O Virtualization Reporting Structure
863	* Version 1
864	*
865	* Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
866	* Revision 1.26, February 2009.
867	*
868	******************************************************************************/
869
870	struct acpi_table_ivrs {
871	struct acpi_table_header header; /* Common ACPI table header */
872	u32 info; /* Common virtualization info */
873	u64 reserved;
874	};
875
876	/* Values for Info field above */
877
878	#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
879	#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
880	#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
881
882	/* IVRS subtable header */
883
884	struct acpi_ivrs_header {
885	u8 type; /* Subtable type */
886	u8 flags;
887	u16 length; /* Subtable length */
888	u16 device_id; /* ID of IOMMU */
889	};
890
891	/* Values for subtable Type above */
892
893	enum acpi_ivrs_type {
894	ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
895	ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
896	ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
897	ACPI_IVRS_TYPE_MEMORY1 = 0x20,
898	ACPI_IVRS_TYPE_MEMORY2 = 0x21,
899	ACPI_IVRS_TYPE_MEMORY3 = 0x22
900	};
901
902	/* Masks for Flags field above for IVHD subtable */
903
904	#define ACPI_IVHD_TT_ENABLE (1)
905	#define ACPI_IVHD_PASS_PW (1<<1)
906	#define ACPI_IVHD_RES_PASS_PW (1<<2)
907	#define ACPI_IVHD_ISOC (1<<3)
908	#define ACPI_IVHD_IOTLB (1<<4)
909
910	/* Masks for Flags field above for IVMD subtable */
911
912	#define ACPI_IVMD_UNITY (1)
913	#define ACPI_IVMD_READ (1<<1)
914	#define ACPI_IVMD_WRITE (1<<2)
915	#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
916
917	/*
918	* IVRS subtables, correspond to Type in struct acpi_ivrs_header
919	*/
920
921	/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
922
923	struct acpi_ivrs_hardware_10 {
924	struct acpi_ivrs_header header;
925	u16 capability_offset; /* Offset for IOMMU control fields */
926	u64 base_address; /* IOMMU control registers */
927	u16 pci_segment_group;
928	u16 info; /* MSI number and unit ID */
929	u32 feature_reporting;
930	};
931
932	/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
933
934	struct acpi_ivrs_hardware_11 {
935	struct acpi_ivrs_header header;
936	u16 capability_offset; /* Offset for IOMMU control fields */
937	u64 base_address; /* IOMMU control registers */
938	u16 pci_segment_group;
939	u16 info; /* MSI number and unit ID */
940	u32 attributes;
941	u64 efr_register_image;
942	u64 reserved;
943	};
944
945	/* Masks for Info field above */
946
947	#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
948	#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
949
950	/*
951	* Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
952	* Upper two bits of the Type field are the (encoded) length of the structure.
953	* Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
954	* are reserved for future use but not defined.
955	*/
956	struct acpi_ivrs_de_header {
957	u8 type;
958	u16 id;
959	u8 data_setting;
960	};
961
962	/* Length of device entry is in the top two bits of Type field above */
963
964	#define ACPI_IVHD_ENTRY_LENGTH 0xC0
965
966	/* Values for device entry Type field above */
967
968	enum acpi_ivrs_device_entry_type {
969	/* 4-byte device entries, all use struct acpi_ivrs_device4 */
970
971	ACPI_IVRS_TYPE_PAD4 = 0,
972	ACPI_IVRS_TYPE_ALL = 1,
973	ACPI_IVRS_TYPE_SELECT = 2,
974	ACPI_IVRS_TYPE_START = 3,
975	ACPI_IVRS_TYPE_END = 4,
976
977	/* 8-byte device entries */
978
979	ACPI_IVRS_TYPE_PAD8 = 64,
980	ACPI_IVRS_TYPE_NOT_USED = 65,
981	ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
982	ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
983	ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
984	ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
985	ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
986
987	/* Variable-length device entries */
988
989	ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
990	};
991
992	/* Values for Data field above */
993
994	#define ACPI_IVHD_INIT_PASS (1)
995	#define ACPI_IVHD_EINT_PASS (1<<1)
996	#define ACPI_IVHD_NMI_PASS (1<<2)
997	#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
998	#define ACPI_IVHD_LINT0_PASS (1<<6)
999	#define ACPI_IVHD_LINT1_PASS (1<<7)
1000
1001	/* Types 0-4: 4-byte device entry */
1002
1003	struct acpi_ivrs_device4 {
1004	struct acpi_ivrs_de_header header;
1005	};
1006
1007	/* Types 66-67: 8-byte device entry */
1008
1009	struct acpi_ivrs_device8a {
1010	struct acpi_ivrs_de_header header;
1011	u8 reserved1;
1012	u16 used_id;
1013	u8 reserved2;
1014	};
1015
1016	/* Types 70-71: 8-byte device entry */
1017
1018	struct acpi_ivrs_device8b {
1019	struct acpi_ivrs_de_header header;
1020	u32 extended_data;
1021	};
1022
1023	/* Values for extended_data above */
1024
1025	#define ACPI_IVHD_ATS_DISABLED (1<<31)
1026
1027	/* Type 72: 8-byte device entry */
1028
1029	struct acpi_ivrs_device8c {
1030	struct acpi_ivrs_de_header header;
1031	u8 handle;
1032	u16 used_id;
1033	u8 variety;
1034	};
1035
1036	/* Values for Variety field above */
1037
1038	#define ACPI_IVHD_IOAPIC 1
1039	#define ACPI_IVHD_HPET 2
1040
1041	/* Type 240: variable-length device entry */
1042
1043	struct acpi_ivrs_device_hid {
1044	struct acpi_ivrs_de_header header;
1045	u64 acpi_hid;
1046	u64 acpi_cid;
1047	u8 uid_type;
1048	u8 uid_length;
1049	};
1050
1051	/* Values for uid_type above */
1052
1053	#define ACPI_IVRS_UID_NOT_PRESENT 0
1054	#define ACPI_IVRS_UID_IS_INTEGER 1
1055	#define ACPI_IVRS_UID_IS_STRING 2
1056
1057	/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
1058
1059	struct acpi_ivrs_memory {
1060	struct acpi_ivrs_header header;
1061	u16 aux_data;
1062	u64 reserved;
1063	u64 start_address;
1064	u64 memory_length;
1065	};
1066
1067	/*******************************************************************************
1068	*
1069	* LPIT - Low Power Idle Table
1070	*
1071	* Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
1072	*
1073	******************************************************************************/
1074
1075	struct acpi_table_lpit {
1076	struct acpi_table_header header; /* Common ACPI table header */
1077	};
1078
1079	/* LPIT subtable header */
1080
1081	struct acpi_lpit_header {
1082	u32 type; /* Subtable type */
1083	u32 length; /* Subtable length */
1084	u16 unique_id;
1085	u16 reserved;
1086	u32 flags;
1087	};
1088
1089	/* Values for subtable Type above */
1090
1091	enum acpi_lpit_type {
1092	ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
1093	ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
1094	};
1095
1096	/* Masks for Flags field above */
1097
1098	#define ACPI_LPIT_STATE_DISABLED (1)
1099	#define ACPI_LPIT_NO_COUNTER (1<<1)
1100
1101	/*
1102	* LPIT subtables, correspond to Type in struct acpi_lpit_header
1103	*/
1104
1105	/* 0x00: Native C-state instruction based LPI structure */
1106
1107	struct acpi_lpit_native {
1108	struct acpi_lpit_header header;
1109	struct acpi_generic_address entry_trigger;
1110	u32 residency;
1111	u32 latency;
1112	struct acpi_generic_address residency_counter;
1113	u64 counter_frequency;
1114	};
1115
1116	/*******************************************************************************
1117	*
1118	* MADT - Multiple APIC Description Table
1119	* Version 3
1120	*
1121	******************************************************************************/
1122
1123	struct acpi_table_madt {
1124	struct acpi_table_header header; /* Common ACPI table header */
1125	u32 address; /* Physical address of local APIC */
1126	u32 flags;
1127	};
1128
1129	/* Masks for Flags field above */
1130
1131	#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
1132
1133	/* Values for PCATCompat flag */
1134
1135	#define ACPI_MADT_DUAL_PIC 1
1136	#define ACPI_MADT_MULTIPLE_APIC 0
1137
1138	/* Values for MADT subtable type in struct acpi_subtable_header */
1139
1140	enum acpi_madt_type {
1141	ACPI_MADT_TYPE_LOCAL_APIC = 0,
1142	ACPI_MADT_TYPE_IO_APIC = 1,
1143	ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
1144	ACPI_MADT_TYPE_NMI_SOURCE = 3,
1145	ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
1146	ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
1147	ACPI_MADT_TYPE_IO_SAPIC = 6,
1148	ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
1149	ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
1150	ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
1151	ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
1152	ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
1153	ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
1154	ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
1155	ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
1156	ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
1157	ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
1158	ACPI_MADT_TYPE_CORE_PIC = 17,
1159	ACPI_MADT_TYPE_LIO_PIC = 18,
1160	ACPI_MADT_TYPE_HT_PIC = 19,
1161	ACPI_MADT_TYPE_EIO_PIC = 20,
1162	ACPI_MADT_TYPE_MSI_PIC = 21,
1163	ACPI_MADT_TYPE_BIO_PIC = 22,
1164	ACPI_MADT_TYPE_LPC_PIC = 23,
1165	ACPI_MADT_TYPE_RINTC = 24,
1166	ACPI_MADT_TYPE_IMSIC = 25,
1167	ACPI_MADT_TYPE_APLIC = 26,
1168	ACPI_MADT_TYPE_PLIC = 27,
1169	ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */
1170	ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */
1171	};
1172
1173	/*
1174	* MADT Subtables, correspond to Type in struct acpi_subtable_header
1175	*/
1176
1177	/* 0: Processor Local APIC */
1178
1179	struct acpi_madt_local_apic {
1180	struct acpi_subtable_header header;
1181	u8 processor_id; /* ACPI processor id */
1182	u8 id; /* Processor's local APIC id */
1183	u32 lapic_flags;
1184	};
1185
1186	/* 1: IO APIC */
1187
1188	struct acpi_madt_io_apic {
1189	struct acpi_subtable_header header;
1190	u8 id; /* I/O APIC ID */
1191	u8 reserved; /* reserved - must be zero */
1192	u32 address; /* APIC physical address */
1193	u32 global_irq_base; /* Global system interrupt where INTI lines start */
1194	};
1195
1196	/* 2: Interrupt Override */
1197
1198	struct acpi_madt_interrupt_override {
1199	struct acpi_subtable_header header;
1200	u8 bus; /* 0 - ISA */
1201	u8 source_irq; /* Interrupt source (IRQ) */
1202	u32 global_irq; /* Global system interrupt */
1203	u16 inti_flags;
1204	};
1205
1206	/* 3: NMI Source */
1207
1208	struct acpi_madt_nmi_source {
1209	struct acpi_subtable_header header;
1210	u16 inti_flags;
1211	u32 global_irq; /* Global system interrupt */
1212	};
1213
1214	/* 4: Local APIC NMI */
1215
1216	struct acpi_madt_local_apic_nmi {
1217	struct acpi_subtable_header header;
1218	u8 processor_id; /* ACPI processor id */
1219	u16 inti_flags;
1220	u8 lint; /* LINTn to which NMI is connected */
1221	};
1222
1223	/* 5: Address Override */
1224
1225	struct acpi_madt_local_apic_override {
1226	struct acpi_subtable_header header;
1227	u16 reserved; /* Reserved, must be zero */
1228	u64 address; /* APIC physical address */
1229	};
1230
1231	/* 6: I/O Sapic */
1232
1233	struct acpi_madt_io_sapic {
1234	struct acpi_subtable_header header;
1235	u8 id; /* I/O SAPIC ID */
1236	u8 reserved; /* Reserved, must be zero */
1237	u32 global_irq_base; /* Global interrupt for SAPIC start */
1238	u64 address; /* SAPIC physical address */
1239	};
1240
1241	/* 7: Local Sapic */
1242
1243	struct acpi_madt_local_sapic {
1244	struct acpi_subtable_header header;
1245	u8 processor_id; /* ACPI processor id */
1246	u8 id; /* SAPIC ID */
1247	u8 eid; /* SAPIC EID */
1248	u8 reserved[3]; /* Reserved, must be zero */
1249	u32 lapic_flags;
1250	u32 uid; /* Numeric UID - ACPI 3.0 */
1251	char uid_string[]; /* String UID - ACPI 3.0 */
1252	};
1253
1254	/* 8: Platform Interrupt Source */
1255
1256	struct acpi_madt_interrupt_source {
1257	struct acpi_subtable_header header;
1258	u16 inti_flags;
1259	u8 type; /* 1=PMI, 2=INIT, 3=corrected */
1260	u8 id; /* Processor ID */
1261	u8 eid; /* Processor EID */
1262	u8 io_sapic_vector; /* Vector value for PMI interrupts */
1263	u32 global_irq; /* Global system interrupt */
1264	u32 flags; /* Interrupt Source Flags */
1265	};
1266
1267	/* Masks for Flags field above */
1268
1269	#define ACPI_MADT_CPEI_OVERRIDE (1)
1270
1271	/* 9: Processor Local X2APIC (ACPI 4.0) */
1272
1273	struct acpi_madt_local_x2apic {
1274	struct acpi_subtable_header header;
1275	u16 reserved; /* reserved - must be zero */
1276	u32 local_apic_id; /* Processor x2APIC ID */
1277	u32 lapic_flags;
1278	u32 uid; /* ACPI processor UID */
1279	};
1280
1281	/* 10: Local X2APIC NMI (ACPI 4.0) */
1282
1283	struct acpi_madt_local_x2apic_nmi {
1284	struct acpi_subtable_header header;
1285	u16 inti_flags;
1286	u32 uid; /* ACPI processor UID */
1287	u8 lint; /* LINTn to which NMI is connected */
1288	u8 reserved[3]; /* reserved - must be zero */
1289	};
1290
1291	/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */
1292
1293	struct acpi_madt_generic_interrupt {
1294	struct acpi_subtable_header header;
1295	u16 reserved; /* reserved - must be zero */
1296	u32 cpu_interface_number;
1297	u32 uid;
1298	u32 flags;
1299	u32 parking_version;
1300	u32 performance_interrupt;
1301	u64 parked_address;
1302	u64 base_address;
1303	u64 gicv_base_address;
1304	u64 gich_base_address;
1305	u32 vgic_interrupt;
1306	u64 gicr_base_address;
1307	u64 arm_mpidr;
1308	u8 efficiency_class;
1309	u8 reserved2[1];
1310	u16 spe_interrupt; /* ACPI 6.3 */
1311	u16 trbe_interrupt; /* ACPI 6.5 */
1312	};
1313
1314	/* Masks for Flags field above */
1315
1316	/* ACPI_MADT_ENABLED (1) Processor is usable if set */
1317	#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
1318	#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
1319	#define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */
1320	#define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */
1321
1322	/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
1323
1324	struct acpi_madt_generic_distributor {
1325	struct acpi_subtable_header header;
1326	u16 reserved; /* reserved - must be zero */
1327	u32 gic_id;
1328	u64 base_address;
1329	u32 global_irq_base;
1330	u8 version;
1331	u8 reserved2[3]; /* reserved - must be zero */
1332	};
1333
1334	/* Values for Version field above */
1335
1336	enum acpi_madt_gic_version {
1337	ACPI_MADT_GIC_VERSION_NONE = 0,
1338	ACPI_MADT_GIC_VERSION_V1 = 1,
1339	ACPI_MADT_GIC_VERSION_V2 = 2,
1340	ACPI_MADT_GIC_VERSION_V3 = 3,
1341	ACPI_MADT_GIC_VERSION_V4 = 4,
1342	ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
1343	};
1344
1345	/* 13: Generic MSI Frame (ACPI 5.1) */
1346
1347	struct acpi_madt_generic_msi_frame {
1348	struct acpi_subtable_header header;
1349	u16 reserved; /* reserved - must be zero */
1350	u32 msi_frame_id;
1351	u64 base_address;
1352	u32 flags;
1353	u16 spi_count;
1354	u16 spi_base;
1355	};
1356
1357	/* Masks for Flags field above */
1358
1359	#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
1360
1361	/* 14: Generic Redistributor (ACPI 5.1) */
1362
1363	struct acpi_madt_generic_redistributor {
1364	struct acpi_subtable_header header;
1365	u8 flags;
1366	u8 reserved; /* reserved - must be zero */
1367	u64 base_address;
1368	u32 length;
1369	};
1370
1371	#define ACPI_MADT_GICR_NON_COHERENT (1)
1372
1373	/* 15: Generic Translator (ACPI 6.0) */
1374
1375	struct acpi_madt_generic_translator {
1376	struct acpi_subtable_header header;
1377	u8 flags;
1378	u8 reserved; /* reserved - must be zero */
1379	u32 translation_id;
1380	u64 base_address;
1381	u32 reserved2;
1382	};
1383
1384	#define ACPI_MADT_ITS_NON_COHERENT (1)
1385
1386	/* 16: Multiprocessor wakeup (ACPI 6.4) */
1387
1388	struct acpi_madt_multiproc_wakeup {
1389	struct acpi_subtable_header header;
1390	u16 version;
1391	u32 reserved; /* reserved - must be zero */
1392	u64 mailbox_address;
1393	u64 reset_vector;
1394	};
1395
1396	/* Values for Version field above */
1397
1398	enum acpi_madt_multiproc_wakeup_version {
1399	ACPI_MADT_MP_WAKEUP_VERSION_NONE = 0,
1400	ACPI_MADT_MP_WAKEUP_VERSION_V1 = 1,
1401	ACPI_MADT_MP_WAKEUP_VERSION_RESERVED = 2, /* 2 and greater are reserved */
1402	};
1403
1404	#define ACPI_MADT_MP_WAKEUP_SIZE_V0 16
1405	#define ACPI_MADT_MP_WAKEUP_SIZE_V1 24
1406
1407	#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
1408	#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
1409
1410	struct acpi_madt_multiproc_wakeup_mailbox {
1411	u16 command;
1412	u16 reserved; /* reserved - must be zero */
1413	u32 apic_id;
1414	u64 wakeup_vector;
1415	u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
1416	u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
1417	};
1418
1419	#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
1420	#define ACPI_MP_WAKE_COMMAND_TEST 2
1421
1422	/* 17: CPU Core Interrupt Controller (ACPI 6.5) */
1423
1424	struct acpi_madt_core_pic {
1425	struct acpi_subtable_header header;
1426	u8 version;
1427	u32 processor_id;
1428	u32 core_id;
1429	u32 flags;
1430	};
1431
1432	/* Values for Version field above */
1433
1434	enum acpi_madt_core_pic_version {
1435	ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
1436	ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
1437	ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1438	};
1439
1440	/* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */
1441
1442	struct acpi_madt_lio_pic {
1443	struct acpi_subtable_header header;
1444	u8 version;
1445	u64 address;
1446	u16 size;
1447	u8 cascade[2];
1448	u32 cascade_map[2];
1449	};
1450
1451	/* Values for Version field above */
1452
1453	enum acpi_madt_lio_pic_version {
1454	ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
1455	ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
1456	ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1457	};
1458
1459	/* 19: HT Interrupt Controller (ACPI 6.5) */
1460
1461	struct acpi_madt_ht_pic {
1462	struct acpi_subtable_header header;
1463	u8 version;
1464	u64 address;
1465	u16 size;
1466	u8 cascade[8];
1467	};
1468
1469	/* Values for Version field above */
1470
1471	enum acpi_madt_ht_pic_version {
1472	ACPI_MADT_HT_PIC_VERSION_NONE = 0,
1473	ACPI_MADT_HT_PIC_VERSION_V1 = 1,
1474	ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1475	};
1476
1477	/* 20: Extend I/O Interrupt Controller (ACPI 6.5) */
1478
1479	struct acpi_madt_eio_pic {
1480	struct acpi_subtable_header header;
1481	u8 version;
1482	u8 cascade;
1483	u8 node;
1484	u64 node_map;
1485	};
1486
1487	/* Values for Version field above */
1488
1489	enum acpi_madt_eio_pic_version {
1490	ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
1491	ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
1492	ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1493	};
1494
1495	/* 21: MSI Interrupt Controller (ACPI 6.5) */
1496
1497	struct acpi_madt_msi_pic {
1498	struct acpi_subtable_header header;
1499	u8 version;
1500	u64 msg_address;
1501	u32 start;
1502	u32 count;
1503	};
1504
1505	/* Values for Version field above */
1506
1507	enum acpi_madt_msi_pic_version {
1508	ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
1509	ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
1510	ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1511	};
1512
1513	/* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */
1514
1515	struct acpi_madt_bio_pic {
1516	struct acpi_subtable_header header;
1517	u8 version;
1518	u64 address;
1519	u16 size;
1520	u16 id;
1521	u16 gsi_base;
1522	};
1523
1524	/* Values for Version field above */
1525
1526	enum acpi_madt_bio_pic_version {
1527	ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
1528	ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
1529	ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1530	};
1531
1532	/* 23: LPC Interrupt Controller (ACPI 6.5) */
1533
1534	struct acpi_madt_lpc_pic {
1535	struct acpi_subtable_header header;
1536	u8 version;
1537	u64 address;
1538	u16 size;
1539	u8 cascade;
1540	};
1541
1542	/* Values for Version field above */
1543
1544	enum acpi_madt_lpc_pic_version {
1545	ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
1546	ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
1547	ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1548	};
1549
1550	/* 24: RISC-V INTC */
1551	struct acpi_madt_rintc {
1552	struct acpi_subtable_header header;
1553	u8 version;
1554	u8 reserved;
1555	u32 flags;
1556	u64 hart_id;
1557	u32 uid; /* ACPI processor UID */
1558	u32 ext_intc_id; /* External INTC Id */
1559	u64 imsic_addr; /* IMSIC base address */
1560	u32 imsic_size; /* IMSIC size */
1561	};
1562
1563	/* Values for RISC-V INTC Version field above */
1564
1565	enum acpi_madt_rintc_version {
1566	ACPI_MADT_RINTC_VERSION_NONE = 0,
1567	ACPI_MADT_RINTC_VERSION_V1 = 1,
1568	ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1569	};
1570
1571	/* 25: RISC-V IMSIC */
1572	struct acpi_madt_imsic {
1573	struct acpi_subtable_header header;
1574	u8 version;
1575	u8 reserved;
1576	u32 flags;
1577	u16 num_ids;
1578	u16 num_guest_ids;
1579	u8 guest_index_bits;
1580	u8 hart_index_bits;
1581	u8 group_index_bits;
1582	u8 group_index_shift;
1583	};
1584
1585	/* 26: RISC-V APLIC */
1586	struct acpi_madt_aplic {
1587	struct acpi_subtable_header header;
1588	u8 version;
1589	u8 id;
1590	u32 flags;
1591	u8 hw_id[8];
1592	u16 num_idcs;
1593	u16 num_sources;
1594	u32 gsi_base;
1595	u64 base_addr;
1596	u32 size;
1597	};
1598
1599	/* 27: RISC-V PLIC */
1600	struct acpi_madt_plic {
1601	struct acpi_subtable_header header;
1602	u8 version;
1603	u8 id;
1604	u8 hw_id[8];
1605	u16 num_irqs;
1606	u16 max_prio;
1607	u32 flags;
1608	u32 size;
1609	u64 base_addr;
1610	u32 gsi_base;
1611	};
1612
1613	/* 80: OEM data */
1614
1615	struct acpi_madt_oem_data {
1616	ACPI_FLEX_ARRAY(u8, oem_data);
1617	};
1618
1619	/*
1620	* Common flags fields for MADT subtables
1621	*/
1622
1623	/* MADT Local APIC flags */
1624
1625	#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1626	#define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1627
1628	/* MADT MPS INTI flags (inti_flags) */
1629
1630	#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1631	#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1632
1633	/* Values for MPS INTI flags */
1634
1635	#define ACPI_MADT_POLARITY_CONFORMS 0
1636	#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1637	#define ACPI_MADT_POLARITY_RESERVED 2
1638	#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1639
1640	#define ACPI_MADT_TRIGGER_CONFORMS (0)
1641	#define ACPI_MADT_TRIGGER_EDGE (1<<2)
1642	#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1643	#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1644
1645	/*******************************************************************************
1646	*
1647	* MCFG - PCI Memory Mapped Configuration table and subtable
1648	* Version 1
1649	*
1650	* Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1651	*
1652	******************************************************************************/
1653
1654	struct acpi_table_mcfg {
1655	struct acpi_table_header header; /* Common ACPI table header */
1656	u8 reserved[8];
1657	};
1658
1659	/* Subtable */
1660
1661	struct acpi_mcfg_allocation {
1662	u64 address; /* Base address, processor-relative */
1663	u16 pci_segment; /* PCI segment group number */
1664	u8 start_bus_number; /* Starting PCI Bus number */
1665	u8 end_bus_number; /* Final PCI Bus number */
1666	u32 reserved;
1667	};
1668
1669	/*******************************************************************************
1670	*
1671	* MCHI - Management Controller Host Interface Table
1672	* Version 1
1673	*
1674	* Conforms to "Management Component Transport Protocol (MCTP) Host
1675	* Interface Specification", Revision 1.0.0a, October 13, 2009
1676	*
1677	******************************************************************************/
1678
1679	struct acpi_table_mchi {
1680	struct acpi_table_header header; /* Common ACPI table header */
1681	u8 interface_type;
1682	u8 protocol;
1683	u64 protocol_data;
1684	u8 interrupt_type;
1685	u8 gpe;
1686	u8 pci_device_flag;
1687	u32 global_interrupt;
1688	struct acpi_generic_address control_register;
1689	u8 pci_segment;
1690	u8 pci_bus;
1691	u8 pci_device;
1692	u8 pci_function;
1693	};
1694
1695	/*******************************************************************************
1696	*
1697	* MPAM - Memory System Resource Partitioning and Monitoring
1698	*
1699	* Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0"
1700	* Document number: ARM DEN 0065, December, 2022.
1701	*
1702	******************************************************************************/
1703
1704	/* MPAM RIS locator types. Table 11, Location types */
1705	enum acpi_mpam_locator_type {
1706	ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0,
1707	ACPI_MPAM_LOCATION_TYPE_MEMORY = 1,
1708	ACPI_MPAM_LOCATION_TYPE_SMMU = 2,
1709	ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3,
1710	ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4,
1711	ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5,
1712	ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF
1713	};
1714
1715	/* MPAM Functional dependency descriptor. Table 10 */
1716	struct acpi_mpam_func_deps {
1717	u32 producer;
1718	u32 reserved;
1719	};
1720
1721	/* MPAM Processor cache locator descriptor. Table 13 */
1722	struct acpi_mpam_resource_cache_locator {
1723	u64 cache_reference;
1724	u32 reserved;
1725	};
1726
1727	/* MPAM Memory locator descriptor. Table 14 */
1728	struct acpi_mpam_resource_memory_locator {
1729	u64 proximity_domain;
1730	u32 reserved;
1731	};
1732
1733	/* MPAM SMMU locator descriptor. Table 15 */
1734	struct acpi_mpam_resource_smmu_locator {
1735	u64 smmu_interface;
1736	u32 reserved;
1737	};
1738
1739	/* MPAM Memory-side cache locator descriptor. Table 16 */
1740	struct acpi_mpam_resource_memcache_locator {
1741	u8 reserved[7];
1742	u8 level;
1743	u32 reference;
1744	};
1745
1746	/* MPAM ACPI device locator descriptor. Table 17 */
1747	struct acpi_mpam_resource_acpi_locator {
1748	u64 acpi_hw_id;
1749	u32 acpi_unique_id;
1750	};
1751
1752	/* MPAM Interconnect locator descriptor. Table 18 */
1753	struct acpi_mpam_resource_interconnect_locator {
1754	u64 inter_connect_desc_tbl_off;
1755	u32 reserved;
1756	};
1757
1758	/* MPAM Locator structure. Table 12 */
1759	struct acpi_mpam_resource_generic_locator {
1760	u64 descriptor1;
1761	u32 descriptor2;
1762	};
1763
1764	union acpi_mpam_resource_locator {
1765	struct acpi_mpam_resource_cache_locator cache_locator;
1766	struct acpi_mpam_resource_memory_locator memory_locator;
1767	struct acpi_mpam_resource_smmu_locator smmu_locator;
1768	struct acpi_mpam_resource_memcache_locator mem_cache_locator;
1769	struct acpi_mpam_resource_acpi_locator acpi_locator;
1770	struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator;
1771	struct acpi_mpam_resource_generic_locator generic_locator;
1772	};
1773
1774	/* Memory System Component Resource Node Structure Table 9 */
1775	struct acpi_mpam_resource_node {
1776	u32 identifier;
1777	u8 ris_index;
1778	u16 reserved1;
1779	u8 locator_type;
1780	union acpi_mpam_resource_locator locator;
1781	u32 num_functional_deps;
1782	};
1783
1784	/* Memory System Component (MSC) Node Structure. Table 4 */
1785	struct acpi_mpam_msc_node {
1786	u16 length;
1787	u8 interface_type;
1788	u8 reserved;
1789	u32 identifier;
1790	u64 base_address;
1791	u32 mmio_size;
1792	u32 overflow_interrupt;
1793	u32 overflow_interrupt_flags;
1794	u32 reserved1;
1795	u32 overflow_interrupt_affinity;
1796	u32 error_interrupt;
1797	u32 error_interrupt_flags;
1798	u32 reserved2;
1799	u32 error_interrupt_affinity;
1800	u32 max_nrdy_usec;
1801	u64 hardware_id_linked_device;
1802	u32 instance_id_linked_device;
1803	u32 num_resource_nodes;
1804	};
1805
1806	struct acpi_table_mpam {
1807	struct acpi_table_header header; /* Common ACPI table header */
1808	};
1809
1810	/*******************************************************************************
1811	*
1812	* MPST - Memory Power State Table (ACPI 5.0)
1813	* Version 1
1814	*
1815	******************************************************************************/
1816
1817	#define ACPI_MPST_CHANNEL_INFO \
1818	u8 channel_id; \
1819	u8 reserved1[3]; \
1820	u16 power_node_count; \
1821	u16 reserved2;
1822
1823	/* Main table */
1824
1825	struct acpi_table_mpst {
1826	struct acpi_table_header header; /* Common ACPI table header */
1827	ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1828	};
1829
1830	/* Memory Platform Communication Channel Info */
1831
1832	struct acpi_mpst_channel {
1833	ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1834	};
1835
1836	/* Memory Power Node Structure */
1837
1838	struct acpi_mpst_power_node {
1839	u8 flags;
1840	u8 reserved1;
1841	u16 node_id;
1842	u32 length;
1843	u64 range_address;
1844	u64 range_length;
1845	u32 num_power_states;
1846	u32 num_physical_components;
1847	};
1848
1849	/* Values for Flags field above */
1850
1851	#define ACPI_MPST_ENABLED 1
1852	#define ACPI_MPST_POWER_MANAGED 2
1853	#define ACPI_MPST_HOT_PLUG_CAPABLE 4
1854
1855	/* Memory Power State Structure (follows POWER_NODE above) */
1856
1857	struct acpi_mpst_power_state {
1858	u8 power_state;
1859	u8 info_index;
1860	};
1861
1862	/* Physical Component ID Structure (follows POWER_STATE above) */
1863
1864	struct acpi_mpst_component {
1865	u16 component_id;
1866	};
1867
1868	/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1869
1870	struct acpi_mpst_data_hdr {
1871	u16 characteristics_count;
1872	u16 reserved;
1873	};
1874
1875	struct acpi_mpst_power_data {
1876	u8 structure_id;
1877	u8 flags;
1878	u16 reserved1;
1879	u32 average_power;
1880	u32 power_saving;
1881	u64 exit_latency;
1882	u64 reserved2;
1883	};
1884
1885	/* Values for Flags field above */
1886
1887	#define ACPI_MPST_PRESERVE 1
1888	#define ACPI_MPST_AUTOENTRY 2
1889	#define ACPI_MPST_AUTOEXIT 4
1890
1891	/* Shared Memory Region (not part of an ACPI table) */
1892
1893	struct acpi_mpst_shared {
1894	u32 signature;
1895	u16 pcc_command;
1896	u16 pcc_status;
1897	u32 command_register;
1898	u32 status_register;
1899	u32 power_state_id;
1900	u32 power_node_id;
1901	u64 energy_consumed;
1902	u64 average_power;
1903	};
1904
1905	/*******************************************************************************
1906	*
1907	* MSCT - Maximum System Characteristics Table (ACPI 4.0)
1908	* Version 1
1909	*
1910	******************************************************************************/
1911
1912	struct acpi_table_msct {
1913	struct acpi_table_header header; /* Common ACPI table header */
1914	u32 proximity_offset; /* Location of proximity info struct(s) */
1915	u32 max_proximity_domains; /* Max number of proximity domains */
1916	u32 max_clock_domains; /* Max number of clock domains */
1917	u64 max_address; /* Max physical address in system */
1918	};
1919
1920	/* subtable - Maximum Proximity Domain Information. Version 1 */
1921
1922	struct acpi_msct_proximity {
1923	u8 revision;
1924	u8 length;
1925	u32 range_start; /* Start of domain range */
1926	u32 range_end; /* End of domain range */
1927	u32 processor_capacity;
1928	u64 memory_capacity; /* In bytes */
1929	};
1930
1931	/*******************************************************************************
1932	*
1933	* MRRM - Memory Range and Region Mapping (MRRM) table
1934	* Conforms to "Intel Resource Director Technology Architecture Specification"
1935	* Version 1.1, January 2025
1936	*
1937	******************************************************************************/
1938
1939	struct acpi_table_mrrm {
1940	struct acpi_table_header header; /* Common ACPI table header */
1941	u8 max_mem_region; /* Max Memory Regions supported */
1942	u8 flags; /* Region assignment type */
1943	u8 reserved[26];
1944	u8 memory_range_entry[];
1945	};
1946
1947	/* Flags */
1948	#define ACPI_MRRM_FLAGS_REGION_ASSIGNMENT_OS (1<<0)
1949
1950	/*******************************************************************************
1951	*
1952	* Memory Range entry - Memory Range entry in MRRM table
1953	*
1954	******************************************************************************/
1955
1956	struct acpi_mrrm_mem_range_entry {
1957	struct acpi_subtbl_hdr_16 header;
1958	u32 reserved0; /* Reserved */
1959	u64 addr_base; /* Base addr of the mem range */
1960	u64 addr_len; /* Length of the mem range */
1961	u16 region_id_flags; /* Valid local or remote Region-ID */
1962	u8 local_region_id; /* Platform-assigned static local Region-ID */
1963	u8 remote_region_id; /* Platform-assigned static remote Region-ID */
1964	u32 reserved1; /* Reserved */
1965	/* Region-ID Programming Registers[] */
1966	};
1967
1968	/* Values for region_id_flags above */
1969	#define ACPI_MRRM_VALID_REGION_ID_FLAGS_LOCAL (1<<0)
1970	#define ACPI_MRRM_VALID_REGION_ID_FLAGS_REMOTE (1<<1)
1971
1972	/*******************************************************************************
1973	*
1974	* MSDM - Microsoft Data Management table
1975	*
1976	* Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1977	* November 29, 2011. Copyright 2011 Microsoft
1978	*
1979	******************************************************************************/
1980
1981	/* Basic MSDM table is only the common ACPI header */
1982
1983	struct acpi_table_msdm {
1984	struct acpi_table_header header; /* Common ACPI table header */
1985	};
1986
1987	/*******************************************************************************
1988	*
1989	* NFIT - NVDIMM Interface Table (ACPI 6.0+)
1990	* Version 1
1991	*
1992	******************************************************************************/
1993
1994	struct acpi_table_nfit {
1995	struct acpi_table_header header; /* Common ACPI table header */
1996	u32 reserved; /* Reserved, must be zero */
1997	};
1998
1999	/* Subtable header for NFIT */
2000
2001	struct acpi_nfit_header {
2002	u16 type;
2003	u16 length;
2004	};
2005
2006	/* Values for subtable type in struct acpi_nfit_header */
2007
2008	enum acpi_nfit_type {
2009	ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
2010	ACPI_NFIT_TYPE_MEMORY_MAP = 1,
2011	ACPI_NFIT_TYPE_INTERLEAVE = 2,
2012	ACPI_NFIT_TYPE_SMBIOS = 3,
2013	ACPI_NFIT_TYPE_CONTROL_REGION = 4,
2014	ACPI_NFIT_TYPE_DATA_REGION = 5,
2015	ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
2016	ACPI_NFIT_TYPE_CAPABILITIES = 7,
2017	ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
2018	};
2019
2020	/*
2021	* NFIT Subtables
2022	*/
2023
2024	/* 0: System Physical Address Range Structure */
2025
2026	struct acpi_nfit_system_address {
2027	struct acpi_nfit_header header;
2028	u16 range_index;
2029	u16 flags;
2030	u32 reserved; /* Reserved, must be zero */
2031	u32 proximity_domain;
2032	u8 range_guid[16];
2033	u64 address;
2034	u64 length;
2035	u64 memory_mapping;
2036	u64 location_cookie; /* ACPI 6.4 */
2037	};
2038
2039	/* Flags */
2040
2041	#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
2042	#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
2043	#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
2044
2045	/* Range Type GUIDs appear in the include/acuuid.h file */
2046
2047	/* 1: Memory Device to System Address Range Map Structure */
2048
2049	struct acpi_nfit_memory_map {
2050	struct acpi_nfit_header header;
2051	u32 device_handle;
2052	u16 physical_id;
2053	u16 region_id;
2054	u16 range_index;
2055	u16 region_index;
2056	u64 region_size;
2057	u64 region_offset;
2058	u64 address;
2059	u16 interleave_index;
2060	u16 interleave_ways;
2061	u16 flags;
2062	u16 reserved; /* Reserved, must be zero */
2063	};
2064
2065	/* Flags */
2066
2067	#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
2068	#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
2069	#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
2070	#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
2071	#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
2072	#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
2073	#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
2074
2075	/* 2: Interleave Structure */
2076
2077	struct acpi_nfit_interleave {
2078	struct acpi_nfit_header header;
2079	u16 interleave_index;
2080	u16 reserved; /* Reserved, must be zero */
2081	u32 line_count;
2082	u32 line_size;
2083	u32 line_offset[]; /* Variable length */
2084	};
2085
2086	/* 3: SMBIOS Management Information Structure */
2087
2088	struct acpi_nfit_smbios {
2089	struct acpi_nfit_header header;
2090	u32 reserved; /* Reserved, must be zero */
2091	u8 data[]; /* Variable length */
2092	};
2093
2094	/* 4: NVDIMM Control Region Structure */
2095
2096	struct acpi_nfit_control_region {
2097	struct acpi_nfit_header header;
2098	u16 region_index;
2099	u16 vendor_id;
2100	u16 device_id;
2101	u16 revision_id;
2102	u16 subsystem_vendor_id;
2103	u16 subsystem_device_id;
2104	u16 subsystem_revision_id;
2105	u8 valid_fields;
2106	u8 manufacturing_location;
2107	u16 manufacturing_date;
2108	u8 reserved[2]; /* Reserved, must be zero */
2109	u32 serial_number;
2110	u16 code;
2111	u16 windows;
2112	u64 window_size;
2113	u64 command_offset;
2114	u64 command_size;
2115	u64 status_offset;
2116	u64 status_size;
2117	u16 flags;
2118	u8 reserved1[6]; /* Reserved, must be zero */
2119	};
2120
2121	/* Flags */
2122
2123	#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
2124
2125	/* valid_fields bits */
2126
2127	#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
2128
2129	/* 5: NVDIMM Block Data Window Region Structure */
2130
2131	struct acpi_nfit_data_region {
2132	struct acpi_nfit_header header;
2133	u16 region_index;
2134	u16 windows;
2135	u64 offset;
2136	u64 size;
2137	u64 capacity;
2138	u64 start_address;
2139	};
2140
2141	/* 6: Flush Hint Address Structure */
2142
2143	struct acpi_nfit_flush_address {
2144	struct acpi_nfit_header header;
2145	u32 device_handle;
2146	u16 hint_count;
2147	u8 reserved[6]; /* Reserved, must be zero */
2148	u64 hint_address[]; /* Variable length */
2149	};
2150
2151	/* 7: Platform Capabilities Structure */
2152
2153	struct acpi_nfit_capabilities {
2154	struct acpi_nfit_header header;
2155	u8 highest_capability;
2156	u8 reserved[3]; /* Reserved, must be zero */
2157	u32 capabilities;
2158	u32 reserved2;
2159	};
2160
2161	/* Capabilities Flags */
2162
2163	#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
2164	#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
2165	#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
2166
2167	/*
2168	* NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
2169	*/
2170	struct nfit_device_handle {
2171	u32 handle;
2172	};
2173
2174	/* Device handle construction and extraction macros */
2175
2176	#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
2177	#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
2178	#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
2179	#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
2180	#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
2181
2182	#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
2183	#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
2184	#define ACPI_NFIT_MEMORY_ID_OFFSET 8
2185	#define ACPI_NFIT_SOCKET_ID_OFFSET 12
2186	#define ACPI_NFIT_NODE_ID_OFFSET 16
2187
2188	/* Macro to construct a NFIT/NVDIMM device handle */
2189
2190	#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
2191	((dimm) | \
2192	((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
2193	((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
2194	((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
2195	((node) << ACPI_NFIT_NODE_ID_OFFSET))
2196
2197	/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
2198
2199	#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
2200	((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
2201
2202	#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
2203	(((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
2204
2205	#define ACPI_NFIT_GET_MEMORY_ID(handle) \
2206	(((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
2207
2208	#define ACPI_NFIT_GET_SOCKET_ID(handle) \
2209	(((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
2210
2211	#define ACPI_NFIT_GET_NODE_ID(handle) \
2212	(((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
2213
2214	/*******************************************************************************
2215	*
2216	* NHLT - Non HDAudio Link Table
2217	* Version 1
2218	*
2219	******************************************************************************/
2220
2221	struct acpi_table_nhlt {
2222	struct acpi_table_header header; /* Common ACPI table header */
2223	u8 endpoints_count;
2224	/*
2225	* struct acpi_nhlt_endpoint endpoints[];
2226	* struct acpi_nhlt_config oed_config;
2227	*/
2228	};
2229
2230	struct acpi_nhlt_endpoint {
2231	u32 length;
2232	u8 link_type;
2233	u8 instance_id;
2234	u16 vendor_id;
2235	u16 device_id;
2236	u16 revision_id;
2237	u32 subsystem_id;
2238	u8 device_type;
2239	u8 direction;
2240	u8 virtual_bus_id;
2241	/*
2242	* struct acpi_nhlt_config device_config;
2243	* struct acpi_nhlt_formats_config formats_config;
2244	* struct acpi_nhlt_devices_info devices_info;
2245	*/
2246	};
2247
2248	/*
2249	* Values for link_type field above
2250	*
2251	* Only types PDM and SSP are used
2252	*/
2253	#define ACPI_NHLT_LINKTYPE_HDA 0
2254	#define ACPI_NHLT_LINKTYPE_DSP 1
2255	#define ACPI_NHLT_LINKTYPE_PDM 2
2256	#define ACPI_NHLT_LINKTYPE_SSP 3
2257	#define ACPI_NHLT_LINKTYPE_SLIMBUS 4
2258	#define ACPI_NHLT_LINKTYPE_SDW 5
2259	#define ACPI_NHLT_LINKTYPE_UAOL 6
2260
2261	/* Values for device_id field above */
2262
2263	#define ACPI_NHLT_DEVICEID_DMIC 0xAE20
2264	#define ACPI_NHLT_DEVICEID_BT 0xAE30
2265	#define ACPI_NHLT_DEVICEID_I2S 0xAE34
2266
2267	/* Values for device_type field above */
2268
2269	/*
2270	* Device types unique to endpoint of link_type=PDM
2271	*
2272	* Type PDM used for all SKL+ platforms
2273	*/
2274	#define ACPI_NHLT_DEVICETYPE_PDM 0
2275	#define ACPI_NHLT_DEVICETYPE_PDM_SKL 1
2276	/* Device types unique to endpoint of link_type=SSP */
2277	#define ACPI_NHLT_DEVICETYPE_BT 0
2278	#define ACPI_NHLT_DEVICETYPE_FM 1
2279	#define ACPI_NHLT_DEVICETYPE_MODEM 2
2280	#define ACPI_NHLT_DEVICETYPE_CODEC 4
2281
2282	/* Values for Direction field above */
2283
2284	#define ACPI_NHLT_DIR_RENDER 0
2285	#define ACPI_NHLT_DIR_CAPTURE 1
2286
2287	struct acpi_nhlt_config {
2288	u32 capabilities_size;
2289	u8 capabilities[];
2290	};
2291
2292	struct acpi_nhlt_gendevice_config {
2293	u8 virtual_slot;
2294	u8 config_type;
2295	};
2296
2297	/* Values for config_type field above */
2298
2299	#define ACPI_NHLT_CONFIGTYPE_GENERIC 0
2300	#define ACPI_NHLT_CONFIGTYPE_MICARRAY 1
2301
2302	struct acpi_nhlt_micdevice_config {
2303	u8 virtual_slot;
2304	u8 config_type;
2305	u8 array_type;
2306	};
2307
2308	/* Values for array_type field above */
2309
2310	#define ACPI_NHLT_ARRAYTYPE_LINEAR2_SMALL 0xA
2311	#define ACPI_NHLT_ARRAYTYPE_LINEAR2_BIG 0xB
2312	#define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO1 0xC
2313	#define ACPI_NHLT_ARRAYTYPE_PLANAR4_LSHAPED 0xD
2314	#define ACPI_NHLT_ARRAYTYPE_LINEAR4_GEO2 0xE
2315	#define ACPI_NHLT_ARRAYTYPE_VENDOR 0xF
2316
2317	struct acpi_nhlt_vendor_mic_config {
2318	u8 type;
2319	u8 panel;
2320	u16 speaker_position_distance; /* mm */
2321	u16 horizontal_offset; /* mm */
2322	u16 vertical_offset; /* mm */
2323	u8 frequency_low_band; /* 5*Hz */
2324	u8 frequency_high_band; /* 500*Hz */
2325	u16 direction_angle; /* -180 - +180 */
2326	u16 elevation_angle; /* -180 - +180 */
2327	u16 work_vertical_angle_begin; /* -180 - +180 with 2 deg step */
2328	u16 work_vertical_angle_end; /* -180 - +180 with 2 deg step */
2329	u16 work_horizontal_angle_begin; /* -180 - +180 with 2 deg step */
2330	u16 work_horizontal_angle_end; /* -180 - +180 with 2 deg step */
2331	};
2332
2333	/* Values for Type field above */
2334
2335	#define ACPI_NHLT_MICTYPE_OMNIDIRECTIONAL 0
2336	#define ACPI_NHLT_MICTYPE_SUBCARDIOID 1
2337	#define ACPI_NHLT_MICTYPE_CARDIOID 2
2338	#define ACPI_NHLT_MICTYPE_SUPERCARDIOID 3
2339	#define ACPI_NHLT_MICTYPE_HYPERCARDIOID 4
2340	#define ACPI_NHLT_MICTYPE_8SHAPED 5
2341	#define ACPI_NHLT_MICTYPE_RESERVED 6
2342	#define ACPI_NHLT_MICTYPE_VENDORDEFINED 7
2343
2344	/* Values for Panel field above */
2345
2346	#define ACPI_NHLT_MICLOCATION_TOP 0
2347	#define ACPI_NHLT_MICLOCATION_BOTTOM 1
2348	#define ACPI_NHLT_MICLOCATION_LEFT 2
2349	#define ACPI_NHLT_MICLOCATION_RIGHT 3
2350	#define ACPI_NHLT_MICLOCATION_FRONT 4
2351	#define ACPI_NHLT_MICLOCATION_REAR 5
2352
2353	struct acpi_nhlt_vendor_micdevice_config {
2354	u8 virtual_slot;
2355	u8 config_type;
2356	u8 array_type;
2357	u8 mics_count;
2358	struct acpi_nhlt_vendor_mic_config mics[];
2359	};
2360
2361	union acpi_nhlt_device_config {
2362	u8 virtual_slot;
2363	struct acpi_nhlt_gendevice_config gen;
2364	struct acpi_nhlt_micdevice_config mic;
2365	struct acpi_nhlt_vendor_micdevice_config vendor_mic;
2366	};
2367
2368	/* Inherited from Microsoft's WAVEFORMATEXTENSIBLE. */
2369	struct acpi_nhlt_wave_formatext {
2370	u16 format_tag;
2371	u16 channel_count;
2372	u32 samples_per_sec;
2373	u32 avg_bytes_per_sec;
2374	u16 block_align;
2375	u16 bits_per_sample;
2376	u16 extra_format_size;
2377	u16 valid_bits_per_sample;
2378	u32 channel_mask;
2379	u8 subformat[16];
2380	};
2381
2382	struct acpi_nhlt_format_config {
2383	struct acpi_nhlt_wave_formatext format;
2384	struct acpi_nhlt_config config;
2385	};
2386
2387	struct acpi_nhlt_formats_config {
2388	u8 formats_count;
2389	struct acpi_nhlt_format_config formats[];
2390	};
2391
2392	struct acpi_nhlt_device_info {
2393	u8 id[16];
2394	u8 instance_id;
2395	u8 port_id;
2396	};
2397
2398	struct acpi_nhlt_devices_info {
2399	u8 devices_count;
2400	struct acpi_nhlt_device_info devices[];
2401	};
2402
2403	/*******************************************************************************
2404	*
2405	* PCCT - Platform Communications Channel Table (ACPI 5.0)
2406	* Version 2 (ACPI 6.2)
2407	*
2408	******************************************************************************/
2409
2410	struct acpi_table_pcct {
2411	struct acpi_table_header header; /* Common ACPI table header */
2412	u32 flags;
2413	u64 reserved;
2414	};
2415
2416	/* Values for Flags field above */
2417
2418	#define ACPI_PCCT_DOORBELL 1
2419
2420	/* Values for subtable type in struct acpi_subtable_header */
2421
2422	enum acpi_pcct_type {
2423	ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
2424	ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
2425	ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
2426	ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
2427	ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
2428	ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
2429	ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
2430	};
2431
2432	/*
2433	* PCCT Subtables, correspond to Type in struct acpi_subtable_header
2434	*/
2435
2436	/* 0: Generic Communications Subspace */
2437
2438	struct acpi_pcct_subspace {
2439	struct acpi_subtable_header header;
2440	u8 reserved[6];
2441	u64 base_address;
2442	u64 length;
2443	struct acpi_generic_address doorbell_register;
2444	u64 preserve_mask;
2445	u64 write_mask;
2446	u32 latency;
2447	u32 max_access_rate;
2448	u16 min_turnaround_time;
2449	};
2450
2451	/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2452
2453	struct acpi_pcct_hw_reduced {
2454	struct acpi_subtable_header header;
2455	u32 platform_interrupt;
2456	u8 flags;
2457	u8 reserved;
2458	u64 base_address;
2459	u64 length;
2460	struct acpi_generic_address doorbell_register;
2461	u64 preserve_mask;
2462	u64 write_mask;
2463	u32 latency;
2464	u32 max_access_rate;
2465	u16 min_turnaround_time;
2466	};
2467
2468	/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2469
2470	struct acpi_pcct_hw_reduced_type2 {
2471	struct acpi_subtable_header header;
2472	u32 platform_interrupt;
2473	u8 flags;
2474	u8 reserved;
2475	u64 base_address;
2476	u64 length;
2477	struct acpi_generic_address doorbell_register;
2478	u64 preserve_mask;
2479	u64 write_mask;
2480	u32 latency;
2481	u32 max_access_rate;
2482	u16 min_turnaround_time;
2483	struct acpi_generic_address platform_ack_register;
2484	u64 ack_preserve_mask;
2485	u64 ack_write_mask;
2486	};
2487
2488	/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2489
2490	struct acpi_pcct_ext_pcc_master {
2491	struct acpi_subtable_header header;
2492	u32 platform_interrupt;
2493	u8 flags;
2494	u8 reserved1;
2495	u64 base_address;
2496	u32 length;
2497	struct acpi_generic_address doorbell_register;
2498	u64 preserve_mask;
2499	u64 write_mask;
2500	u32 latency;
2501	u32 max_access_rate;
2502	u32 min_turnaround_time;
2503	struct acpi_generic_address platform_ack_register;
2504	u64 ack_preserve_mask;
2505	u64 ack_set_mask;
2506	u64 reserved2;
2507	struct acpi_generic_address cmd_complete_register;
2508	u64 cmd_complete_mask;
2509	struct acpi_generic_address cmd_update_register;
2510	u64 cmd_update_preserve_mask;
2511	u64 cmd_update_set_mask;
2512	struct acpi_generic_address error_status_register;
2513	u64 error_status_mask;
2514	};
2515
2516	/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2517
2518	struct acpi_pcct_ext_pcc_slave {
2519	struct acpi_subtable_header header;
2520	u32 platform_interrupt;
2521	u8 flags;
2522	u8 reserved1;
2523	u64 base_address;
2524	u32 length;
2525	struct acpi_generic_address doorbell_register;
2526	u64 preserve_mask;
2527	u64 write_mask;
2528	u32 latency;
2529	u32 max_access_rate;
2530	u32 min_turnaround_time;
2531	struct acpi_generic_address platform_ack_register;
2532	u64 ack_preserve_mask;
2533	u64 ack_set_mask;
2534	u64 reserved2;
2535	struct acpi_generic_address cmd_complete_register;
2536	u64 cmd_complete_mask;
2537	struct acpi_generic_address cmd_update_register;
2538	u64 cmd_update_preserve_mask;
2539	u64 cmd_update_set_mask;
2540	struct acpi_generic_address error_status_register;
2541	u64 error_status_mask;
2542	};
2543
2544	/* 5: HW Registers based Communications Subspace */
2545
2546	struct acpi_pcct_hw_reg {
2547	struct acpi_subtable_header header;
2548	u16 version;
2549	u64 base_address;
2550	u64 length;
2551	struct acpi_generic_address doorbell_register;
2552	u64 doorbell_preserve;
2553	u64 doorbell_write;
2554	struct acpi_generic_address cmd_complete_register;
2555	u64 cmd_complete_mask;
2556	struct acpi_generic_address error_status_register;
2557	u64 error_status_mask;
2558	u32 nominal_latency;
2559	u32 min_turnaround_time;
2560	};
2561
2562	/* Values for doorbell flags above */
2563
2564	#define ACPI_PCCT_INTERRUPT_POLARITY (1)
2565	#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
2566
2567	/*
2568	* PCC memory structures (not part of the ACPI table)
2569	*/
2570
2571	/* Shared Memory Region */
2572
2573	struct acpi_pcct_shared_memory {
2574	u32 signature;
2575	u16 command;
2576	u16 status;
2577	};
2578
2579	/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
2580
2581	struct acpi_pcct_ext_pcc_shared_memory {
2582	u32 signature;
2583	u32 flags;
2584	u32 length;
2585	u32 command;
2586	};
2587
2588	/*******************************************************************************
2589	*
2590	* PDTT - Platform Debug Trigger Table (ACPI 6.2)
2591	* Version 0
2592	*
2593	******************************************************************************/
2594
2595	struct acpi_table_pdtt {
2596	struct acpi_table_header header; /* Common ACPI table header */
2597	u8 trigger_count;
2598	u8 reserved[3];
2599	u32 array_offset;
2600	};
2601
2602	/*
2603	* PDTT Communication Channel Identifier Structure.
2604	* The number of these structures is defined by trigger_count above,
2605	* starting at array_offset.
2606	*/
2607	struct acpi_pdtt_channel {
2608	u8 subchannel_id;
2609	u8 flags;
2610	};
2611
2612	/* Flags for above */
2613
2614	#define ACPI_PDTT_RUNTIME_TRIGGER (1)
2615	#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
2616	#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
2617
2618	/*******************************************************************************
2619	*
2620	* PHAT - Platform Health Assessment Table (ACPI 6.4)
2621	* Version 1
2622	*
2623	******************************************************************************/
2624
2625	struct acpi_table_phat {
2626	struct acpi_table_header header; /* Common ACPI table header */
2627	};
2628
2629	/* Common header for PHAT subtables that follow main table */
2630
2631	struct acpi_phat_header {
2632	u16 type;
2633	u16 length;
2634	u8 revision;
2635	};
2636
2637	/* Values for Type field above */
2638
2639	#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
2640	#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
2641	#define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2642
2643	/*
2644	* PHAT subtables, correspond to Type in struct acpi_phat_header
2645	*/
2646
2647	/* 0: Firmware Version Data Record */
2648
2649	struct acpi_phat_version_data {
2650	struct acpi_phat_header header;
2651	u8 reserved[3];
2652	u32 element_count;
2653	};
2654
2655	struct acpi_phat_version_element {
2656	u8 guid[16];
2657	u64 version_value;
2658	u32 producer_id;
2659	};
2660
2661	/* 1: Firmware Health Data Record */
2662
2663	struct acpi_phat_health_data {
2664	struct acpi_phat_header header;
2665	u8 reserved[2];
2666	u8 health;
2667	u8 device_guid[16];
2668	u32 device_specific_offset; /* Zero if no Device-specific data */
2669	};
2670
2671	/* Values for Health field above */
2672
2673	#define ACPI_PHAT_ERRORS_FOUND 0
2674	#define ACPI_PHAT_NO_ERRORS 1
2675	#define ACPI_PHAT_UNKNOWN_ERRORS 2
2676	#define ACPI_PHAT_ADVISORY 3
2677
2678	/*******************************************************************************
2679	*
2680	* PMTT - Platform Memory Topology Table (ACPI 5.0)
2681	* Version 1
2682	*
2683	******************************************************************************/
2684
2685	struct acpi_table_pmtt {
2686	struct acpi_table_header header; /* Common ACPI table header */
2687	u32 memory_device_count;
2688	/*
2689	* Immediately followed by:
2690	* MEMORY_DEVICE memory_device_struct[memory_device_count];
2691	*/
2692	};
2693
2694	/* Common header for PMTT subtables that follow main table */
2695
2696	struct acpi_pmtt_header {
2697	u8 type;
2698	u8 reserved1;
2699	u16 length;
2700	u16 flags;
2701	u16 reserved2;
2702	u32 memory_device_count; /* Zero means no memory device structs follow */
2703	/*
2704	* Immediately followed by:
2705	* u8 type_specific_data[]
2706	* MEMORY_DEVICE memory_device_struct[memory_device_count];
2707	*/
2708	};
2709
2710	/* Values for Type field above */
2711
2712	#define ACPI_PMTT_TYPE_SOCKET 0
2713	#define ACPI_PMTT_TYPE_CONTROLLER 1
2714	#define ACPI_PMTT_TYPE_DIMM 2
2715	#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2716	#define ACPI_PMTT_TYPE_VENDOR 0xFF
2717
2718	/* Values for Flags field above */
2719
2720	#define ACPI_PMTT_TOP_LEVEL 0x0001
2721	#define ACPI_PMTT_PHYSICAL 0x0002
2722	#define ACPI_PMTT_MEMORY_TYPE 0x000C
2723
2724	/*
2725	* PMTT subtables, correspond to Type in struct acpi_pmtt_header
2726	*/
2727
2728	/* 0: Socket Structure */
2729
2730	struct acpi_pmtt_socket {
2731	struct acpi_pmtt_header header;
2732	u16 socket_id;
2733	u16 reserved;
2734	};
2735	/*
2736	* Immediately followed by:
2737	* MEMORY_DEVICE memory_device_struct[memory_device_count];
2738	*/
2739
2740	/* 1: Memory Controller subtable */
2741
2742	struct acpi_pmtt_controller {
2743	struct acpi_pmtt_header header;
2744	u16 controller_id;
2745	u16 reserved;
2746	};
2747	/*
2748	* Immediately followed by:
2749	* MEMORY_DEVICE memory_device_struct[memory_device_count];
2750	*/
2751
2752	/* 2: Physical Component Identifier (DIMM) */
2753
2754	struct acpi_pmtt_physical_component {
2755	struct acpi_pmtt_header header;
2756	u32 bios_handle;
2757	};
2758
2759	/* 0xFF: Vendor Specific Data */
2760
2761	struct acpi_pmtt_vendor_specific {
2762	struct acpi_pmtt_header header;
2763	u8 type_uuid[16];
2764	u8 specific[];
2765	/*
2766	* Immediately followed by:
2767	* u8 vendor_specific_data[];
2768	* MEMORY_DEVICE memory_device_struct[memory_device_count];
2769	*/
2770	};
2771
2772	/*******************************************************************************
2773	*
2774	* PPTT - Processor Properties Topology Table (ACPI 6.2)
2775	* Version 1
2776	*
2777	******************************************************************************/
2778
2779	struct acpi_table_pptt {
2780	struct acpi_table_header header; /* Common ACPI table header */
2781	};
2782
2783	/* Values for Type field above */
2784
2785	enum acpi_pptt_type {
2786	ACPI_PPTT_TYPE_PROCESSOR = 0,
2787	ACPI_PPTT_TYPE_CACHE = 1,
2788	ACPI_PPTT_TYPE_ID = 2,
2789	ACPI_PPTT_TYPE_RESERVED = 3
2790	};
2791
2792	/* 0: Processor Hierarchy Node Structure */
2793
2794	struct acpi_pptt_processor {
2795	struct acpi_subtable_header header;
2796	u16 reserved;
2797	u32 flags;
2798	u32 parent;
2799	u32 acpi_processor_id;
2800	u32 number_of_priv_resources;
2801	};
2802
2803	/* Flags */
2804
2805	#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2806	#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2807	#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2808	#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2809	#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2810
2811	/* 1: Cache Type Structure */
2812
2813	struct acpi_pptt_cache {
2814	struct acpi_subtable_header header;
2815	u16 reserved;
2816	u32 flags;
2817	u32 next_level_of_cache;
2818	u32 size;
2819	u32 number_of_sets;
2820	u8 associativity;
2821	u8 attributes;
2822	u16 line_size;
2823	};
2824
2825	/* 1: Cache Type Structure for PPTT version 3 */
2826
2827	struct acpi_pptt_cache_v1 {
2828	u32 cache_id;
2829	};
2830
2831	/* Flags */
2832
2833	#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2834	#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2835	#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2836	#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2837	#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2838	#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2839	#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
2840	#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
2841
2842	/* Masks for Attributes */
2843
2844	#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2845	#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2846	#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2847
2848	/* Attributes describing cache */
2849	#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2850	#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2851	#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2852	#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2853
2854	#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2855	#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2856	#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2857	#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2858
2859	#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2860	#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2861
2862	/* 2: ID Structure */
2863
2864	struct acpi_pptt_id {
2865	struct acpi_subtable_header header;
2866	u16 reserved;
2867	u32 vendor_id;
2868	u64 level1_id;
2869	u64 level2_id;
2870	u16 major_rev;
2871	u16 minor_rev;
2872	u16 spin_rev;
2873	};
2874
2875	/*******************************************************************************
2876	*
2877	* PRMT - Platform Runtime Mechanism Table
2878	* Version 1
2879	*
2880	******************************************************************************/
2881
2882	struct acpi_table_prmt {
2883	struct acpi_table_header header; /* Common ACPI table header */
2884	};
2885
2886	struct acpi_table_prmt_header {
2887	u8 platform_guid[16];
2888	u32 module_info_offset;
2889	u32 module_info_count;
2890	};
2891
2892	struct acpi_prmt_module_header {
2893	u16 revision;
2894	u16 length;
2895	};
2896
2897	struct acpi_prmt_module_info {
2898	u16 revision;
2899	u16 length;
2900	u8 module_guid[16];
2901	u16 major_rev;
2902	u16 minor_rev;
2903	u16 handler_info_count;
2904	u32 handler_info_offset;
2905	u64 mmio_list_pointer;
2906	};
2907
2908	struct acpi_prmt_handler_info {
2909	u16 revision;
2910	u16 length;
2911	u8 handler_guid[16];
2912	u64 handler_address;
2913	u64 static_data_buffer_address;
2914	u64 acpi_param_buffer_address;
2915	};
2916
2917	/*******************************************************************************
2918	*
2919	* RASF - RAS Feature Table (ACPI 5.0)
2920	* Version 1
2921	*
2922	******************************************************************************/
2923
2924	struct acpi_table_rasf {
2925	struct acpi_table_header header; /* Common ACPI table header */
2926	u8 channel_id[12];
2927	};
2928
2929	/* RASF Platform Communication Channel Shared Memory Region */
2930
2931	struct acpi_rasf_shared_memory {
2932	u32 signature;
2933	u16 command;
2934	u16 status;
2935	u16 version;
2936	u8 capabilities[16];
2937	u8 set_capabilities[16];
2938	u16 num_parameter_blocks;
2939	u32 set_capabilities_status;
2940	};
2941
2942	/* RASF Parameter Block Structure Header */
2943
2944	struct acpi_rasf_parameter_block {
2945	u16 type;
2946	u16 version;
2947	u16 length;
2948	};
2949
2950	/* RASF Parameter Block Structure for PATROL_SCRUB */
2951
2952	struct acpi_rasf_patrol_scrub_parameter {
2953	struct acpi_rasf_parameter_block header;
2954	u16 patrol_scrub_command;
2955	u64 requested_address_range[2];
2956	u64 actual_address_range[2];
2957	u16 flags;
2958	u8 requested_speed;
2959	};
2960
2961	/* Masks for Flags and Speed fields above */
2962
2963	#define ACPI_RASF_SCRUBBER_RUNNING 1
2964	#define ACPI_RASF_SPEED (7<<1)
2965	#define ACPI_RASF_SPEED_SLOW (0<<1)
2966	#define ACPI_RASF_SPEED_MEDIUM (4<<1)
2967	#define ACPI_RASF_SPEED_FAST (7<<1)
2968
2969	/* Channel Commands */
2970
2971	enum acpi_rasf_commands {
2972	ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2973	};
2974
2975	/* Platform RAS Capabilities */
2976
2977	enum acpi_rasf_capabiliities {
2978	ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2979	ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2980	};
2981
2982	/* Patrol Scrub Commands */
2983
2984	enum acpi_rasf_patrol_scrub_commands {
2985	ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2986	ACPI_RASF_START_PATROL_SCRUBBER = 2,
2987	ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2988	};
2989
2990	/* Channel Command flags */
2991
2992	#define ACPI_RASF_GENERATE_SCI (1<<15)
2993
2994	/* Status values */
2995
2996	enum acpi_rasf_status {
2997	ACPI_RASF_SUCCESS = 0,
2998	ACPI_RASF_NOT_VALID = 1,
2999	ACPI_RASF_NOT_SUPPORTED = 2,
3000	ACPI_RASF_BUSY = 3,
3001	ACPI_RASF_FAILED = 4,
3002	ACPI_RASF_ABORTED = 5,
3003	ACPI_RASF_INVALID_DATA = 6
3004	};
3005
3006	/* Status flags */
3007
3008	#define ACPI_RASF_COMMAND_COMPLETE (1)
3009	#define ACPI_RASF_SCI_DOORBELL (1<<1)
3010	#define ACPI_RASF_ERROR (1<<2)
3011	#define ACPI_RASF_STATUS (0x1F<<3)
3012
3013	/*******************************************************************************
3014	*
3015	* RAS2 - RAS2 Feature Table (ACPI 6.5)
3016	* Version 1
3017	*
3018	*
3019	******************************************************************************/
3020
3021	struct acpi_table_ras2 {
3022	struct acpi_table_header header; /* Common ACPI table header */
3023	u16 reserved;
3024	u16 num_pcc_descs;
3025	};
3026
3027	/* RAS2 Platform Communication Channel Descriptor */
3028
3029	struct acpi_ras2_pcc_desc {
3030	u8 channel_id;
3031	u16 reserved;
3032	u8 feature_type;
3033	u32 instance;
3034	};
3035
3036	/* RAS2 Platform Communication Channel Shared Memory Region */
3037
3038	struct acpi_ras2_shmem {
3039	u32 signature;
3040	u16 command;
3041	u16 status;
3042	u16 version;
3043	u8 features[16];
3044	u8 set_caps[16];
3045	u16 num_param_blks;
3046	u32 set_caps_status;
3047	};
3048
3049	/* RAS2 Parameter Block Structure for PATROL_SCRUB */
3050
3051	struct acpi_ras2_parameter_block {
3052	u16 type;
3053	u16 version;
3054	u16 length;
3055	};
3056
3057	/* RAS2 Parameter Block Structure for PATROL_SCRUB */
3058
3059	struct acpi_ras2_patrol_scrub_param {
3060	struct acpi_ras2_parameter_block header;
3061	u16 command;
3062	u64 req_addr_range[2];
3063	u64 actl_addr_range[2];
3064	u32 flags;
3065	u32 scrub_params_out;
3066	u32 scrub_params_in;
3067	};
3068
3069	/* Masks for Flags field above */
3070
3071	#define ACPI_RAS2_SCRUBBER_RUNNING 1
3072
3073	/* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */
3074
3075	struct acpi_ras2_la2pa_translation_parameter {
3076	struct acpi_ras2_parameter_block header;
3077	u16 addr_translation_command;
3078	u64 sub_inst_id;
3079	u64 logical_address;
3080	u64 physical_address;
3081	u32 status;
3082	};
3083
3084	/* Channel Commands */
3085
3086	enum acpi_ras2_commands {
3087	ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1
3088	};
3089
3090	/* Platform RAS2 Features */
3091
3092	enum acpi_ras2_features {
3093	ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0,
3094	ACPI_RAS2_LA2PA_TRANSLATION = 1
3095	};
3096
3097	/* RAS2 Patrol Scrub Commands */
3098
3099	enum acpi_ras2_patrol_scrub_commands {
3100	ACPI_RAS2_GET_PATROL_PARAMETERS = 1,
3101	ACPI_RAS2_START_PATROL_SCRUBBER = 2,
3102	ACPI_RAS2_STOP_PATROL_SCRUBBER = 3
3103	};
3104
3105	/* RAS2 LA2PA Translation Commands */
3106
3107	enum acpi_ras2_la2_pa_translation_commands {
3108	ACPI_RAS2_GET_LA2PA_TRANSLATION = 1,
3109	};
3110
3111	/* RAS2 LA2PA Translation Status values */
3112
3113	enum acpi_ras2_la2_pa_translation_status {
3114	ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0,
3115	ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1,
3116	};
3117
3118	/* Channel Command flags */
3119
3120	#define ACPI_RAS2_GENERATE_SCI (1<<15)
3121
3122	/* Status values */
3123
3124	enum acpi_ras2_status {
3125	ACPI_RAS2_SUCCESS = 0,
3126	ACPI_RAS2_NOT_VALID = 1,
3127	ACPI_RAS2_NOT_SUPPORTED = 2,
3128	ACPI_RAS2_BUSY = 3,
3129	ACPI_RAS2_FAILED = 4,
3130	ACPI_RAS2_ABORTED = 5,
3131	ACPI_RAS2_INVALID_DATA = 6
3132	};
3133
3134	/* Status flags */
3135
3136	#define ACPI_RAS2_COMMAND_COMPLETE (1)
3137	#define ACPI_RAS2_SCI_DOORBELL (1<<1)
3138	#define ACPI_RAS2_ERROR (1<<2)
3139	#define ACPI_RAS2_STATUS (0x1F<<3)
3140
3141	/*******************************************************************************
3142	*
3143	* RGRT - Regulatory Graphics Resource Table
3144	* Version 1
3145	*
3146	* Conforms to "ACPI RGRT" available at:
3147	* https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
3148	*
3149	******************************************************************************/
3150
3151	struct acpi_table_rgrt {
3152	struct acpi_table_header header; /* Common ACPI table header */
3153	u16 version;
3154	u8 image_type;
3155	u8 reserved;
3156	u8 image[];
3157	};
3158
3159	/* image_type values */
3160
3161	enum acpi_rgrt_image_type {
3162	ACPI_RGRT_TYPE_RESERVED0 = 0,
3163	ACPI_RGRT_IMAGE_TYPE_PNG = 1,
3164	ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3165	};
3166
3167	/*******************************************************************************
3168	*
3169	* RHCT - RISC-V Hart Capabilities Table
3170	* Version 1
3171	*
3172	******************************************************************************/
3173
3174	struct acpi_table_rhct {
3175	struct acpi_table_header header; /* Common ACPI table header */
3176	u32 flags; /* RHCT flags */
3177	u64 time_base_freq;
3178	u32 node_count;
3179	u32 node_offset;
3180	};
3181
3182	/* RHCT Flags */
3183
3184	#define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1)
3185	/*
3186	* RHCT subtables
3187	*/
3188	struct acpi_rhct_node_header {
3189	u16 type;
3190	u16 length;
3191	u16 revision;
3192	};
3193
3194	/* Values for RHCT subtable Type above */
3195
3196	enum acpi_rhct_node_type {
3197	ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000,
3198	ACPI_RHCT_NODE_TYPE_CMO = 0x0001,
3199	ACPI_RHCT_NODE_TYPE_MMU = 0x0002,
3200	ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003,
3201	ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF,
3202	};
3203
3204	/*
3205	* RHCT node specific subtables
3206	*/
3207
3208	/* ISA string node structure */
3209	struct acpi_rhct_isa_string {
3210	u16 isa_length;
3211	char isa[];
3212	};
3213
3214	struct acpi_rhct_cmo_node {
3215	u8 reserved; /* Must be zero */
3216	u8 cbom_size; /* CBOM size in powerof 2 */
3217	u8 cbop_size; /* CBOP size in powerof 2 */
3218	u8 cboz_size; /* CBOZ size in powerof 2 */
3219	};
3220
3221	struct acpi_rhct_mmu_node {
3222	u8 reserved; /* Must be zero */
3223	u8 mmu_type; /* Virtual Address Scheme */
3224	};
3225
3226	enum acpi_rhct_mmu_type {
3227	ACPI_RHCT_MMU_TYPE_SV39 = 0,
3228	ACPI_RHCT_MMU_TYPE_SV48 = 1,
3229	ACPI_RHCT_MMU_TYPE_SV57 = 2
3230	};
3231
3232	/* Hart Info node structure */
3233	struct acpi_rhct_hart_info {
3234	u16 num_offsets;
3235	u32 uid; /* ACPI processor UID */
3236	};
3237
3238	/*******************************************************************************
3239	*
3240	* RIMT - RISC-V IO Remapping Table
3241	*
3242	* https://github.com/riscv-non-isa/riscv-acpi-rimt
3243	*
3244	******************************************************************************/
3245
3246	struct acpi_table_rimt {
3247	struct acpi_table_header header; /* Common ACPI table header */
3248	u32 num_nodes; /* Number of RIMT Nodes */
3249	u32 node_offset; /* Offset to RIMT Node Array */
3250	u32 reserved;
3251	};
3252
3253	struct acpi_rimt_node {
3254	u8 type;
3255	u8 revision;
3256	u16 length;
3257	u16 reserved;
3258	u16 id;
3259	char node_data[];
3260	};
3261
3262	enum acpi_rimt_node_type {
3263	ACPI_RIMT_NODE_TYPE_IOMMU = 0x0,
3264	ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX = 0x1,
3265	ACPI_RIMT_NODE_TYPE_PLAT_DEVICE = 0x2,
3266	};
3267
3268	struct acpi_rimt_iommu {
3269	u8 hardware_id[8]; /* Hardware ID */
3270	u64 base_address; /* Base Address */
3271	u32 flags; /* Flags */
3272	u32 proximity_domain; /* Proximity Domain */
3273	u16 pcie_segment_number; /* PCIe Segment number */
3274	u16 pcie_bdf; /* PCIe B/D/F */
3275	u16 num_interrupt_wires; /* Number of interrupt wires */
3276	u16 interrupt_wire_offset; /* Interrupt wire array offset */
3277	u64 interrupt_wire[]; /* Interrupt wire array */
3278	};
3279
3280	/* IOMMU Node Flags */
3281	#define ACPI_RIMT_IOMMU_FLAGS_PCIE (1)
3282	#define ACPI_RIMT_IOMMU_FLAGS_PXM_VALID (1 << 1)
3283
3284	/* Interrupt Wire Structure */
3285	struct acpi_rimt_iommu_wire_gsi {
3286	u32 irq_num; /* Interrupt Number */
3287	u32 flags; /* Flags */
3288	};
3289
3290	/* Interrupt Wire Flags */
3291	#define ACPI_RIMT_GSI_LEVEL_TRIGGERRED (1)
3292	#define ACPI_RIMT_GSI_ACTIVE_HIGH (1 << 1)
3293
3294	struct acpi_rimt_id_mapping {
3295	u32 source_id_base; /* Source ID Base */
3296	u32 num_ids; /* Number of IDs */
3297	u32 dest_id_base; /* Destination Device ID Base */
3298	u32 dest_offset; /* Destination IOMMU Offset */
3299	u32 flags; /* Flags */
3300	};
3301
3302	struct acpi_rimt_pcie_rc {
3303	u32 flags; /* Flags */
3304	u16 reserved; /* Reserved */
3305	u16 pcie_segment_number; /* PCIe Segment number */
3306	u16 id_mapping_offset; /* ID mapping array offset */
3307	u16 num_id_mappings; /* Number of ID mappings */
3308	};
3309
3310	/* PCIe Root Complex Node Flags */
3311	#define ACPI_RIMT_PCIE_ATS_SUPPORTED (1)
3312	#define ACPI_RIMT_PCIE_PRI_SUPPORTED (1 << 1)
3313
3314	struct acpi_rimt_platform_device {
3315	u16 id_mapping_offset; /* ID Mapping array offset */
3316	u16 num_id_mappings; /* Number of ID mappings */
3317	char device_name[]; /* Device Object Name */
3318	};
3319
3320	/*******************************************************************************
3321	*
3322	* SBST - Smart Battery Specification Table
3323	* Version 1
3324	*
3325	******************************************************************************/
3326
3327	struct acpi_table_sbst {
3328	struct acpi_table_header header; /* Common ACPI table header */
3329	u32 warning_level;
3330	u32 low_level;
3331	u32 critical_level;
3332	};
3333
3334	/*******************************************************************************
3335	*
3336	* SDEI - Software Delegated Exception Interface Descriptor Table
3337	*
3338	* Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
3339	* May 8th, 2017. Copyright 2017 ARM Ltd.
3340	*
3341	******************************************************************************/
3342
3343	struct acpi_table_sdei {
3344	struct acpi_table_header header; /* Common ACPI table header */
3345	};
3346
3347	/*******************************************************************************
3348	*
3349	* SDEV - Secure Devices Table (ACPI 6.2)
3350	* Version 1
3351	*
3352	******************************************************************************/
3353
3354	struct acpi_table_sdev {
3355	struct acpi_table_header header; /* Common ACPI table header */
3356	};
3357
3358	struct acpi_sdev_header {
3359	u8 type;
3360	u8 flags;
3361	u16 length;
3362	};
3363
3364	/* Values for subtable type above */
3365
3366	enum acpi_sdev_type {
3367	ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
3368	ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
3369	ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
3370	};
3371
3372	/* Values for flags above */
3373
3374	#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
3375	#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
3376
3377	/*
3378	* SDEV subtables
3379	*/
3380
3381	/* 0: Namespace Device Based Secure Device Structure */
3382
3383	struct acpi_sdev_namespace {
3384	struct acpi_sdev_header header;
3385	u16 device_id_offset;
3386	u16 device_id_length;
3387	u16 vendor_data_offset;
3388	u16 vendor_data_length;
3389	};
3390
3391	struct acpi_sdev_secure_component {
3392	u16 secure_component_offset;
3393	u16 secure_component_length;
3394	};
3395
3396	/*
3397	* SDEV sub-subtables ("Components") for above
3398	*/
3399	struct acpi_sdev_component {
3400	struct acpi_sdev_header header;
3401	};
3402
3403	/* Values for sub-subtable type above */
3404
3405	enum acpi_sac_type {
3406	ACPI_SDEV_TYPE_ID_COMPONENT = 0,
3407	ACPI_SDEV_TYPE_MEM_COMPONENT = 1
3408	};
3409
3410	struct acpi_sdev_id_component {
3411	struct acpi_sdev_header header;
3412	u16 hardware_id_offset;
3413	u16 hardware_id_length;
3414	u16 subsystem_id_offset;
3415	u16 subsystem_id_length;
3416	u16 hardware_revision;
3417	u8 hardware_rev_present;
3418	u8 class_code_present;
3419	u8 pci_base_class;
3420	u8 pci_sub_class;
3421	u8 pci_programming_xface;
3422	};
3423
3424	struct acpi_sdev_mem_component {
3425	struct acpi_sdev_header header;
3426	u32 reserved;
3427	u64 memory_base_address;
3428	u64 memory_length;
3429	};
3430
3431	/* 1: PCIe Endpoint Device Based Device Structure */
3432
3433	struct acpi_sdev_pcie {
3434	struct acpi_sdev_header header;
3435	u16 segment;
3436	u16 start_bus;
3437	u16 path_offset;
3438	u16 path_length;
3439	u16 vendor_data_offset;
3440	u16 vendor_data_length;
3441	};
3442
3443	/* 1a: PCIe Endpoint path entry */
3444
3445	struct acpi_sdev_pcie_path {
3446	u8 device;
3447	u8 function;
3448	};
3449
3450	/*******************************************************************************
3451	*
3452	* SVKL - Storage Volume Key Location Table (ACPI 6.4)
3453	* From: "Guest-Host-Communication Interface (GHCI) for Intel
3454	* Trust Domain Extensions (Intel TDX)".
3455	* Version 1
3456	*
3457	******************************************************************************/
3458
3459	struct acpi_table_svkl {
3460	struct acpi_table_header header; /* Common ACPI table header */
3461	u32 count;
3462	};
3463
3464	struct acpi_svkl_key {
3465	u16 type;
3466	u16 format;
3467	u32 size;
3468	u64 address;
3469	};
3470
3471	enum acpi_svkl_type {
3472	ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
3473	ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
3474	};
3475
3476	enum acpi_svkl_format {
3477	ACPI_SVKL_FORMAT_RAW_BINARY = 0,
3478	ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
3479	};
3480
3481	/*******************************************************************************
3482	*
3483	* TDEL - TD-Event Log
3484	* From: "Guest-Host-Communication Interface (GHCI) for Intel
3485	* Trust Domain Extensions (Intel TDX)".
3486	* September 2020
3487	*
3488	******************************************************************************/
3489
3490	struct acpi_table_tdel {
3491	struct acpi_table_header header; /* Common ACPI table header */
3492	u32 reserved;
3493	u64 log_area_minimum_length;
3494	u64 log_area_start_address;
3495	};
3496
3497	/* Reset to default packing */
3498
3499	#pragma pack()
3500
3501	#endif /* __ACTBL2_H__ */
3502