1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * da9052 declarations for DA9052 PMICs. |
4 | * |
5 | * Copyright(c) 2011 Dialog Semiconductor Ltd. |
6 | * |
7 | * Author: David Dajun Chen <dchen@diasemi.com> |
8 | */ |
9 | |
10 | #ifndef __MFD_DA9052_DA9052_H |
11 | #define __MFD_DA9052_DA9052_H |
12 | |
13 | #include <linux/interrupt.h> |
14 | #include <linux/regmap.h> |
15 | #include <linux/slab.h> |
16 | #include <linux/completion.h> |
17 | #include <linux/list.h> |
18 | #include <linux/mfd/core.h> |
19 | |
20 | #include <linux/mfd/da9052/reg.h> |
21 | |
22 | /* Common - HWMON Channel Definations */ |
23 | #define DA9052_ADC_VDDOUT 0 |
24 | #define DA9052_ADC_ICH 1 |
25 | #define DA9052_ADC_TBAT 2 |
26 | #define DA9052_ADC_VBAT 3 |
27 | #define DA9052_ADC_IN4 4 |
28 | #define DA9052_ADC_IN5 5 |
29 | #define DA9052_ADC_IN6 6 |
30 | #define DA9052_ADC_TSI 7 |
31 | #define DA9052_ADC_TJUNC 8 |
32 | #define DA9052_ADC_VBBAT 9 |
33 | |
34 | /* TSI channel has its own 4 channel mux */ |
35 | #define DA9052_ADC_TSI_XP 70 |
36 | #define DA9052_ADC_TSI_XN 71 |
37 | #define DA9052_ADC_TSI_YP 72 |
38 | #define DA9052_ADC_TSI_YN 73 |
39 | |
40 | #define DA9052_IRQ_DCIN 0 |
41 | #define DA9052_IRQ_VBUS 1 |
42 | #define DA9052_IRQ_DCINREM 2 |
43 | #define DA9052_IRQ_VBUSREM 3 |
44 | #define DA9052_IRQ_VDDLOW 4 |
45 | #define DA9052_IRQ_ALARM 5 |
46 | #define DA9052_IRQ_SEQRDY 6 |
47 | #define DA9052_IRQ_COMP1V2 7 |
48 | #define DA9052_IRQ_NONKEY 8 |
49 | #define DA9052_IRQ_IDFLOAT 9 |
50 | #define DA9052_IRQ_IDGND 10 |
51 | #define DA9052_IRQ_CHGEND 11 |
52 | #define DA9052_IRQ_TBAT 12 |
53 | #define DA9052_IRQ_ADC_EOM 13 |
54 | #define DA9052_IRQ_PENDOWN 14 |
55 | #define DA9052_IRQ_TSIREADY 15 |
56 | #define DA9052_IRQ_GPI0 16 |
57 | #define DA9052_IRQ_GPI1 17 |
58 | #define DA9052_IRQ_GPI2 18 |
59 | #define DA9052_IRQ_GPI3 19 |
60 | #define DA9052_IRQ_GPI4 20 |
61 | #define DA9052_IRQ_GPI5 21 |
62 | #define DA9052_IRQ_GPI6 22 |
63 | #define DA9052_IRQ_GPI7 23 |
64 | #define DA9052_IRQ_GPI8 24 |
65 | #define DA9052_IRQ_GPI9 25 |
66 | #define DA9052_IRQ_GPI10 26 |
67 | #define DA9052_IRQ_GPI11 27 |
68 | #define DA9052_IRQ_GPI12 28 |
69 | #define DA9052_IRQ_GPI13 29 |
70 | #define DA9052_IRQ_GPI14 30 |
71 | #define DA9052_IRQ_GPI15 31 |
72 | |
73 | enum da9052_chip_id { |
74 | DA9052, |
75 | DA9053_AA, |
76 | DA9053_BA, |
77 | DA9053_BB, |
78 | DA9053_BC, |
79 | }; |
80 | |
81 | struct da9052_pdata; |
82 | |
83 | struct da9052 { |
84 | struct device *dev; |
85 | struct regmap *regmap; |
86 | |
87 | struct mutex auxadc_lock; |
88 | struct completion done; |
89 | |
90 | int irq_base; |
91 | struct regmap_irq_chip_data *irq_data; |
92 | u8 chip_id; |
93 | |
94 | int chip_irq; |
95 | |
96 | /* SOC I/O transfer related fixes for DA9052/53 */ |
97 | int (*fix_io) (struct da9052 *da9052, unsigned char reg); |
98 | }; |
99 | |
100 | /* ADC API */ |
101 | int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel); |
102 | int da9052_adc_read_temp(struct da9052 *da9052); |
103 | |
104 | /* Device I/O API */ |
105 | static inline int da9052_reg_read(struct da9052 *da9052, unsigned char reg) |
106 | { |
107 | int val, ret; |
108 | |
109 | ret = regmap_read(map: da9052->regmap, reg, val: &val); |
110 | if (ret < 0) |
111 | return ret; |
112 | |
113 | if (da9052->fix_io) { |
114 | ret = da9052->fix_io(da9052, reg); |
115 | if (ret < 0) |
116 | return ret; |
117 | } |
118 | |
119 | return val; |
120 | } |
121 | |
122 | static inline int da9052_reg_write(struct da9052 *da9052, unsigned char reg, |
123 | unsigned char val) |
124 | { |
125 | int ret; |
126 | |
127 | ret = regmap_write(map: da9052->regmap, reg, val); |
128 | if (ret < 0) |
129 | return ret; |
130 | |
131 | if (da9052->fix_io) { |
132 | ret = da9052->fix_io(da9052, reg); |
133 | if (ret < 0) |
134 | return ret; |
135 | } |
136 | |
137 | return ret; |
138 | } |
139 | |
140 | static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg, |
141 | unsigned reg_cnt, unsigned char *val) |
142 | { |
143 | int ret; |
144 | unsigned int tmp; |
145 | int i; |
146 | |
147 | for (i = 0; i < reg_cnt; i++) { |
148 | ret = regmap_read(map: da9052->regmap, reg: reg + i, val: &tmp); |
149 | val[i] = (unsigned char)tmp; |
150 | if (ret < 0) |
151 | return ret; |
152 | } |
153 | |
154 | if (da9052->fix_io) { |
155 | ret = da9052->fix_io(da9052, reg); |
156 | if (ret < 0) |
157 | return ret; |
158 | } |
159 | |
160 | return ret; |
161 | } |
162 | |
163 | static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg, |
164 | unsigned reg_cnt, unsigned char *val) |
165 | { |
166 | int ret = 0; |
167 | int i; |
168 | |
169 | for (i = 0; i < reg_cnt; i++) { |
170 | ret = regmap_write(map: da9052->regmap, reg: reg + i, val: val[i]); |
171 | if (ret < 0) |
172 | return ret; |
173 | } |
174 | |
175 | if (da9052->fix_io) { |
176 | ret = da9052->fix_io(da9052, reg); |
177 | if (ret < 0) |
178 | return ret; |
179 | } |
180 | |
181 | return ret; |
182 | } |
183 | |
184 | static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg, |
185 | unsigned char bit_mask, |
186 | unsigned char reg_val) |
187 | { |
188 | int ret; |
189 | |
190 | ret = regmap_update_bits(map: da9052->regmap, reg, mask: bit_mask, val: reg_val); |
191 | if (ret < 0) |
192 | return ret; |
193 | |
194 | if (da9052->fix_io) { |
195 | ret = da9052->fix_io(da9052, reg); |
196 | if (ret < 0) |
197 | return ret; |
198 | } |
199 | |
200 | return ret; |
201 | } |
202 | |
203 | int da9052_device_init(struct da9052 *da9052, u8 chip_id); |
204 | void da9052_device_exit(struct da9052 *da9052); |
205 | |
206 | extern const struct regmap_config da9052_regmap_config; |
207 | |
208 | int da9052_irq_init(struct da9052 *da9052); |
209 | int da9052_irq_exit(struct da9052 *da9052); |
210 | int da9052_request_irq(struct da9052 *da9052, int irq, char *name, |
211 | irq_handler_t handler, void *data); |
212 | void da9052_free_irq(struct da9052 *da9052, int irq, void *data); |
213 | |
214 | int da9052_enable_irq(struct da9052 *da9052, int irq); |
215 | int da9052_disable_irq(struct da9052 *da9052, int irq); |
216 | int da9052_disable_irq_nosync(struct da9052 *da9052, int irq); |
217 | |
218 | #endif /* __MFD_DA9052_DA9052_H */ |
219 | |