| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics |
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| 3 | * Digitizer with Horizontal PLL registers |
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| 4 | * |
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| 5 | * Copyright (C) 2009 Texas Instruments Inc |
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| 6 | * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com> |
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| 7 | * |
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| 8 | * This code is partially based upon the TVP5150 driver |
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| 9 | * written by Mauro Carvalho Chehab <mchehab@kernel.org>, |
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| 10 | * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com> |
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| 11 | * and the TVP7002 driver in the TI LSP 2.10.00.14 |
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| 12 | */ |
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| 13 | #ifndef _TVP7002_H_ |
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| 14 | #define _TVP7002_H_ |
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| 15 | |
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| 16 | #define TVP7002_MODULE_NAME "tvp7002" |
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| 17 | |
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| 18 | /** |
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| 19 | * struct tvp7002_config - Platform dependent data |
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| 20 | *@clk_polarity: Clock polarity |
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| 21 | * 0 - Data clocked out on rising edge of DATACLK signal |
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| 22 | * 1 - Data clocked out on falling edge of DATACLK signal |
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| 23 | *@hs_polarity: HSYNC polarity |
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| 24 | * 0 - Active low HSYNC output, 1 - Active high HSYNC output |
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| 25 | *@vs_polarity: VSYNC Polarity |
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| 26 | * 0 - Active low VSYNC output, 1 - Active high VSYNC output |
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| 27 | *@fid_polarity: Active-high Field ID polarity. |
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| 28 | * 0 - The field ID output is set to logic 1 for an odd field |
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| 29 | * (field 1) and set to logic 0 for an even field (field 0). |
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| 30 | * 1 - Operation with polarity inverted. |
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| 31 | *@sog_polarity: Active high Sync on Green output polarity. |
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| 32 | * 0 - Normal operation, 1 - Operation with polarity inverted |
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| 33 | */ |
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| 34 | struct tvp7002_config { |
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| 35 | bool clk_polarity; |
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| 36 | bool hs_polarity; |
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| 37 | bool vs_polarity; |
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| 38 | bool fid_polarity; |
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| 39 | bool sog_polarity; |
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| 40 | }; |
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| 41 | #endif |
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| 42 | |
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