1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * |
4 | * Microchip PolarFire SoC (MPFS) |
5 | * |
6 | * Copyright (c) 2020 Microchip Corporation. All rights reserved. |
7 | * |
8 | * Author: Conor Dooley <conor.dooley@microchip.com> |
9 | * |
10 | */ |
11 | |
12 | #ifndef __SOC_MPFS_H__ |
13 | #define __SOC_MPFS_H__ |
14 | |
15 | #include <linux/types.h> |
16 | #include <linux/of_device.h> |
17 | |
18 | struct mpfs_sys_controller; |
19 | |
20 | struct mpfs_mss_msg { |
21 | u8 cmd_opcode; |
22 | u16 cmd_data_size; |
23 | struct mpfs_mss_response *response; |
24 | u8 *cmd_data; |
25 | u16 mbox_offset; |
26 | u16 resp_offset; |
27 | }; |
28 | |
29 | struct mpfs_mss_response { |
30 | u32 resp_status; |
31 | u32 *resp_msg; |
32 | u16 resp_size; |
33 | }; |
34 | |
35 | #if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL) |
36 | |
37 | int mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, struct mpfs_mss_msg *msg); |
38 | |
39 | struct mpfs_sys_controller *mpfs_sys_controller_get(struct device *dev); |
40 | |
41 | struct mtd_info *mpfs_sys_controller_get_flash(struct mpfs_sys_controller *mpfs_client); |
42 | |
43 | #endif /* if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL) */ |
44 | |
45 | #if IS_ENABLED(CONFIG_MCHP_CLK_MPFS) |
46 | |
47 | u32 mpfs_reset_read(struct device *dev); |
48 | |
49 | void mpfs_reset_write(struct device *dev, u32 val); |
50 | |
51 | #endif /* if IS_ENABLED(CONFIG_MCHP_CLK_MPFS) */ |
52 | |
53 | #endif /* __SOC_MPFS_H__ */ |
54 | |