1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Arm Statistical Profiling Extensions (SPE) support
4 * Copyright (c) 2017-2018, Arm Ltd.
5 */
6
7#ifndef INCLUDE__ARM_SPE_PKT_DECODER_H__
8#define INCLUDE__ARM_SPE_PKT_DECODER_H__
9
10#include <linux/bitfield.h>
11#include <stddef.h>
12#include <stdint.h>
13
14#define ARM_SPE_PKT_DESC_MAX 256
15
16#define ARM_SPE_NEED_MORE_BYTES -1
17#define ARM_SPE_BAD_PACKET -2
18
19#define ARM_SPE_PKT_MAX_SZ 16
20
21enum arm_spe_pkt_type {
22 ARM_SPE_BAD,
23 ARM_SPE_PAD,
24 ARM_SPE_END,
25 ARM_SPE_TIMESTAMP,
26 ARM_SPE_ADDRESS,
27 ARM_SPE_COUNTER,
28 ARM_SPE_CONTEXT,
29 ARM_SPE_OP_TYPE,
30 ARM_SPE_EVENTS,
31 ARM_SPE_DATA_SOURCE,
32};
33
34struct arm_spe_pkt {
35 enum arm_spe_pkt_type type;
36 unsigned char index;
37 uint64_t payload;
38};
39
40/* Short header (HEADER0) and extended header (HEADER1) */
41#define SPE_HEADER0_PAD 0x0
42#define SPE_HEADER0_END 0x1
43#define SPE_HEADER0_TIMESTAMP 0x71
44/* Mask for event & data source */
45#define SPE_HEADER0_MASK1 (GENMASK_ULL(7, 6) | GENMASK_ULL(3, 0))
46#define SPE_HEADER0_EVENTS 0x42
47#define SPE_HEADER0_SOURCE 0x43
48/* Mask for context & operation */
49#define SPE_HEADER0_MASK2 GENMASK_ULL(7, 2)
50#define SPE_HEADER0_CONTEXT 0x64
51#define SPE_HEADER0_OP_TYPE 0x48
52/* Mask for extended format */
53#define SPE_HEADER0_EXTENDED 0x20
54/* Mask for address & counter */
55#define SPE_HEADER0_MASK3 GENMASK_ULL(7, 3)
56#define SPE_HEADER0_ADDRESS 0xb0
57#define SPE_HEADER0_COUNTER 0x98
58#define SPE_HEADER1_ALIGNMENT 0x0
59
60#define SPE_HDR_SHORT_INDEX(h) ((h) & GENMASK_ULL(2, 0))
61#define SPE_HDR_EXTENDED_INDEX(h0, h1) (((h0) & GENMASK_ULL(1, 0)) << 3 | \
62 SPE_HDR_SHORT_INDEX(h1))
63
64/* Address packet header */
65#define SPE_ADDR_PKT_HDR_INDEX_INS 0x0
66#define SPE_ADDR_PKT_HDR_INDEX_BRANCH 0x1
67#define SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT 0x2
68#define SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS 0x3
69#define SPE_ADDR_PKT_HDR_INDEX_PREV_BRANCH 0x4
70
71/* Address packet payload */
72#define SPE_ADDR_PKT_ADDR_BYTE7_SHIFT 56
73#define SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(v) ((v) & GENMASK_ULL(55, 0))
74#define SPE_ADDR_PKT_ADDR_GET_BYTE_6(v) (((v) & GENMASK_ULL(55, 48)) >> 48)
75
76#define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63)
77#define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61)
78#define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62)
79#define SPE_ADDR_PKT_GET_PAT(v) (((v) & GENMASK_ULL(59, 56)) >> 56)
80
81#define SPE_ADDR_PKT_EL0 0
82#define SPE_ADDR_PKT_EL1 1
83#define SPE_ADDR_PKT_EL2 2
84#define SPE_ADDR_PKT_EL3 3
85
86/* Context packet header */
87#define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0))
88
89/* Counter packet header */
90#define SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT 0x0
91#define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT 0x1
92#define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT 0x2
93
94/* Event packet payload */
95enum arm_spe_events {
96 EV_EXCEPTION_GEN = 0,
97 EV_RETIRED = 1,
98 EV_L1D_ACCESS = 2,
99 EV_L1D_REFILL = 3,
100 EV_TLB_ACCESS = 4,
101 EV_TLB_WALK = 5,
102 EV_NOT_TAKEN = 6,
103 EV_MISPRED = 7,
104 EV_LLC_ACCESS = 8,
105 EV_LLC_MISS = 9,
106 EV_REMOTE_ACCESS = 10,
107 EV_ALIGNMENT = 11,
108 EV_TRANSACTIONAL = 16,
109 EV_PARTIAL_PREDICATE = 17,
110 EV_EMPTY_PREDICATE = 18,
111 EV_L2D_ACCESS = 19,
112 EV_L2D_MISS = 20,
113 EV_CACHE_DATA_MODIFIED = 21,
114 EV_RECENTLY_FETCHED = 22,
115 EV_DATA_SNOOPED = 23,
116 EV_STREAMING_SVE_MODE = 24,
117 EV_SMCU = 25,
118};
119
120/* Operation packet header */
121#define SPE_OP_PKT_HDR_CLASS(h) ((h) & GENMASK_ULL(1, 0))
122#define SPE_OP_PKT_HDR_CLASS_OTHER 0x0
123#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1
124#define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2
125
126#define SPE_OP_PKT_OTHER_SUBCLASS_OTHER(v) (((v) & GENMASK_ULL(7, 3)) == 0x0)
127#define SPE_OP_PKT_OTHER_SUBCLASS_SVE(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8)
128#define SPE_OP_PKT_OTHER_SUBCLASS_SME(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x88)
129
130#define SPE_OP_PKT_OTHER_ASE BIT(2)
131#define SPE_OP_PKT_OTHER_FP BIT(1)
132
133/*
134 * SME effective vector length or tile size (ETS) is stored in byte 0
135 * bits [6:4,2]; the length is rounded up to a power of two and use 128
136 * as one step, so ETS calculation is:
137 *
138 * 128 * (2 ^ bits [6:4,2]) = 32 << (bits [6:4,2])
139 */
140#define SPE_OP_PKG_SME_ETS(v) (128 << (FIELD_GET(GENMASK_ULL(6, 4), (v)) << 1 | \
141 (FIELD_GET(BIT(2), (v)))))
142
143#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG(v) (((v) & GENMASK_ULL(7, 1)) == 0x0)
144#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(v) (((v) & GENMASK_ULL(7, 1)) == 0x4)
145#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(v) (((v) & GENMASK_ULL(7, 1)) == 0x10)
146#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(v) (((v) & GENMASK_ULL(7, 1)) == 0x30)
147#define SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(v) (((v) & GENMASK_ULL(7, 1)) == 0x14)
148#define SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(v) (((v) & GENMASK_ULL(7, 1)) == 0x20)
149#define SPE_OP_PKT_LDST_SUBCLASS_MEMSET(v) (((v) & GENMASK_ULL(7, 0)) == 0x25)
150
151#define SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(v) (((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)
152
153#define SPE_OP_PKT_AR BIT(4)
154#define SPE_OP_PKT_EXCL BIT(3)
155#define SPE_OP_PKT_AT BIT(2)
156#define SPE_OP_PKT_ST BIT(0)
157
158#define SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(v) (((v) & (BIT(3) | BIT(1))) == 0x8)
159
160#define SPE_OP_PKT_SVE_SG BIT(7)
161/*
162 * SVE effective vector length (EVL) is stored in byte 0 bits [6:4];
163 * the length is rounded up to a power of two and use 32 as one step,
164 * so EVL calculation is:
165 *
166 * 32 * (2 ^ bits [6:4]) = 32 << (bits [6:4])
167 */
168#define SPE_OP_PKG_SVE_EVL(v) (32 << (((v) & GENMASK_ULL(6, 4)) >> 4))
169#define SPE_OP_PKT_SVE_PRED BIT(2)
170#define SPE_OP_PKT_SVE_FP BIT(1)
171
172#define SPE_OP_PKT_LDST_SUBCLASS_GCS(v) (((v) & (GENMASK_ULL(7, 3) | BIT(1))) == 0x40)
173
174#define SPE_OP_PKT_GCS_COMM BIT(2)
175
176#define SPE_OP_PKT_CR_MASK GENMASK_ULL(4, 3)
177#define SPE_OP_PKT_CR_BL(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 1)
178#define SPE_OP_PKT_CR_RET(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 2)
179#define SPE_OP_PKT_CR_NON_BL_RET(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 3)
180#define SPE_OP_PKT_GCS BIT(2)
181#define SPE_OP_PKT_INDIRECT_BRANCH BIT(1)
182#define SPE_OP_PKT_COND BIT(0)
183
184const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
185
186int arm_spe_get_packet(const unsigned char *buf, size_t len,
187 struct arm_spe_pkt *packet);
188
189int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, size_t len);
190#endif
191

source code of linux/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h