| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (C) 2023 ARM Limited. |
| 4 | */ |
| 5 | |
| 6 | #ifndef GCS_UTIL_H |
| 7 | #define GCS_UTIL_H |
| 8 | |
| 9 | #include <stdbool.h> |
| 10 | |
| 11 | #ifndef __NR_map_shadow_stack |
| 12 | #define __NR_map_shadow_stack 453 |
| 13 | #endif |
| 14 | |
| 15 | #ifndef __NR_prctl |
| 16 | #define __NR_prctl 167 |
| 17 | #endif |
| 18 | |
| 19 | #ifndef NT_ARM_GCS |
| 20 | #define NT_ARM_GCS 0x410 |
| 21 | |
| 22 | struct user_gcs { |
| 23 | __u64 features_enabled; |
| 24 | __u64 features_locked; |
| 25 | __u64 gcspr_el0; |
| 26 | }; |
| 27 | #endif |
| 28 | |
| 29 | /* Shadow Stack/Guarded Control Stack interface */ |
| 30 | #define PR_GET_SHADOW_STACK_STATUS 74 |
| 31 | #define PR_SET_SHADOW_STACK_STATUS 75 |
| 32 | #define PR_LOCK_SHADOW_STACK_STATUS 76 |
| 33 | |
| 34 | # define PR_SHADOW_STACK_ENABLE (1UL << 0) |
| 35 | # define PR_SHADOW_STACK_WRITE (1UL << 1) |
| 36 | # define PR_SHADOW_STACK_PUSH (1UL << 2) |
| 37 | |
| 38 | #define PR_SHADOW_STACK_ALL_MODES \ |
| 39 | PR_SHADOW_STACK_ENABLE | PR_SHADOW_STACK_WRITE | PR_SHADOW_STACK_PUSH |
| 40 | |
| 41 | #define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token in the shadow stack */ |
| 42 | #define SHADOW_STACK_SET_MARKER (1ULL << 1) /* Set up a top of stack merker in the shadow stack */ |
| 43 | |
| 44 | #define GCS_CAP_ADDR_MASK (0xfffffffffffff000UL) |
| 45 | #define GCS_CAP_TOKEN_MASK (0x0000000000000fffUL) |
| 46 | #define GCS_CAP_VALID_TOKEN 1 |
| 47 | #define GCS_CAP_IN_PROGRESS_TOKEN 5 |
| 48 | |
| 49 | #define GCS_CAP(x) (((unsigned long)(x) & GCS_CAP_ADDR_MASK) | \ |
| 50 | GCS_CAP_VALID_TOKEN) |
| 51 | |
| 52 | static inline unsigned long *get_gcspr(void) |
| 53 | { |
| 54 | unsigned long *gcspr; |
| 55 | |
| 56 | asm volatile( |
| 57 | "mrs %0, S3_3_C2_C5_1" |
| 58 | : "=r" (gcspr) |
| 59 | : |
| 60 | : "cc" ); |
| 61 | |
| 62 | return gcspr; |
| 63 | } |
| 64 | |
| 65 | static inline void __attribute__((always_inline)) gcsss1(unsigned long *Xt) |
| 66 | { |
| 67 | asm volatile ( |
| 68 | "sys #3, C7, C7, #2, %0\n" |
| 69 | : |
| 70 | : "rZ" (Xt) |
| 71 | : "memory" ); |
| 72 | } |
| 73 | |
| 74 | static inline unsigned long __attribute__((always_inline)) *gcsss2(void) |
| 75 | { |
| 76 | unsigned long *Xt; |
| 77 | |
| 78 | asm volatile( |
| 79 | "SYSL %0, #3, C7, C7, #3\n" |
| 80 | : "=r" (Xt) |
| 81 | : |
| 82 | : "memory" ); |
| 83 | |
| 84 | return Xt; |
| 85 | } |
| 86 | |
| 87 | static inline bool chkfeat_gcs(void) |
| 88 | { |
| 89 | register long val __asm__ ("x16" ) = 1; |
| 90 | |
| 91 | /* CHKFEAT x16 */ |
| 92 | asm volatile( |
| 93 | "hint #0x28\n" |
| 94 | : "=r" (val) |
| 95 | : "r" (val)); |
| 96 | |
| 97 | return val != 1; |
| 98 | } |
| 99 | |
| 100 | #endif |
| 101 | |