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1//===--- TargetBuiltins.h - Target specific builtin IDs ---------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// Enumerates target-specific builtins in their own namespaces within
11/// namespace ::clang.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_CLANG_BASIC_TARGETBUILTINS_H
16#define LLVM_CLANG_BASIC_TARGETBUILTINS_H
17
18#include <algorithm>
19#include <stdint.h>
20#include "clang/Basic/Builtins.h"
21#include "llvm/Support/MathExtras.h"
22#undef PPC
23
24namespace clang {
25
26 namespace NEON {
27 enum {
28 LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
29#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
30#include "clang/Basic/BuiltinsNEON.def"
31 FirstTSBuiltin
32 };
33 }
34
35 /// ARM builtins
36 namespace ARM {
37 enum {
38 LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
39 LastNEONBuiltin = NEON::FirstTSBuiltin - 1,
40#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
41#include "clang/Basic/BuiltinsARM.def"
42 LastTSBuiltin
43 };
44 }
45
46 namespace SVE {
47 enum {
48 LastNEONBuiltin = NEON::FirstTSBuiltin - 1,
49#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
50#include "clang/Basic/BuiltinsSVE.def"
51 FirstTSBuiltin,
52 };
53 }
54
55 /// AArch64 builtins
56 namespace AArch64 {
57 enum {
58 LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
59 LastNEONBuiltin = NEON::FirstTSBuiltin - 1,
60 FirstSVEBuiltin = NEON::FirstTSBuiltin,
61 LastSVEBuiltin = SVE::FirstTSBuiltin - 1,
62 #define BUILTIN(ID, TYPE, ATTRS) BI##ID,
63 #include "clang/Basic/BuiltinsAArch64.def"
64 LastTSBuiltin
65 };
66 }
67
68 /// BPF builtins
69 namespace BPF {
70 enum {
71 LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
72 #define BUILTIN(ID, TYPE, ATTRS) BI##ID,
73 #include "clang/Basic/BuiltinsBPF.def"
74 LastTSBuiltin
75 };
76 }
77
78 /// PPC builtins
79 namespace PPC {
80 enum {
81 LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
82#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
83#include "clang/Basic/BuiltinsPPC.def"
84 LastTSBuiltin
85 };
86 }
87
88 /// NVPTX builtins
89 namespace NVPTX {
90 enum {
91 LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
92#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
93#include "clang/Basic/BuiltinsNVPTX.def"
94 LastTSBuiltin
95 };
96 }
97
98 /// AMDGPU builtins
99 namespace AMDGPU {
100 enum {
101 LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
102 #define BUILTIN(ID, TYPE, ATTRS) BI##ID,
103 #include "clang/Basic/BuiltinsAMDGPU.def"
104 LastTSBuiltin
105 };
106 }
107
108 /// X86 builtins
109 namespace X86 {
110 enum {
111 LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
112#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
113#include "clang/Basic/BuiltinsX86.def"
114 FirstX86_64Builtin,
115 LastX86CommonBuiltin = FirstX86_64Builtin - 1,
116#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
117#include "clang/Basic/BuiltinsX86_64.def"
118 LastTSBuiltin
119 };
120 }
121
122 /// VE builtins
123 namespace VE {
124 enum {
125 LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
126#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
127#include "clang/Basic/BuiltinsVE.def"
128 LastTSBuiltin
129 };
130 }
131
132 namespace RISCVVector {
133 enum {
134 LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
135#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
136#include "clang/Basic/BuiltinsRISCVVector.def"
137 FirstTSBuiltin,
138 };
139 }
140
141 /// RISCV builtins
142 namespace RISCV {
143 enum {
144 LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
145 FirstRVVBuiltin = clang::Builtin::FirstTSBuiltin,
146 LastRVVBuiltin = RISCVVector::FirstTSBuiltin - 1,
147#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
148#include "clang/Basic/BuiltinsRISCV.def"
149 LastTSBuiltin
150 };
151 } // namespace RISCV
152
153 /// Flags to identify the types for overloaded Neon builtins.
154 ///
155 /// These must be kept in sync with the flags in utils/TableGen/NeonEmitter.h.
156 class NeonTypeFlags {
157 enum {
158 EltTypeMask = 0xf,
159 UnsignedFlag = 0x10,
160 QuadFlag = 0x20
161 };
162 uint32_t Flags;
163
164 public:
165 enum EltType {
166 Int8,
167 Int16,
168 Int32,
169 Int64,
170 Poly8,
171 Poly16,
172 Poly64,
173 Poly128,
174 Float16,
175 Float32,
176 Float64,
177 BFloat16
178 };
179
180 NeonTypeFlags(unsigned F) : Flags(F) {}
181 NeonTypeFlags(EltType ET, bool IsUnsigned, bool IsQuad) : Flags(ET) {
182 if (IsUnsigned)
183 Flags |= UnsignedFlag;
184 if (IsQuad)
185 Flags |= QuadFlag;
186 }
187
188 EltType getEltType() const { return (EltType)(Flags & EltTypeMask); }
189 bool isPoly() const {
190 EltType ET = getEltType();
191 return ET == Poly8 || ET == Poly16 || ET == Poly64;
192 }
193 bool isUnsigned() const { return (Flags & UnsignedFlag) != 0; }
194 bool isQuad() const { return (Flags & QuadFlag) != 0; }
195 };
196
197 /// Flags to identify the types for overloaded SVE builtins.
198 class SVETypeFlags {
199 uint64_t Flags;
200 unsigned EltTypeShift;
201 unsigned MemEltTypeShift;
202 unsigned MergeTypeShift;
203 unsigned SplatOperandMaskShift;
204
205 public:
206#define LLVM_GET_SVE_TYPEFLAGS
207#include "clang/Basic/arm_sve_typeflags.inc"
208#undef LLVM_GET_SVE_TYPEFLAGS
209
210 enum EltType {
211#define LLVM_GET_SVE_ELTTYPES
212#include "clang/Basic/arm_sve_typeflags.inc"
213#undef LLVM_GET_SVE_ELTTYPES
214 };
215
216 enum MemEltType {
217#define LLVM_GET_SVE_MEMELTTYPES
218#include "clang/Basic/arm_sve_typeflags.inc"
219#undef LLVM_GET_SVE_MEMELTTYPES
220 };
221
222 enum MergeType {
223#define LLVM_GET_SVE_MERGETYPES
224#include "clang/Basic/arm_sve_typeflags.inc"
225#undef LLVM_GET_SVE_MERGETYPES
226 };
227
228 enum ImmCheckType {
229#define LLVM_GET_SVE_IMMCHECKTYPES
230#include "clang/Basic/arm_sve_typeflags.inc"
231#undef LLVM_GET_SVE_IMMCHECKTYPES
232 };
233
234 SVETypeFlags(uint64_t F) : Flags(F) {
235 EltTypeShift = llvm::countTrailingZeros(EltTypeMask);
236 MemEltTypeShift = llvm::countTrailingZeros(MemEltTypeMask);
237 MergeTypeShift = llvm::countTrailingZeros(MergeTypeMask);
238 SplatOperandMaskShift = llvm::countTrailingZeros(SplatOperandMask);
239 }
240
241 EltType getEltType() const {
242 return (EltType)((Flags & EltTypeMask) >> EltTypeShift);
243 }
244
245 MemEltType getMemEltType() const {
246 return (MemEltType)((Flags & MemEltTypeMask) >> MemEltTypeShift);
247 }
248
249 MergeType getMergeType() const {
250 return (MergeType)((Flags & MergeTypeMask) >> MergeTypeShift);
251 }
252
253 unsigned getSplatOperand() const {
254 return ((Flags & SplatOperandMask) >> SplatOperandMaskShift) - 1;
255 }
256
257 bool hasSplatOperand() const {
258 return Flags & SplatOperandMask;
259 }
260
261 bool isLoad() const { return Flags & IsLoad; }
262 bool isStore() const { return Flags & IsStore; }
263 bool isGatherLoad() const { return Flags & IsGatherLoad; }
264 bool isScatterStore() const { return Flags & IsScatterStore; }
265 bool isStructLoad() const { return Flags & IsStructLoad; }
266 bool isStructStore() const { return Flags & IsStructStore; }
267 bool isZExtReturn() const { return Flags & IsZExtReturn; }
268 bool isByteIndexed() const { return Flags & IsByteIndexed; }
269 bool isOverloadNone() const { return Flags & IsOverloadNone; }
270 bool isOverloadWhile() const { return Flags & IsOverloadWhile; }
271 bool isOverloadDefault() const { return !(Flags & OverloadKindMask); }
272 bool isOverloadWhileRW() const { return Flags & IsOverloadWhileRW; }
273 bool isOverloadCvt() const { return Flags & IsOverloadCvt; }
274 bool isPrefetch() const { return Flags & IsPrefetch; }
275 bool isReverseCompare() const { return Flags & ReverseCompare; }
276 bool isAppendSVALL() const { return Flags & IsAppendSVALL; }
277 bool isInsertOp1SVALL() const { return Flags & IsInsertOp1SVALL; }
278 bool isGatherPrefetch() const { return Flags & IsGatherPrefetch; }
279 bool isReverseUSDOT() const { return Flags & ReverseUSDOT; }
280 bool isUndef() const { return Flags & IsUndef; }
281 bool isTupleCreate() const { return Flags & IsTupleCreate; }
282 bool isTupleGet() const { return Flags & IsTupleGet; }
283 bool isTupleSet() const { return Flags & IsTupleSet; }
284
285 uint64_t getBits() const { return Flags; }
286 bool isFlagSet(uint64_t Flag) const { return Flags & Flag; }
287 };
288
289 /// Hexagon builtins
290 namespace Hexagon {
291 enum {
292 LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
293#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
294#include "clang/Basic/BuiltinsHexagon.def"
295 LastTSBuiltin
296 };
297 }
298
299 /// MIPS builtins
300 namespace Mips {
301 enum {
302 LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
303#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
304#include "clang/Basic/BuiltinsMips.def"
305 LastTSBuiltin
306 };
307 }
308
309 /// XCore builtins
310 namespace XCore {
311 enum {
312 LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
313#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
314#include "clang/Basic/BuiltinsXCore.def"
315 LastTSBuiltin
316 };
317 }
318
319 /// SystemZ builtins
320 namespace SystemZ {
321 enum {
322 LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
323#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
324#include "clang/Basic/BuiltinsSystemZ.def"
325 LastTSBuiltin
326 };
327 }
328
329 /// WebAssembly builtins
330 namespace WebAssembly {
331 enum {
332 LastTIBuiltin = clang::Builtin::FirstTSBuiltin-1,
333#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
334#include "clang/Basic/BuiltinsWebAssembly.def"
335 LastTSBuiltin
336 };
337 }
338
339 static constexpr uint64_t LargestBuiltinID = std::max<uint64_t>(
340 {ARM::LastTSBuiltin, AArch64::LastTSBuiltin, BPF::LastTSBuiltin,
341 PPC::LastTSBuiltin, NVPTX::LastTSBuiltin, AMDGPU::LastTSBuiltin,
342 X86::LastTSBuiltin, VE::LastTSBuiltin, RISCV::LastTSBuiltin,
343 Hexagon::LastTSBuiltin, Mips::LastTSBuiltin, XCore::LastTSBuiltin,
344 SystemZ::LastTSBuiltin, WebAssembly::LastTSBuiltin});
345
346} // end namespace clang.
347
348#endif
349

Warning: This file is not a C or C++ file. It does not have highlighting.

source code of clang/include/clang/Basic/TargetBuiltins.h