| 1 | //===-- floatunssidfvfp.S - Implement floatunssidfvfp ---------------------===// |
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| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | |
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| 9 | #include "../assembly.h" |
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| 10 | |
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| 11 | // |
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| 12 | // extern double __floatunssidfvfp(unsigned int a); |
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| 13 | // |
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| 14 | // Converts a 32-bit int to a double precision float. |
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| 15 | // Uses Darwin calling convention where a double precision result is |
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| 16 | // return in GPR register pair. |
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| 17 | // |
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| 18 | .syntax unified |
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| 19 | .p2align 2 |
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| 20 | DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp) |
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| 21 | #if defined(COMPILER_RT_ARMHF_TARGET) |
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| 22 | vmov s0, r0 |
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| 23 | vcvt.f64.u32 d0, s0 |
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| 24 | #else |
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| 25 | vmov s15, r0 // move int to float register s15 |
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| 26 | vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7 |
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| 27 | vmov r0, r1, d7 // move d7 to result register pair r0/r1 |
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| 28 | #endif |
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| 29 | bx lr |
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| 30 | END_COMPILERRT_FUNCTION(__floatunssidfvfp) |
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| 31 | |
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| 32 | NO_EXEC_STACK_DIRECTIVE |
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| 33 | |
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| 34 | |
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