| 1 | //===-- hwasan_registers.h --------------------------------------*- C++ -*-===// |
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| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | // |
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| 9 | // This describes the register state retrieved by hwasan when error reporting. |
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| 10 | // |
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| 11 | //===----------------------------------------------------------------------===// |
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| 12 | |
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| 13 | #ifndef HWASAN_REGISTERS_H |
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| 14 | #define HWASAN_REGISTERS_H |
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| 15 | |
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| 16 | #include "sanitizer_common/sanitizer_common.h" |
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| 17 | #include "sanitizer_common/sanitizer_platform.h" |
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| 18 | |
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| 19 | #if defined(__aarch64__) |
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| 20 | |
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| 21 | # define CAN_GET_REGISTERS 1 |
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| 22 | |
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| 23 | struct Registers { |
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| 24 | uptr x[32]; |
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| 25 | }; |
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| 26 | |
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| 27 | __attribute__((always_inline, unused)) static Registers GetRegisters() { |
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| 28 | Registers regs; |
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| 29 | __asm__ volatile( |
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| 30 | "stp x0, x1, [%1, #(8 * 0)]\n" |
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| 31 | "stp x2, x3, [%1, #(8 * 2)]\n" |
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| 32 | "stp x4, x5, [%1, #(8 * 4)]\n" |
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| 33 | "stp x6, x7, [%1, #(8 * 6)]\n" |
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| 34 | "stp x8, x9, [%1, #(8 * 8)]\n" |
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| 35 | "stp x10, x11, [%1, #(8 * 10)]\n" |
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| 36 | "stp x12, x13, [%1, #(8 * 12)]\n" |
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| 37 | "stp x14, x15, [%1, #(8 * 14)]\n" |
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| 38 | "stp x16, x17, [%1, #(8 * 16)]\n" |
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| 39 | "stp x18, x19, [%1, #(8 * 18)]\n" |
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| 40 | "stp x20, x21, [%1, #(8 * 20)]\n" |
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| 41 | "stp x22, x23, [%1, #(8 * 22)]\n" |
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| 42 | "stp x24, x25, [%1, #(8 * 24)]\n" |
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| 43 | "stp x26, x27, [%1, #(8 * 26)]\n" |
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| 44 | "stp x28, x29, [%1, #(8 * 28)]\n" |
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| 45 | : "=m" (regs) |
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| 46 | : "r" (regs.x)); |
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| 47 | regs.x[30] = reinterpret_cast<uintptr_t>(__builtin_return_address(0)); |
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| 48 | regs.x[31] = reinterpret_cast<uintptr_t>(__builtin_frame_address(0)); |
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| 49 | return regs; |
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| 50 | } |
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| 51 | |
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| 52 | #else |
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| 53 | # define CAN_GET_REGISTERS 0 |
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| 54 | #endif |
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| 55 | |
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| 56 | #endif // HWASAN_REGISTERS_H |
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| 57 | |
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