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| 2 | //===-- Implementation of longjmp -----------------------------------------===// |
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| 3 | // |
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| 4 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 5 | // See https://llvm.org/LICENSE.txt for license information. |
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| 6 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 7 | // |
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| 8 | //===----------------------------------------------------------------------===// |
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| 9 | |
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| 10 | #include "src/setjmp/longjmp.h" |
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| 11 | #include "src/__support/common.h" |
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| 12 | #include "src/__support/macros/config.h" |
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| 13 | |
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| 14 | namespace LIBC_NAMESPACE_DECL { |
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| 15 | |
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| 16 | #if defined(__thumb__) && __ARM_ARCH_ISA_THUMB == 1 |
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| 17 | |
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| 18 | [[gnu::naked, gnu::target("thumb" )]] LLVM_LIBC_FUNCTION(void, longjmp, |
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| 19 | (jmp_buf buf, |
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| 20 | int val)) { |
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| 21 | asm(R"( |
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| 22 | # Reload r4, r5, r6, r7. |
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| 23 | ldmia r0!, {r4-r7} |
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| 24 | |
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| 25 | # Reload r8, r9. They cannot appear in register lists so load them |
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| 26 | # into the lower registers, then move them into place. |
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| 27 | ldmia r0!, {r2-r3} |
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| 28 | mov r8, r2 |
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| 29 | mov r9, r3 |
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| 30 | |
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| 31 | # Reload r10, r11. They cannot appear in register lists so load them |
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| 32 | # into the lower registers, then move them into place. |
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| 33 | ldmia r0!, {r2-r3} |
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| 34 | mov r10, r2 |
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| 35 | mov r11, r3 |
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| 36 | |
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| 37 | # Reload sp, lr. They cannot appear in register lists so load them |
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| 38 | # into the lower registers, then move them into place. |
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| 39 | ldmia r0!, {r2-r3} |
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| 40 | mov sp, r2 |
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| 41 | mov lr, r3 |
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| 42 | |
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| 43 | # return val ?: 1; |
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| 44 | movs r0, r1 |
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| 45 | bne .Lret_val |
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| 46 | movs r0, #1 |
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| 47 | |
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| 48 | .Lret_val: |
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| 49 | bx lr)" ); |
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| 50 | } |
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| 51 | |
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| 52 | #else // Thumb2 or ARM |
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| 53 | |
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| 54 | // TODO(https://github.com/llvm/llvm-project/issues/94061): fp registers |
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| 55 | // (d0-d16) |
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| 56 | // TODO(https://github.com/llvm/llvm-project/issues/94062): pac+bti |
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| 57 | [[gnu::naked]] LLVM_LIBC_FUNCTION(void, longjmp, (jmp_buf buf, int val)) { |
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| 58 | asm(R"( |
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| 59 | # While sp may appear in a register list for ARM mode, it may not for |
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| 60 | # Thumb2 mode. Just load the previous value of sp into r12 then move it |
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| 61 | # into sp, so that this code is portable between ARM and Thumb2. |
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| 62 | |
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| 63 | ldm r0, {r4-r12, lr} |
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| 64 | mov sp, r12 |
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| 65 | |
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| 66 | # return val ?: 1; |
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| 67 | movs r0, r1 |
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| 68 | it eq |
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| 69 | moveq r0, #1 |
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| 70 | bx lr)" ); |
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| 71 | } |
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| 72 | |
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| 73 | #endif |
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| 74 | |
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| 75 | } // namespace LIBC_NAMESPACE_DECL |
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| 76 | |
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