| 1 | //===-- LinuxPTraceDefines_arm64sve.h ------------------------- -*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | |
| 9 | #ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LINUXPTRACEDEFINES_ARM64SVE_H |
| 10 | #define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LINUXPTRACEDEFINES_ARM64SVE_H |
| 11 | |
| 12 | #include <cstdint> |
| 13 | |
| 14 | namespace lldb_private { |
| 15 | namespace sve { |
| 16 | |
| 17 | /* |
| 18 | * The SVE architecture leaves space for future expansion of the |
| 19 | * vector length beyond its initial architectural limit of 2048 bits |
| 20 | * (16 quadwords). |
| 21 | * |
| 22 | * See <Linux kernel source tree>/Documentation/arm64/sve.rst for a description |
| 23 | * of the vl/vq terminology. |
| 24 | */ |
| 25 | |
| 26 | const uint16_t vq_bytes = 16; /* number of bytes per quadword */ |
| 27 | |
| 28 | const uint16_t vq_min = 1; |
| 29 | const uint16_t vq_max = 512; |
| 30 | |
| 31 | const uint16_t vl_min = vq_min * vq_bytes; |
| 32 | const uint16_t vl_max = vq_max * vq_bytes; |
| 33 | |
| 34 | const uint16_t num_of_zregs = 32; |
| 35 | const uint16_t num_of_pregs = 16; |
| 36 | |
| 37 | inline uint16_t vl_valid(uint16_t vl) { |
| 38 | return (vl % vq_bytes == 0 && vl >= vl_min && vl <= vl_max); |
| 39 | } |
| 40 | |
| 41 | inline uint16_t vq_from_vl(uint16_t vl) { return vl / vq_bytes; } |
| 42 | inline uint16_t vl_from_vq(uint16_t vq) { return vq * vq_bytes; } |
| 43 | |
| 44 | /* A new signal frame record sve_context encodes the SVE Registers on signal |
| 45 | * delivery. sve_context struct definition may be included in asm/sigcontext.h. |
| 46 | * We define sve_context_size which will be used by LLDB sve helper functions. |
| 47 | * More information on sve_context can be found in Linux kernel source tree at |
| 48 | * Documentation/arm64/sve.rst. |
| 49 | */ |
| 50 | |
| 51 | const uint16_t sve_context_size = 16; |
| 52 | |
| 53 | /* |
| 54 | * If the SVE registers are currently live for the thread at signal delivery, |
| 55 | * sve_context.head.size >= |
| 56 | * SigContextSize(vq_from_vl(sve_context.vl)) |
| 57 | * and the register data may be accessed using the Sig*() functions. |
| 58 | * |
| 59 | * If sve_context.head.size < |
| 60 | * SigContextSize(vq_from_vl(sve_context.vl)), |
| 61 | * the SVE registers were not live for the thread and no register data |
| 62 | * is included: in this case, the Sig*() functions should not be |
| 63 | * used except for this check. |
| 64 | * |
| 65 | * The same convention applies when returning from a signal: a caller |
| 66 | * will need to remove or resize the sve_context block if it wants to |
| 67 | * make the SVE registers live when they were previously non-live or |
| 68 | * vice-versa. This may require the caller to allocate fresh |
| 69 | * memory and/or move other context blocks in the signal frame. |
| 70 | * |
| 71 | * Changing the vector length during signal return is not permitted: |
| 72 | * sve_context.vl must equal the thread's current vector length when |
| 73 | * doing a sigreturn. |
| 74 | * |
| 75 | * |
| 76 | * Note: for all these functions, the "vq" argument denotes the SVE |
| 77 | * vector length in quadwords (i.e., units of 128 bits). |
| 78 | * |
| 79 | * The correct way to obtain vq is to use vq_from_vl(vl). The |
| 80 | * result is valid if and only if vl_valid(vl) is true. This is |
| 81 | * guaranteed for a struct sve_context written by the kernel. |
| 82 | * |
| 83 | * |
| 84 | * Additional functions describe the contents and layout of the payload. |
| 85 | * For each, Sig*Offset(args) is the start offset relative to |
| 86 | * the start of struct sve_context, and Sig*Size(args) is the |
| 87 | * size in bytes: |
| 88 | * |
| 89 | * x type description |
| 90 | * - ---- ----------- |
| 91 | * REGS the entire SVE context |
| 92 | * |
| 93 | * ZREGS __uint128_t[num_of_zregs][vq] all Z-registers |
| 94 | * ZREG __uint128_t[vq] individual Z-register Zn |
| 95 | * |
| 96 | * PREGS uint16_t[num_of_pregs][vq] all P-registers |
| 97 | * PREG uint16_t[vq] individual P-register Pn |
| 98 | * |
| 99 | * FFR uint16_t[vq] first-fault status register |
| 100 | * |
| 101 | * Additional data might be appended in the future. |
| 102 | */ |
| 103 | |
| 104 | inline uint16_t SigZRegSize(uint16_t vq) { return vq * vq_bytes; } |
| 105 | inline uint16_t SigPRegSize(uint16_t vq) { return vq * vq_bytes / 8; } |
| 106 | inline uint16_t SigFFRSize(uint16_t vq) { return SigPRegSize(vq); } |
| 107 | |
| 108 | inline uint32_t SigRegsOffset() { |
| 109 | return (sve_context_size + vq_bytes - 1) / vq_bytes * vq_bytes; |
| 110 | } |
| 111 | |
| 112 | inline uint32_t SigZRegsOffset() { return SigRegsOffset(); } |
| 113 | |
| 114 | inline uint32_t SigZRegOffset(uint16_t vq, uint16_t n) { |
| 115 | return SigRegsOffset() + SigZRegSize(vq) * n; |
| 116 | } |
| 117 | |
| 118 | inline uint32_t SigZRegsSize(uint16_t vq) { |
| 119 | return SigZRegOffset(vq, n: num_of_zregs) - SigRegsOffset(); |
| 120 | } |
| 121 | |
| 122 | inline uint32_t SigPRegsOffset(uint16_t vq) { |
| 123 | return SigRegsOffset() + SigZRegsSize(vq); |
| 124 | } |
| 125 | |
| 126 | inline uint32_t SigPRegOffset(uint16_t vq, uint16_t n) { |
| 127 | return SigPRegsOffset(vq) + SigPRegSize(vq) * n; |
| 128 | } |
| 129 | |
| 130 | inline uint32_t SigpRegsSize(uint16_t vq) { |
| 131 | return SigPRegOffset(vq, n: num_of_pregs) - SigPRegsOffset(vq); |
| 132 | } |
| 133 | |
| 134 | inline uint32_t SigFFROffset(uint16_t vq) { |
| 135 | return SigPRegsOffset(vq) + SigpRegsSize(vq); |
| 136 | } |
| 137 | |
| 138 | inline uint32_t SigRegsSize(uint16_t vq) { |
| 139 | return SigFFROffset(vq) + SigFFRSize(vq) - SigRegsOffset(); |
| 140 | } |
| 141 | |
| 142 | inline uint32_t SVESigContextSize(uint16_t vq) { |
| 143 | return SigRegsOffset() + SigRegsSize(vq); |
| 144 | } |
| 145 | |
| 146 | struct { |
| 147 | uint32_t ; /* total meaningful regset content in bytes */ |
| 148 | uint32_t ; /* maxmium possible size for this thread */ |
| 149 | uint16_t ; /* current vector length */ |
| 150 | uint16_t ; /* maximum possible vector length */ |
| 151 | uint16_t ; |
| 152 | uint16_t ; |
| 153 | }; |
| 154 | |
| 155 | using = user_sve_header; |
| 156 | |
| 157 | /* Definitions for user_sve_header.flags: */ |
| 158 | const uint16_t ptrace_regs_mask = 1 << 0; |
| 159 | const uint16_t ptrace_regs_fpsimd = 0; |
| 160 | const uint16_t ptrace_regs_sve = ptrace_regs_mask; |
| 161 | |
| 162 | /* |
| 163 | * The remainder of the SVE state follows struct user_sve_header. The |
| 164 | * total size of the SVE state (including header) depends on the |
| 165 | * metadata in the header: PTraceSize(vq, flags) gives the total size |
| 166 | * of the state in bytes, including the header. |
| 167 | * |
| 168 | * Refer to <asm/sigcontext.h> for details of how to pass the correct |
| 169 | * "vq" argument to these macros. |
| 170 | */ |
| 171 | |
| 172 | /* Offset from the start of struct user_sve_header to the register data */ |
| 173 | inline uint16_t PTraceRegsOffset() { |
| 174 | return (sizeof(struct user_sve_header) + vq_bytes - 1) / vq_bytes * vq_bytes; |
| 175 | } |
| 176 | |
| 177 | /* |
| 178 | * The register data content and layout depends on the value of the |
| 179 | * flags field. |
| 180 | */ |
| 181 | |
| 182 | /* |
| 183 | * (flags & ptrace_regs_mask) == ptrace_regs_fpsimd case: |
| 184 | * |
| 185 | * The payload starts at offset PTraceFPSIMDOffset, and is of type |
| 186 | * struct user_fpsimd_state. Additional data might be appended in the |
| 187 | * future: use PTraceFPSIMDSize(vq, flags) to compute the total size. |
| 188 | * PTraceFPSIMDSize(vq, flags) will never be less than |
| 189 | * sizeof(struct user_fpsimd_state). |
| 190 | */ |
| 191 | |
| 192 | const uint32_t ptrace_fpsimd_offset = PTraceRegsOffset(); |
| 193 | |
| 194 | /* Return size of struct user_fpsimd_state from asm/ptrace.h */ |
| 195 | inline uint32_t PTraceFPSIMDSize(uint16_t vq, uint16_t flags) { return 528; } |
| 196 | |
| 197 | /* |
| 198 | * (flags & ptrace_regs_mask) == ptrace_regs_sve case: |
| 199 | * |
| 200 | * The payload starts at offset PTraceSVEOffset, and is of size |
| 201 | * PTraceSVESize(vq, flags). |
| 202 | * |
| 203 | * Additional functions describe the contents and layout of the payload. |
| 204 | * For each, PTrace*X*Offset(args) is the start offset relative to |
| 205 | * the start of struct user_sve_header, and PTrace*X*Size(args) is |
| 206 | * the size in bytes: |
| 207 | * |
| 208 | * x type description |
| 209 | * - ---- ----------- |
| 210 | * ZREGS \ |
| 211 | * ZREG | |
| 212 | * PREGS | refer to <asm/sigcontext.h> |
| 213 | * PREG | |
| 214 | * FFR / |
| 215 | * |
| 216 | * FPSR uint32_t FPSR |
| 217 | * FPCR uint32_t FPCR |
| 218 | * |
| 219 | * Additional data might be appended in the future. |
| 220 | */ |
| 221 | |
| 222 | inline uint32_t PTraceZRegSize(uint16_t vq) { return SigZRegSize(vq); } |
| 223 | |
| 224 | inline uint32_t PTracePRegSize(uint16_t vq) { return SigPRegSize(vq); } |
| 225 | |
| 226 | inline uint32_t PTraceFFRSize(uint16_t vq) { return SigFFRSize(vq); } |
| 227 | |
| 228 | const uint32_t fpsr_size = sizeof(uint32_t); |
| 229 | const uint32_t fpcr_size = sizeof(uint32_t); |
| 230 | |
| 231 | inline uint32_t SigToPTrace(uint32_t offset) { |
| 232 | return offset - SigRegsOffset() + PTraceRegsOffset(); |
| 233 | } |
| 234 | |
| 235 | const uint32_t ptrace_sve_offset = PTraceRegsOffset(); |
| 236 | |
| 237 | inline uint32_t PTraceZRegsOffset(uint16_t vq) { |
| 238 | return SigToPTrace(offset: SigZRegsOffset()); |
| 239 | } |
| 240 | |
| 241 | inline uint32_t PTraceZRegOffset(uint16_t vq, uint16_t n) { |
| 242 | return SigToPTrace(offset: SigZRegOffset(vq, n)); |
| 243 | } |
| 244 | |
| 245 | inline uint32_t PTraceZRegsSize(uint16_t vq) { |
| 246 | return PTraceZRegOffset(vq, n: num_of_zregs) - SigToPTrace(offset: SigRegsOffset()); |
| 247 | } |
| 248 | |
| 249 | inline uint32_t PTracePRegsOffset(uint16_t vq) { |
| 250 | return SigToPTrace(offset: SigPRegsOffset(vq)); |
| 251 | } |
| 252 | |
| 253 | inline uint32_t PTracePRegOffset(uint16_t vq, uint16_t n) { |
| 254 | return SigToPTrace(offset: SigPRegOffset(vq, n)); |
| 255 | } |
| 256 | |
| 257 | inline uint32_t PTracePRegsSize(uint16_t vq) { |
| 258 | return PTracePRegOffset(vq, n: num_of_pregs) - PTracePRegsOffset(vq); |
| 259 | } |
| 260 | |
| 261 | inline uint32_t PTraceFFROffset(uint16_t vq) { |
| 262 | return SigToPTrace(offset: SigFFROffset(vq)); |
| 263 | } |
| 264 | |
| 265 | inline uint32_t PTraceFPSROffset(uint16_t vq) { |
| 266 | return (PTraceFFROffset(vq) + PTraceFFRSize(vq) + (vq_bytes - 1)) / vq_bytes * |
| 267 | vq_bytes; |
| 268 | } |
| 269 | |
| 270 | inline uint32_t PTraceFPCROffset(uint16_t vq) { |
| 271 | return PTraceFPSROffset(vq) + fpsr_size; |
| 272 | } |
| 273 | |
| 274 | /* |
| 275 | * Any future extension appended after FPCR must be aligned to the next |
| 276 | * 128-bit boundary. |
| 277 | */ |
| 278 | |
| 279 | inline uint32_t PTraceSVESize(uint16_t vq, uint16_t flags) { |
| 280 | return (PTraceFPCROffset(vq) + fpcr_size - ptrace_sve_offset + vq_bytes - 1) / |
| 281 | vq_bytes * vq_bytes; |
| 282 | } |
| 283 | |
| 284 | inline uint32_t PTraceSize(uint16_t vq, uint16_t flags) { |
| 285 | return (flags & ptrace_regs_mask) == ptrace_regs_sve |
| 286 | ? ptrace_sve_offset + PTraceSVESize(vq, flags) |
| 287 | : ptrace_fpsimd_offset + PTraceFPSIMDSize(vq, flags); |
| 288 | } |
| 289 | |
| 290 | } // namespace SVE |
| 291 | } // namespace lldb_private |
| 292 | |
| 293 | #endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LINUXPTRACEDEFINES_ARM64SVE_H |
| 294 | |