1 | //===-- lldb-ppc64le-register-enums.h ---------------------------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | |
9 | #ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_PPC64LE_REGISTER_ENUMS_H |
10 | #define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_PPC64LE_REGISTER_ENUMS_H |
11 | |
12 | // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB) |
13 | |
14 | // Internal codes for all ppc64le registers. |
15 | enum { |
16 | k_first_gpr_ppc64le, |
17 | gpr_r0_ppc64le = k_first_gpr_ppc64le, |
18 | gpr_r1_ppc64le, |
19 | gpr_r2_ppc64le, |
20 | gpr_r3_ppc64le, |
21 | gpr_r4_ppc64le, |
22 | gpr_r5_ppc64le, |
23 | gpr_r6_ppc64le, |
24 | gpr_r7_ppc64le, |
25 | gpr_r8_ppc64le, |
26 | gpr_r9_ppc64le, |
27 | gpr_r10_ppc64le, |
28 | gpr_r11_ppc64le, |
29 | gpr_r12_ppc64le, |
30 | gpr_r13_ppc64le, |
31 | gpr_r14_ppc64le, |
32 | gpr_r15_ppc64le, |
33 | gpr_r16_ppc64le, |
34 | gpr_r17_ppc64le, |
35 | gpr_r18_ppc64le, |
36 | gpr_r19_ppc64le, |
37 | gpr_r20_ppc64le, |
38 | gpr_r21_ppc64le, |
39 | gpr_r22_ppc64le, |
40 | gpr_r23_ppc64le, |
41 | gpr_r24_ppc64le, |
42 | gpr_r25_ppc64le, |
43 | gpr_r26_ppc64le, |
44 | gpr_r27_ppc64le, |
45 | gpr_r28_ppc64le, |
46 | gpr_r29_ppc64le, |
47 | gpr_r30_ppc64le, |
48 | gpr_r31_ppc64le, |
49 | gpr_pc_ppc64le, |
50 | gpr_msr_ppc64le, |
51 | gpr_origr3_ppc64le, |
52 | gpr_ctr_ppc64le, |
53 | gpr_lr_ppc64le, |
54 | gpr_xer_ppc64le, |
55 | gpr_cr_ppc64le, |
56 | gpr_softe_ppc64le, |
57 | gpr_trap_ppc64le, |
58 | k_last_gpr_ppc64le = gpr_trap_ppc64le, |
59 | |
60 | k_first_fpr_ppc64le, |
61 | fpr_f0_ppc64le = k_first_fpr_ppc64le, |
62 | fpr_f1_ppc64le, |
63 | fpr_f2_ppc64le, |
64 | fpr_f3_ppc64le, |
65 | fpr_f4_ppc64le, |
66 | fpr_f5_ppc64le, |
67 | fpr_f6_ppc64le, |
68 | fpr_f7_ppc64le, |
69 | fpr_f8_ppc64le, |
70 | fpr_f9_ppc64le, |
71 | fpr_f10_ppc64le, |
72 | fpr_f11_ppc64le, |
73 | fpr_f12_ppc64le, |
74 | fpr_f13_ppc64le, |
75 | fpr_f14_ppc64le, |
76 | fpr_f15_ppc64le, |
77 | fpr_f16_ppc64le, |
78 | fpr_f17_ppc64le, |
79 | fpr_f18_ppc64le, |
80 | fpr_f19_ppc64le, |
81 | fpr_f20_ppc64le, |
82 | fpr_f21_ppc64le, |
83 | fpr_f22_ppc64le, |
84 | fpr_f23_ppc64le, |
85 | fpr_f24_ppc64le, |
86 | fpr_f25_ppc64le, |
87 | fpr_f26_ppc64le, |
88 | fpr_f27_ppc64le, |
89 | fpr_f28_ppc64le, |
90 | fpr_f29_ppc64le, |
91 | fpr_f30_ppc64le, |
92 | fpr_f31_ppc64le, |
93 | fpr_fpscr_ppc64le, |
94 | k_last_fpr_ppc64le = fpr_fpscr_ppc64le, |
95 | |
96 | k_first_vmx_ppc64le, |
97 | vmx_vr0_ppc64le = k_first_vmx_ppc64le, |
98 | vmx_vr1_ppc64le, |
99 | vmx_vr2_ppc64le, |
100 | vmx_vr3_ppc64le, |
101 | vmx_vr4_ppc64le, |
102 | vmx_vr5_ppc64le, |
103 | vmx_vr6_ppc64le, |
104 | vmx_vr7_ppc64le, |
105 | vmx_vr8_ppc64le, |
106 | vmx_vr9_ppc64le, |
107 | vmx_vr10_ppc64le, |
108 | vmx_vr11_ppc64le, |
109 | vmx_vr12_ppc64le, |
110 | vmx_vr13_ppc64le, |
111 | vmx_vr14_ppc64le, |
112 | vmx_vr15_ppc64le, |
113 | vmx_vr16_ppc64le, |
114 | vmx_vr17_ppc64le, |
115 | vmx_vr18_ppc64le, |
116 | vmx_vr19_ppc64le, |
117 | vmx_vr20_ppc64le, |
118 | vmx_vr21_ppc64le, |
119 | vmx_vr22_ppc64le, |
120 | vmx_vr23_ppc64le, |
121 | vmx_vr24_ppc64le, |
122 | vmx_vr25_ppc64le, |
123 | vmx_vr26_ppc64le, |
124 | vmx_vr27_ppc64le, |
125 | vmx_vr28_ppc64le, |
126 | vmx_vr29_ppc64le, |
127 | vmx_vr30_ppc64le, |
128 | vmx_vr31_ppc64le, |
129 | vmx_vscr_ppc64le, |
130 | vmx_vrsave_ppc64le, |
131 | k_last_vmx_ppc64le = vmx_vrsave_ppc64le, |
132 | |
133 | k_first_vsx_ppc64le, |
134 | vsx_vs0_ppc64le = k_first_vsx_ppc64le, |
135 | vsx_vs1_ppc64le, |
136 | vsx_vs2_ppc64le, |
137 | vsx_vs3_ppc64le, |
138 | vsx_vs4_ppc64le, |
139 | vsx_vs5_ppc64le, |
140 | vsx_vs6_ppc64le, |
141 | vsx_vs7_ppc64le, |
142 | vsx_vs8_ppc64le, |
143 | vsx_vs9_ppc64le, |
144 | vsx_vs10_ppc64le, |
145 | vsx_vs11_ppc64le, |
146 | vsx_vs12_ppc64le, |
147 | vsx_vs13_ppc64le, |
148 | vsx_vs14_ppc64le, |
149 | vsx_vs15_ppc64le, |
150 | vsx_vs16_ppc64le, |
151 | vsx_vs17_ppc64le, |
152 | vsx_vs18_ppc64le, |
153 | vsx_vs19_ppc64le, |
154 | vsx_vs20_ppc64le, |
155 | vsx_vs21_ppc64le, |
156 | vsx_vs22_ppc64le, |
157 | vsx_vs23_ppc64le, |
158 | vsx_vs24_ppc64le, |
159 | vsx_vs25_ppc64le, |
160 | vsx_vs26_ppc64le, |
161 | vsx_vs27_ppc64le, |
162 | vsx_vs28_ppc64le, |
163 | vsx_vs29_ppc64le, |
164 | vsx_vs30_ppc64le, |
165 | vsx_vs31_ppc64le, |
166 | vsx_vs32_ppc64le, |
167 | vsx_vs33_ppc64le, |
168 | vsx_vs34_ppc64le, |
169 | vsx_vs35_ppc64le, |
170 | vsx_vs36_ppc64le, |
171 | vsx_vs37_ppc64le, |
172 | vsx_vs38_ppc64le, |
173 | vsx_vs39_ppc64le, |
174 | vsx_vs40_ppc64le, |
175 | vsx_vs41_ppc64le, |
176 | vsx_vs42_ppc64le, |
177 | vsx_vs43_ppc64le, |
178 | vsx_vs44_ppc64le, |
179 | vsx_vs45_ppc64le, |
180 | vsx_vs46_ppc64le, |
181 | vsx_vs47_ppc64le, |
182 | vsx_vs48_ppc64le, |
183 | vsx_vs49_ppc64le, |
184 | vsx_vs50_ppc64le, |
185 | vsx_vs51_ppc64le, |
186 | vsx_vs52_ppc64le, |
187 | vsx_vs53_ppc64le, |
188 | vsx_vs54_ppc64le, |
189 | vsx_vs55_ppc64le, |
190 | vsx_vs56_ppc64le, |
191 | vsx_vs57_ppc64le, |
192 | vsx_vs58_ppc64le, |
193 | vsx_vs59_ppc64le, |
194 | vsx_vs60_ppc64le, |
195 | vsx_vs61_ppc64le, |
196 | vsx_vs62_ppc64le, |
197 | vsx_vs63_ppc64le, |
198 | k_last_vsx_ppc64le = vsx_vs63_ppc64le, |
199 | |
200 | k_num_registers_ppc64le, |
201 | k_num_gpr_registers_ppc64le = k_last_gpr_ppc64le - k_first_gpr_ppc64le + 1, |
202 | k_num_fpr_registers_ppc64le = k_last_fpr_ppc64le - k_first_fpr_ppc64le + 1, |
203 | k_num_vmx_registers_ppc64le = k_last_vmx_ppc64le - k_first_vmx_ppc64le + 1, |
204 | k_num_vsx_registers_ppc64le = k_last_vsx_ppc64le - k_first_vsx_ppc64le + 1, |
205 | }; |
206 | |
207 | #endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_PPC64LE_REGISTER_ENUMS_H |
208 | |