1 | #include <stdint.h> |
---|---|
2 | |
3 | #ifdef LASX |
4 | #define ELEM_COUNT 32 |
5 | #define REPLGR2VR_B "xvreplgr2vr.b $xr" |
6 | #define ST "xvst $xr" |
7 | #else |
8 | #define ELEM_COUNT 16 |
9 | #define REPLGR2VR_B "vreplgr2vr.b $vr" |
10 | #define ST "vst $vr" |
11 | #endif |
12 | |
13 | // base is added to each value. If base = 2, then |
14 | // assume the vector element type is char: |
15 | // $reg0 = { 0x02 * $ELEM_COUNT } |
16 | // $reg1 = { 0x03 * $ELEM_COUNT } etc. |
17 | void write_simd_regs(unsigned base) { |
18 | #define WRITE_SIMD(NUM) \ |
19 | asm volatile(REPLGR2VR_B #NUM ", %0\n\t" ::"r"(base + NUM)) |
20 | WRITE_SIMD(0); |
21 | WRITE_SIMD(1); |
22 | WRITE_SIMD(2); |
23 | WRITE_SIMD(3); |
24 | WRITE_SIMD(4); |
25 | WRITE_SIMD(5); |
26 | WRITE_SIMD(6); |
27 | WRITE_SIMD(7); |
28 | WRITE_SIMD(8); |
29 | WRITE_SIMD(9); |
30 | WRITE_SIMD(10); |
31 | WRITE_SIMD(11); |
32 | WRITE_SIMD(12); |
33 | WRITE_SIMD(13); |
34 | WRITE_SIMD(14); |
35 | WRITE_SIMD(15); |
36 | WRITE_SIMD(16); |
37 | WRITE_SIMD(17); |
38 | WRITE_SIMD(18); |
39 | WRITE_SIMD(19); |
40 | WRITE_SIMD(20); |
41 | WRITE_SIMD(21); |
42 | WRITE_SIMD(22); |
43 | WRITE_SIMD(23); |
44 | WRITE_SIMD(24); |
45 | WRITE_SIMD(25); |
46 | WRITE_SIMD(26); |
47 | WRITE_SIMD(27); |
48 | WRITE_SIMD(28); |
49 | WRITE_SIMD(29); |
50 | WRITE_SIMD(30); |
51 | WRITE_SIMD(31); |
52 | } |
53 | |
54 | unsigned verify_simd_regs() { |
55 | uint8_t simd_reg[ELEM_COUNT]; |
56 | uint8_t target = 0; |
57 | |
58 | #define VERIFY_SIMD(NUM) \ |
59 | do { \ |
60 | for (int i = 0; i < ELEM_COUNT; ++i) \ |
61 | simd_reg[i] = 0; \ |
62 | asm volatile(ST #NUM ", %0\n\t" ::"m"(simd_reg)); \ |
63 | target = NUM + 1; \ |
64 | for (int i = 0; i < ELEM_COUNT; ++i) \ |
65 | if (simd_reg[i] != target) \ |
66 | return 1; \ |
67 | } while (0) |
68 | |
69 | VERIFY_SIMD(0); |
70 | VERIFY_SIMD(1); |
71 | VERIFY_SIMD(2); |
72 | VERIFY_SIMD(3); |
73 | VERIFY_SIMD(4); |
74 | VERIFY_SIMD(5); |
75 | VERIFY_SIMD(6); |
76 | VERIFY_SIMD(7); |
77 | VERIFY_SIMD(8); |
78 | VERIFY_SIMD(9); |
79 | VERIFY_SIMD(10); |
80 | VERIFY_SIMD(11); |
81 | VERIFY_SIMD(12); |
82 | VERIFY_SIMD(13); |
83 | VERIFY_SIMD(14); |
84 | VERIFY_SIMD(15); |
85 | VERIFY_SIMD(16); |
86 | VERIFY_SIMD(17); |
87 | VERIFY_SIMD(18); |
88 | VERIFY_SIMD(19); |
89 | VERIFY_SIMD(20); |
90 | VERIFY_SIMD(21); |
91 | VERIFY_SIMD(22); |
92 | VERIFY_SIMD(23); |
93 | VERIFY_SIMD(24); |
94 | VERIFY_SIMD(25); |
95 | VERIFY_SIMD(26); |
96 | VERIFY_SIMD(27); |
97 | VERIFY_SIMD(28); |
98 | VERIFY_SIMD(29); |
99 | VERIFY_SIMD(30); |
100 | VERIFY_SIMD(31); |
101 | |
102 | return 0; |
103 | } |
104 | int main(int argc, char *argv[]) { |
105 | write_simd_regs(base: 0); |
106 | |
107 | return verify_simd_regs(); // Set break point at this line. |
108 | } |
109 |