1#include <mach-o/loader.h>
2#include <stdio.h>
3#include <stdlib.h>
4#include <string>
5#include <vector>
6
7
8// Normally these are picked up by including <mach/thread_status.h>
9// but that does a compile time check for the build host arch and
10// only defines the ARM register context constants when building on
11// an arm system. We're creating fake corefiles, and might be
12// creating them on an intel system.
13#ifndef ARM_THREAD_STATE
14#define ARM_THREAD_STATE 1
15#endif
16#ifndef ARM_THREAD_STATE_COUNT
17#define ARM_THREAD_STATE_COUNT 17
18#endif
19#ifndef ARM_EXCEPTION_STATE
20#define ARM_EXCEPTION_STATE 3
21#endif
22#ifndef ARM_EXCEPTION_STATE_COUNT
23#define ARM_EXCEPTION_STATE_COUNT 3
24#endif
25#ifndef ARM_THREAD_STATE64
26#define ARM_THREAD_STATE64 6
27#endif
28#ifndef ARM_THREAD_STATE64_COUNT
29#define ARM_THREAD_STATE64_COUNT 68
30#endif
31#ifndef ARM_EXCEPTION_STATE64
32#define ARM_EXCEPTION_STATE64 7
33#endif
34#ifndef ARM_EXCEPTION_STATE64_COUNT
35#define ARM_EXCEPTION_STATE64_COUNT 4
36#endif
37
38union uint32_buf {
39 uint8_t bytebuf[4];
40 uint32_t val;
41};
42
43union uint64_buf {
44 uint8_t bytebuf[8];
45 uint64_t val;
46};
47
48void add_uint64(std::vector<uint8_t> &buf, uint64_t val) {
49 uint64_buf conv;
50 conv.val = val;
51 for (int i = 0; i < 8; i++)
52 buf.push_back(conv.bytebuf[i]);
53}
54
55void add_uint32(std::vector<uint8_t> &buf, uint32_t val) {
56 uint32_buf conv;
57 conv.val = val;
58 for (int i = 0; i < 4; i++)
59 buf.push_back(conv.bytebuf[i]);
60}
61
62std::vector<uint8_t> armv7_lc_thread_load_command() {
63 std::vector<uint8_t> data;
64 add_uint32(data, LC_THREAD); // thread_command.cmd
65 add_uint32(data, 104); // thread_command.cmdsize
66 add_uint32(data, ARM_THREAD_STATE); // thread_command.flavor
67 add_uint32(data, ARM_THREAD_STATE_COUNT); // thread_command.count
68 add_uint32(data, 0x00010000); // r0
69 add_uint32(data, 0x00020000); // r1
70 add_uint32(data, 0x00030000); // r2
71 add_uint32(data, 0x00040000); // r3
72 add_uint32(data, 0x00050000); // r4
73 add_uint32(data, 0x00060000); // r5
74 add_uint32(data, 0x00070000); // r6
75 add_uint32(data, 0x00080000); // r7
76 add_uint32(data, 0x00090000); // r8
77 add_uint32(data, 0x000a0000); // r9
78 add_uint32(data, 0x000b0000); // r10
79 add_uint32(data, 0x000c0000); // r11
80 add_uint32(data, 0x000d0000); // r12
81 add_uint32(data, 0x000e0000); // sp
82 add_uint32(data, 0x000f0000); // lr
83 add_uint32(data, 0x00100000); // pc
84 add_uint32(data, 0x00110000); // cpsr
85
86 add_uint32(data, ARM_EXCEPTION_STATE); // thread_command.flavor
87 add_uint32(data, ARM_EXCEPTION_STATE_COUNT); // thread_command.count
88 add_uint32(data, 0x00003f5c); // far
89 add_uint32(data, 0xf2000000); // esr
90 add_uint32(data, 0x00000000); // exception
91
92 return data;
93}
94
95std::vector<uint8_t> arm64_lc_thread_load_command() {
96 std::vector<uint8_t> data;
97 add_uint32(data, LC_THREAD); // thread_command.cmd
98 add_uint32(data, 312); // thread_command.cmdsize
99 add_uint32(data, ARM_THREAD_STATE64); // thread_command.flavor
100 add_uint32(data, ARM_THREAD_STATE64_COUNT); // thread_command.count
101 add_uint64(data, 0x0000000000000001); // x0
102 add_uint64(data, 0x000000016fdff3c0); // x1
103 add_uint64(data, 0x000000016fdff3d0); // x2
104 add_uint64(data, 0x000000016fdff510); // x3
105 add_uint64(data, 0x0000000000000000); // x4
106 add_uint64(data, 0x0000000000000000); // x5
107 add_uint64(data, 0x0000000000000000); // x6
108 add_uint64(data, 0x0000000000000000); // x7
109 add_uint64(data, 0x000000010000d910); // x8
110 add_uint64(data, 0x0000000000000001); // x9
111 add_uint64(data, 0xe1e88de000000000); // x10
112 add_uint64(data, 0x0000000000000003); // x11
113 add_uint64(data, 0x0000000000000148); // x12
114 add_uint64(data, 0x0000000000004000); // x13
115 add_uint64(data, 0x0000000000000008); // x14
116 add_uint64(data, 0x0000000000000000); // x15
117 add_uint64(data, 0x0000000000000000); // x16
118 add_uint64(data, 0x0000000100003f5c); // x17
119 add_uint64(data, 0x0000000000000000); // x18
120 add_uint64(data, 0x0000000100003f5c); // x19
121 add_uint64(data, 0x000000010000c000); // x20
122 add_uint64(data, 0x000000010000d910); // x21
123 add_uint64(data, 0x000000016fdff250); // x22
124 add_uint64(data, 0x000000018ce12366); // x23
125 add_uint64(data, 0x000000016fdff1d0); // x24
126 add_uint64(data, 0x0000000000000001); // x25
127 add_uint64(data, 0x0000000000000000); // x26
128 add_uint64(data, 0x0000000000000000); // x27
129 add_uint64(data, 0x0000000000000000); // x28
130 add_uint64(data, 0x000000016fdff3a0); // fp
131 add_uint64(data, 0x000000018cd97f28); // lr
132 add_uint64(data, 0x000000016fdff140); // sp
133 add_uint64(data, 0x0000000100003f5c); // pc
134 add_uint32(data, 0x80001000); // cpsr
135
136 add_uint32(data, 0x00000000); // padding
137
138 add_uint32(data, ARM_EXCEPTION_STATE64); // thread_command.flavor
139 add_uint32(data, ARM_EXCEPTION_STATE64_COUNT); // thread_command.count
140 add_uint64(data, 0x0000000100003f5c); // far
141 add_uint32(data, 0xf2000000); // esr
142 add_uint32(data, 0x00000000); // exception
143
144 return data;
145}
146
147std::vector<uint8_t> lc_segment(uint32_t fileoff,
148 uint32_t lc_segment_data_size) {
149 std::vector<uint8_t> data;
150 // 0x000e0000 is the value of $sp in the armv7 LC_THREAD
151 uint32_t start_vmaddr = 0x000e0000 - (lc_segment_data_size / 2);
152 add_uint32(data, LC_SEGMENT); // segment_command.cmd
153 add_uint32(data, sizeof(struct segment_command)); // segment_command.cmdsize
154 for (int i = 0; i < 16; i++)
155 data.push_back(0); // segment_command.segname[16]
156 add_uint32(data, start_vmaddr); // segment_command.vmaddr
157 add_uint32(data, lc_segment_data_size); // segment_command.vmsize
158 add_uint32(data, fileoff); // segment_command.fileoff
159 add_uint32(data, lc_segment_data_size); // segment_command.filesize
160 add_uint32(data, 3); // segment_command.maxprot
161 add_uint32(data, 3); // segment_command.initprot
162 add_uint32(data, 0); // segment_command.nsects
163 add_uint32(data, 0); // segment_command.flags
164
165 return data;
166}
167
168enum arch { unspecified, armv7, arm64 };
169
170int main(int argc, char **argv) {
171 if (argc != 3) {
172 fprintf(stderr,
173 format: "usage: create-arm-corefiles [armv7|arm64] <output-core-name>\n");
174 exit(status: 1);
175 }
176
177 arch arch = unspecified;
178
179 if (strcmp(argv[1], "armv7") == 0)
180 arch = armv7;
181 else if (strcmp(argv[1], "arm64") == 0)
182 arch = arm64;
183 else {
184 fprintf(stderr, format: "unrecognized architecture %s\n", argv[1]);
185 exit(status: 1);
186 }
187
188 // An array of load commands (in the form of byte arrays)
189 std::vector<std::vector<uint8_t>> load_commands;
190
191 // An array of corefile contents (page data, lc_note data, etc)
192 std::vector<uint8_t> payload;
193
194 // First add all the load commands / payload so we can figure out how large
195 // the load commands will actually be.
196 if (arch == armv7) {
197 load_commands.push_back(armv7_lc_thread_load_command());
198 load_commands.push_back(lc_segment(0, 0));
199 } else if (arch == arm64) {
200 load_commands.push_back(arm64_lc_thread_load_command());
201 }
202
203 int size_of_load_commands = 0;
204 for (const auto &lc : load_commands)
205 size_of_load_commands += lc.size();
206
207 int header_and_load_cmd_room =
208 sizeof(struct mach_header_64) + size_of_load_commands;
209
210 // Erase the load commands / payload now that we know how much space is
211 // needed, redo it.
212 load_commands.clear();
213 payload.clear();
214
215 int payload_fileoff = (header_and_load_cmd_room + 4096 - 1) & ~(4096 - 1);
216
217 const int lc_segment_data_size = 64;
218 if (arch == armv7) {
219 load_commands.push_back(armv7_lc_thread_load_command());
220 load_commands.push_back(lc_segment(payload_fileoff, lc_segment_data_size));
221 } else if (arch == arm64) {
222 load_commands.push_back(arm64_lc_thread_load_command());
223 }
224
225 if (arch == armv7)
226 for (int i = 0; i < lc_segment_data_size;
227 i++) // from segment_command.filesize
228 payload.push_back(i);
229
230 struct mach_header_64 mh;
231 int header_size;
232 if (arch == armv7) {
233 mh.magic = MH_MAGIC;
234 mh.cputype = CPU_TYPE_ARM;
235 mh.cpusubtype = CPU_SUBTYPE_ARM_V7M;
236 header_size = sizeof(struct mach_header);
237 } else if (arch == arm64) {
238 mh.magic = MH_MAGIC_64;
239 mh.cputype = CPU_TYPE_ARM64;
240 mh.cpusubtype = CPU_SUBTYPE_ARM64_ALL;
241 header_size = sizeof(struct mach_header_64);
242 }
243 mh.filetype = MH_CORE;
244 mh.ncmds = load_commands.size();
245 mh.sizeofcmds = size_of_load_commands;
246 mh.flags = 0;
247 mh.reserved = 0;
248
249 FILE *f = fopen(filename: argv[2], modes: "w");
250
251 if (f == nullptr) {
252 fprintf(stderr, format: "Unable to open file %s for writing\n", argv[2]);
253 exit(status: 1);
254 }
255
256 fwrite(&mh, header_size, 1, f);
257
258 for (const auto &lc : load_commands)
259 fwrite(lc.data(), lc.size(), 1, f);
260
261 fseek(stream: f, off: payload_fileoff, SEEK_SET);
262
263 fwrite(payload.data(), payload.size(), 1, f);
264
265 fclose(stream: f);
266}
267

source code of lldb/test/API/macosx/arm-corefile-regctx/create-arm-corefiles.cpp