| 1 | void __attribute__((naked)) incomplete_cas(int *a, int *b) { |
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| 2 | // Stop at the first instruction (an sc without a corresponding lr), then make |
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| 3 | // a step instruction and ensure that execution stops at the next instruction |
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| 4 | // (and). |
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| 5 | asm volatile("1:\n\t" |
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| 6 | "sc.w a5, a1, (a3)\n\t" |
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| 7 | "and a5, a2, a4\n\t" |
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| 8 | "beq a5, a1, 2f\n\t" |
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| 9 | "xor a5, a2, a0\n\t" |
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| 10 | "and a5, a5, a4\n\t" |
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| 11 | "xor a5, a2, a5\n\t" |
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| 12 | "sc.w a5, a1, (a3)\n\t" |
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| 13 | "bnez a5, 1b\n\t" |
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| 14 | "2:\n\t" |
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| 15 | "ret\n\t" ); |
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| 16 | } |
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| 17 | |
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| 18 | int main() { |
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| 19 | int a = 4; |
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| 20 | int b = 2; |
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| 21 | incomplete_cas(a: &a, b: &b); |
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| 22 | } |
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| 23 | |
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