1// This program is used to generate a core dump for testing register dumps.
2// The exact set of registers dumped depends on the instruction sets enabled
3// via compiler flags.
4
5#include <cstdint>
6
7struct alignas(64) zmm_t {
8 uint64_t a, b, c, d, e, f, g, h;
9};
10
11struct alignas(16) float80_raw {
12 uint64_t mantissa;
13 uint16_t sign_exp;
14};
15
16int main() {
17 // test data for xmm, ymm and zmm registers
18 constexpr zmm_t zmm[] = {
19 { .a: 0x0706050403020100, .b: 0x0F0E0D0C0B0A0908,
20 .c: 0x1716151413121110, .d: 0x1F1E1D1C1B1A1918,
21 .e: 0x2726252423222120, .f: 0x2F2E2D2C2B2A2928,
22 .g: 0x3736353433323130, .h: 0x3F3E3D3C3B3A3938, },
23 { .a: 0x0807060504030201, .b: 0x100F0E0D0C0B0A09,
24 .c: 0x1817161514131211, .d: 0x201F1E1D1C1B1A19,
25 .e: 0x2827262524232221, .f: 0x302F2E2D2C2B2A29,
26 .g: 0x3837363534333231, .h: 0x403F3E3D3C3B3A39, },
27 { .a: 0x0908070605040302, .b: 0x11100F0E0D0C0B0A,
28 .c: 0x1918171615141312, .d: 0x21201F1E1D1C1B1A,
29 .e: 0x2928272625242322, .f: 0x31302F2E2D2C2B2A,
30 .g: 0x3938373635343332, .h: 0x41403F3E3D3C3B3A, },
31 { .a: 0x0A09080706050403, .b: 0x1211100F0E0D0C0B,
32 .c: 0x1A19181716151413, .d: 0x2221201F1E1D1C1B,
33 .e: 0x2A29282726252423, .f: 0x3231302F2E2D2C2B,
34 .g: 0x3A39383736353433, .h: 0x4241403F3E3D3C3B, },
35 { .a: 0x0B0A090807060504, .b: 0x131211100F0E0D0C,
36 .c: 0x1B1A191817161514, .d: 0x232221201F1E1D1C,
37 .e: 0x2B2A292827262524, .f: 0x333231302F2E2D2C,
38 .g: 0x3B3A393837363534, .h: 0x434241403F3E3D3C, },
39 { .a: 0x0C0B0A0908070605, .b: 0x14131211100F0E0D,
40 .c: 0x1C1B1A1918171615, .d: 0x24232221201F1E1D,
41 .e: 0x2C2B2A2928272625, .f: 0x34333231302F2E2D,
42 .g: 0x3C3B3A3938373635, .h: 0x44434241403F3E3D, },
43 { .a: 0x0D0C0B0A09080706, .b: 0x1514131211100F0E,
44 .c: 0x1D1C1B1A19181716, .d: 0x2524232221201F1E,
45 .e: 0x2D2C2B2A29282726, .f: 0x3534333231302F2E,
46 .g: 0x3D3C3B3A39383736, .h: 0x4544434241403F3E, },
47 { .a: 0x0E0D0C0B0A090807, .b: 0x161514131211100F,
48 .c: 0x1E1D1C1B1A191817, .d: 0x262524232221201F,
49 .e: 0x2E2D2C2B2A292827, .f: 0x363534333231302F,
50 .g: 0x3E3D3C3B3A393837, .h: 0x464544434241403F, },
51#if defined(__x86_64__) || defined(_M_X64)
52 { .a: 0x0F0E0D0C0B0A0908, .b: 0x1716151413121110,
53 .c: 0x1F1E1D1C1B1A1918, .d: 0x2726252423222120,
54 .e: 0x2F2E2D2C2B2A2928, .f: 0x3736353433323130,
55 .g: 0x3F3E3D3C3B3A3938, .h: 0x4746454443424140, },
56 { .a: 0x100F0E0D0C0B0A09, .b: 0x1817161514131211,
57 .c: 0x201F1E1D1C1B1A19, .d: 0x2827262524232221,
58 .e: 0x302F2E2D2C2B2A29, .f: 0x3837363534333231,
59 .g: 0x403F3E3D3C3B3A39, .h: 0x4847464544434241, },
60 { .a: 0x11100F0E0D0C0B0A, .b: 0x1918171615141312,
61 .c: 0x21201F1E1D1C1B1A, .d: 0x2928272625242322,
62 .e: 0x31302F2E2D2C2B2A, .f: 0x3938373635343332,
63 .g: 0x41403F3E3D3C3B3A, .h: 0x4948474645444342, },
64 { .a: 0x1211100F0E0D0C0B, .b: 0x1A19181716151413,
65 .c: 0x2221201F1E1D1C1B, .d: 0x2A29282726252423,
66 .e: 0x3231302F2E2D2C2B, .f: 0x3A39383736353433,
67 .g: 0x4241403F3E3D3C3B, .h: 0x4A49484746454443, },
68 { .a: 0x131211100F0E0D0C, .b: 0x1B1A191817161514,
69 .c: 0x232221201F1E1D1C, .d: 0x2B2A292827262524,
70 .e: 0x333231302F2E2D2C, .f: 0x3B3A393837363534,
71 .g: 0x434241403F3E3D3C, .h: 0x4B4A494847464544, },
72 { .a: 0x14131211100F0E0D, .b: 0x1C1B1A1918171615,
73 .c: 0x24232221201F1E1D, .d: 0x2C2B2A2928272625,
74 .e: 0x34333231302F2E2D, .f: 0x3C3B3A3938373635,
75 .g: 0x44434241403F3E3D, .h: 0x4C4B4A4948474645, },
76 { .a: 0x1514131211100F0E, .b: 0x1D1C1B1A19181716,
77 .c: 0x2524232221201F1E, .d: 0x2D2C2B2A29282726,
78 .e: 0x3534333231302F2E, .f: 0x3D3C3B3A39383736,
79 .g: 0x4544434241403F3E, .h: 0x4D4C4B4A49484746, },
80 { .a: 0x161514131211100F, .b: 0x1E1D1C1B1A191817,
81 .c: 0x262524232221201F, .d: 0x2E2D2C2B2A292827,
82 .e: 0x363534333231302F, .f: 0x3E3D3C3B3A393837,
83 .g: 0x464544434241403F, .h: 0x4E4D4C4B4A494847, },
84 { .a: 0x1716151413121110, .b: 0x1F1E1D1C1B1A1918,
85 .c: 0x2726252423222120, .d: 0x2F2E2D2C2B2A2928,
86 .e: 0x3736353433323130, .f: 0x3F3E3D3C3B3A3938,
87 .g: 0x4746454443424140, .h: 0x4F4E4D4C4B4A4948, },
88 { .a: 0x1817161514131211, .b: 0x201F1E1D1C1B1A19,
89 .c: 0x2827262524232221, .d: 0x302F2E2D2C2B2A29,
90 .e: 0x3837363534333231, .f: 0x403F3E3D3C3B3A39,
91 .g: 0x4847464544434241, .h: 0x504F4E4D4C4B4A49, },
92 { .a: 0x1918171615141312, .b: 0x21201F1E1D1C1B1A,
93 .c: 0x2928272625242322, .d: 0x31302F2E2D2C2B2A,
94 .e: 0x3938373635343332, .f: 0x41403F3E3D3C3B3A,
95 .g: 0x4948474645444342, .h: 0x51504F4E4D4C4B4A, },
96 { .a: 0x1A19181716151413, .b: 0x2221201F1E1D1C1B,
97 .c: 0x2A29282726252423, .d: 0x3231302F2E2D2C2B,
98 .e: 0x3A39383736353433, .f: 0x4241403F3E3D3C3B,
99 .g: 0x4A49484746454443, .h: 0x5251504F4E4D4C4B, },
100 { .a: 0x1B1A191817161514, .b: 0x232221201F1E1D1C,
101 .c: 0x2B2A292827262524, .d: 0x333231302F2E2D2C,
102 .e: 0x3B3A393837363534, .f: 0x434241403F3E3D3C,
103 .g: 0x4B4A494847464544, .h: 0x535251504F4E4D4C, },
104 { .a: 0x1C1B1A1918171615, .b: 0x24232221201F1E1D,
105 .c: 0x2C2B2A2928272625, .d: 0x34333231302F2E2D,
106 .e: 0x3C3B3A3938373635, .f: 0x44434241403F3E3D,
107 .g: 0x4C4B4A4948474645, .h: 0x54535251504F4E4D, },
108 { .a: 0x1D1C1B1A19181716, .b: 0x2524232221201F1E,
109 .c: 0x2D2C2B2A29282726, .d: 0x3534333231302F2E,
110 .e: 0x3D3C3B3A39383736, .f: 0x4544434241403F3E,
111 .g: 0x4D4C4B4A49484746, .h: 0x5554535251504F4E, },
112 { .a: 0x1E1D1C1B1A191817, .b: 0x262524232221201F,
113 .c: 0x2E2D2C2B2A292827, .d: 0x363534333231302F,
114 .e: 0x3E3D3C3B3A393837, .f: 0x464544434241403F,
115 .g: 0x4E4D4C4B4A494847, .h: 0x565554535251504F, },
116 { .a: 0x1F1E1D1C1B1A1918, .b: 0x2726252423222120,
117 .c: 0x2F2E2D2C2B2A2928, .d: 0x3736353433323130,
118 .e: 0x3F3E3D3C3B3A3938, .f: 0x4746454443424140,
119 .g: 0x4F4E4D4C4B4A4948, .h: 0x5756555453525150, },
120 { .a: 0x201F1E1D1C1B1A19, .b: 0x2827262524232221,
121 .c: 0x302F2E2D2C2B2A29, .d: 0x3837363534333231,
122 .e: 0x403F3E3D3C3B3A39, .f: 0x4847464544434241,
123 .g: 0x504F4E4D4C4B4A49, .h: 0x5857565554535251, },
124 { .a: 0x21201F1E1D1C1B1A, .b: 0x2928272625242322,
125 .c: 0x31302F2E2D2C2B2A, .d: 0x3938373635343332,
126 .e: 0x41403F3E3D3C3B3A, .f: 0x4948474645444342,
127 .g: 0x51504F4E4D4C4B4A, .h: 0x5958575655545352, },
128 { .a: 0x2221201F1E1D1C1B, .b: 0x2A29282726252423,
129 .c: 0x3231302F2E2D2C2B, .d: 0x3A39383736353433,
130 .e: 0x4241403F3E3D3C3B, .f: 0x4A49484746454443,
131 .g: 0x5251504F4E4D4C4B, .h: 0x5A59585756555453, },
132 { .a: 0x232221201F1E1D1C, .b: 0x2B2A292827262524,
133 .c: 0x333231302F2E2D2C, .d: 0x3B3A393837363534,
134 .e: 0x434241403F3E3D3C, .f: 0x4B4A494847464544,
135 .g: 0x535251504F4E4D4C, .h: 0x5B5A595857565554, },
136 { .a: 0x24232221201F1E1D, .b: 0x2C2B2A2928272625,
137 .c: 0x34333231302F2E2D, .d: 0x3C3B3A3938373635,
138 .e: 0x44434241403F3E3D, .f: 0x4C4B4A4948474645,
139 .g: 0x54535251504F4E4D, .h: 0x5C5B5A5958575655, },
140 { .a: 0x2524232221201F1E, .b: 0x2D2C2B2A29282726,
141 .c: 0x3534333231302F2E, .d: 0x3D3C3B3A39383736,
142 .e: 0x4544434241403F3E, .f: 0x4D4C4B4A49484746,
143 .g: 0x5554535251504F4E, .h: 0x5D5C5B5A59585756, },
144 { .a: 0x262524232221201F, .b: 0x2E2D2C2B2A292827,
145 .c: 0x363534333231302F, .d: 0x3E3D3C3B3A393837,
146 .e: 0x464544434241403F, .f: 0x4E4D4C4B4A494847,
147 .g: 0x565554535251504F, .h: 0x5E5D5C5B5A595857, },
148#endif
149 };
150
151 // test data for FPU registers
152 float80_raw st[] = {
153 {.mantissa: 0x8000000000000000, .sign_exp: 0x4000}, // +2.0
154 {.mantissa: 0x3f00000000000000, .sign_exp: 0x0000}, // 1.654785e-4932 (denormal)
155 {.mantissa: 0x0000000000000000, .sign_exp: 0x0000}, // +0
156 {.mantissa: 0x0000000000000000, .sign_exp: 0x8000}, // -0
157 {.mantissa: 0x8000000000000000, .sign_exp: 0x7fff}, // +inf
158 {.mantissa: 0x8000000000000000, .sign_exp: 0xffff}, // -inf
159 {.mantissa: 0xc000000000000000, .sign_exp: 0xffff}, // nan
160 // st7 will be freed to test tag word better
161 {.mantissa: 0x0000000000000000, .sign_exp: 0x0000}, // +0
162 };
163
164 // unmask divide-by-zero exception
165 uint16_t cw = 0x037b;
166 // used as single-precision float
167 uint32_t zero = 0;
168
169 // test data for GP registers
170 const uint64_t gpr[] = {
171 0x2726252423222120,
172 0x2827262524232221,
173 0x2928272625242322,
174 0x2A29282726252423,
175 0x2B2A292827262524,
176 0x2C2B2A2928272625,
177 0x2D2C2B2A29282726,
178 0x2E2D2C2B2A292827,
179 0x2F2E2D2C2B2A2928,
180 0x302F2E2D2C2B2A29,
181 0x31302F2E2D2C2B2A,
182 0x3231302F2E2D2C2B,
183 0x333231302F2E2D2C,
184 0x34333231302F2E2D,
185 0x3534333231302F2E,
186 0x363534333231302F,
187 };
188
189 asm volatile(
190 // fill the highest register set supported -- ZMM, YMM or XMM
191#if defined(__AVX512F__)
192 "vmovaps 0x000(%0), %%zmm0\n\t"
193 "vmovaps 0x040(%0), %%zmm1\n\t"
194 "vmovaps 0x080(%0), %%zmm2\n\t"
195 "vmovaps 0x0C0(%0), %%zmm3\n\t"
196 "vmovaps 0x100(%0), %%zmm4\n\t"
197 "vmovaps 0x140(%0), %%zmm5\n\t"
198 "vmovaps 0x180(%0), %%zmm6\n\t"
199 "vmovaps 0x1C0(%0), %%zmm7\n\t"
200#if defined(__x86_64__) || defined(_M_X64)
201 "vmovaps 0x200(%0), %%zmm8\n\t"
202 "vmovaps 0x240(%0), %%zmm9\n\t"
203 "vmovaps 0x280(%0), %%zmm10\n\t"
204 "vmovaps 0x2C0(%0), %%zmm11\n\t"
205 "vmovaps 0x300(%0), %%zmm12\n\t"
206 "vmovaps 0x340(%0), %%zmm13\n\t"
207 "vmovaps 0x380(%0), %%zmm14\n\t"
208 "vmovaps 0x3C0(%0), %%zmm15\n\t"
209 "vmovaps 0x400(%0), %%zmm16\n\t"
210 "vmovaps 0x440(%0), %%zmm17\n\t"
211 "vmovaps 0x480(%0), %%zmm18\n\t"
212 "vmovaps 0x4C0(%0), %%zmm19\n\t"
213 "vmovaps 0x500(%0), %%zmm20\n\t"
214 "vmovaps 0x540(%0), %%zmm21\n\t"
215 "vmovaps 0x580(%0), %%zmm22\n\t"
216 "vmovaps 0x5C0(%0), %%zmm23\n\t"
217 "vmovaps 0x600(%0), %%zmm24\n\t"
218 "vmovaps 0x640(%0), %%zmm25\n\t"
219 "vmovaps 0x680(%0), %%zmm26\n\t"
220 "vmovaps 0x6C0(%0), %%zmm27\n\t"
221 "vmovaps 0x700(%0), %%zmm28\n\t"
222 "vmovaps 0x740(%0), %%zmm29\n\t"
223 "vmovaps 0x780(%0), %%zmm30\n\t"
224 "vmovaps 0x7C0(%0), %%zmm31\n\t"
225#endif // defined(__x86_64__) || defined(_M_X64)
226#elif defined(__AVX__)
227 "vmovaps 0x000(%0), %%ymm0\n\t"
228 "vmovaps 0x040(%0), %%ymm1\n\t"
229 "vmovaps 0x080(%0), %%ymm2\n\t"
230 "vmovaps 0x0C0(%0), %%ymm3\n\t"
231 "vmovaps 0x100(%0), %%ymm4\n\t"
232 "vmovaps 0x140(%0), %%ymm5\n\t"
233 "vmovaps 0x180(%0), %%ymm6\n\t"
234 "vmovaps 0x1C0(%0), %%ymm7\n\t"
235#if defined(__x86_64__) || defined(_M_X64)
236 "vmovaps 0x200(%0), %%ymm8\n\t"
237 "vmovaps 0x240(%0), %%ymm9\n\t"
238 "vmovaps 0x280(%0), %%ymm10\n\t"
239 "vmovaps 0x2C0(%0), %%ymm11\n\t"
240 "vmovaps 0x300(%0), %%ymm12\n\t"
241 "vmovaps 0x340(%0), %%ymm13\n\t"
242 "vmovaps 0x380(%0), %%ymm14\n\t"
243 "vmovaps 0x3C0(%0), %%ymm15\n\t"
244#endif // defined(__x86_64__) || defined(_M_X64)
245#else // !defined(__AVX__)
246 "movaps 0x000(%0), %%xmm0\n\t"
247 "movaps 0x040(%0), %%xmm1\n\t"
248 "movaps 0x080(%0), %%xmm2\n\t"
249 "movaps 0x0C0(%0), %%xmm3\n\t"
250 "movaps 0x100(%0), %%xmm4\n\t"
251 "movaps 0x140(%0), %%xmm5\n\t"
252 "movaps 0x180(%0), %%xmm6\n\t"
253 "movaps 0x1C0(%0), %%xmm7\n\t"
254#if defined(__x86_64__) || defined(_M_X64)
255 "movaps 0x200(%0), %%xmm8\n\t"
256 "movaps 0x240(%0), %%xmm9\n\t"
257 "movaps 0x280(%0), %%xmm10\n\t"
258 "movaps 0x2C0(%0), %%xmm11\n\t"
259 "movaps 0x300(%0), %%xmm12\n\t"
260 "movaps 0x340(%0), %%xmm13\n\t"
261 "movaps 0x380(%0), %%xmm14\n\t"
262 "movaps 0x3C0(%0), %%xmm15\n\t"
263#endif // defined(__x86_64__) || defined(_M_X64)
264#endif
265 "\n\t"
266
267 // fill FPU registers
268 "finit\n\t"
269 "fldcw %2\n\t"
270 // load on stack in reverse order to make the result easier to read
271 "fldt 0x70(%1)\n\t"
272 "fldt 0x60(%1)\n\t"
273 "fldt 0x50(%1)\n\t"
274 "fldt 0x40(%1)\n\t"
275 "fldt 0x30(%1)\n\t"
276 "fldt 0x20(%1)\n\t"
277 "fldt 0x10(%1)\n\t"
278 "fldt 0x00(%1)\n\t"
279 // free st7
280 "ffree %%st(7)\n\t"
281 // this should trigger a divide-by-zero
282 "fdivs (%3)\n\t"
283 "\n\t"
284
285 // fill GP registers
286 // note that this invalidates all parameters
287#if defined(__x86_64__) || defined(_M_X64)
288 "movq 0x78(%4), %%r15\n\t"
289 "movq 0x70(%4), %%r14\n\t"
290 "movq 0x68(%4), %%r13\n\t"
291 "movq 0x60(%4), %%r12\n\t"
292 "movq 0x58(%4), %%r11\n\t"
293 "movq 0x50(%4), %%r10\n\t"
294 "movq 0x48(%4), %%r9\n\t"
295 "movq 0x40(%4), %%r8\n\t"
296 "movq 0x38(%4), %%rdi\n\t"
297 "movq 0x30(%4), %%rsi\n\t"
298 "movq 0x28(%4), %%rbp\n\t"
299 "movq 0x20(%4), %%rsp\n\t"
300 "movq 0x18(%4), %%rdx\n\t"
301 "movq 0x10(%4), %%rcx\n\t"
302 "movq 0x08(%4), %%rbx\n\t"
303 "movq 0x00(%4), %%rax\n\t"
304#else // !(defined(__x86_64__) || defined(_M_X64))
305 "movl 0x38(%4), %%edi\n\t"
306 "movl 0x30(%4), %%esi\n\t"
307 "movl 0x28(%4), %%ebp\n\t"
308 "movl 0x20(%4), %%esp\n\t"
309 "movl 0x18(%4), %%edx\n\t"
310 "movl 0x10(%4), %%ecx\n\t"
311 "movl 0x08(%4), %%ebx\n\t"
312 "movl 0x00(%4), %%eax\n\t"
313#endif
314 "\n\t"
315
316 // trigger SEGV
317 "movl %%eax, 0\n\t"
318 :
319 : "b"(zmm), "c"(st), "m"(cw), "d"(&zero), "a"(gpr)
320 : // clobbers do not really matter since we crash
321 );
322
323 return 0;
324}
325

source code of lldb/test/Shell/Register/Core/Inputs/x86-core-dump.cpp