1//===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines interfaces to access the target independent code generation
10// passes provided by the LLVM backend.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_CODEGEN_PASSES_H
15#define LLVM_CODEGEN_PASSES_H
16
17#include "llvm/Support/CodeGen.h"
18#include "llvm/Support/Discriminator.h"
19#include "llvm/CodeGen/RegAllocCommon.h"
20
21#include <functional>
22#include <string>
23
24namespace llvm {
25
26class FunctionPass;
27class MachineFunction;
28class MachineFunctionPass;
29class ModulePass;
30class Pass;
31class TargetMachine;
32class raw_ostream;
33
34} // End llvm namespace
35
36// List of target independent CodeGen pass IDs.
37namespace llvm {
38
39 /// AtomicExpandPass - At IR level this pass replace atomic instructions with
40 /// __atomic_* library calls, or target specific instruction which implement the
41 /// same semantics in a way which better fits the target backend.
42 FunctionPass *createAtomicExpandPass();
43
44 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
45 /// work well with unreachable basic blocks (what live ranges make sense for a
46 /// block that cannot be reached?). As such, a code generator should either
47 /// not instruction select unreachable blocks, or run this pass as its
48 /// last LLVM modifying pass to clean up blocks that are not reachable from
49 /// the entry block.
50 FunctionPass *createUnreachableBlockEliminationPass();
51
52 /// createBasicBlockSections Pass - This pass assigns sections to machine
53 /// basic blocks and is enabled with -fbasic-block-sections.
54 MachineFunctionPass *createBasicBlockSectionsPass();
55
56 /// createMachineFunctionSplitterPass - This pass splits machine functions
57 /// using profile information.
58 MachineFunctionPass *createMachineFunctionSplitterPass();
59
60 /// MachineFunctionPrinter pass - This pass prints out the machine function to
61 /// the given stream as a debugging tool.
62 MachineFunctionPass *
63 createMachineFunctionPrinterPass(raw_ostream &OS,
64 const std::string &Banner ="");
65
66 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
67 /// using the MIR serialization format.
68 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
69
70 /// This pass resets a MachineFunction when it has the FailedISel property
71 /// as if it was just created.
72 /// If EmitFallbackDiag is true, the pass will emit a
73 /// DiagnosticInfoISelFallback for every MachineFunction it resets.
74 /// If AbortOnFailedISel is true, abort compilation instead of resetting.
75 MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
76 bool AbortOnFailedISel);
77
78 /// createCodeGenPreparePass - Transform the code to expose more pattern
79 /// matching during instruction selection.
80 FunctionPass *createCodeGenPreparePass();
81
82 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
83 /// load-linked/store-conditional loops.
84 extern char &AtomicExpandID;
85
86 /// MachineLoopInfo - This pass is a loop analysis pass.
87 extern char &MachineLoopInfoID;
88
89 /// MachineDominators - This pass is a machine dominators analysis pass.
90 extern char &MachineDominatorsID;
91
92 /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
93 extern char &MachineDominanceFrontierID;
94
95 /// MachineRegionInfo - This pass computes SESE regions for machine functions.
96 extern char &MachineRegionInfoPassID;
97
98 /// EdgeBundles analysis - Bundle machine CFG edges.
99 extern char &EdgeBundlesID;
100
101 /// LiveVariables pass - This pass computes the set of blocks in which each
102 /// variable is life and sets machine operand kill flags.
103 extern char &LiveVariablesID;
104
105 /// PHIElimination - This pass eliminates machine instruction PHI nodes
106 /// by inserting copy instructions. This destroys SSA information, but is the
107 /// desired input for some register allocators. This pass is "required" by
108 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
109 extern char &PHIEliminationID;
110
111 /// LiveIntervals - This analysis keeps track of the live ranges of virtual
112 /// and physical registers.
113 extern char &LiveIntervalsID;
114
115 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
116 extern char &LiveStacksID;
117
118 /// TwoAddressInstruction - This pass reduces two-address instructions to
119 /// use two operands. This destroys SSA information but it is desired by
120 /// register allocators.
121 extern char &TwoAddressInstructionPassID;
122
123 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
124 extern char &ProcessImplicitDefsID;
125
126 /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
127 extern char &RegisterCoalescerID;
128
129 /// MachineScheduler - This pass schedules machine instructions.
130 extern char &MachineSchedulerID;
131
132 /// PostMachineScheduler - This pass schedules machine instructions postRA.
133 extern char &PostMachineSchedulerID;
134
135 /// SpillPlacement analysis. Suggest optimal placement of spill code between
136 /// basic blocks.
137 extern char &SpillPlacementID;
138
139 /// ShrinkWrap pass. Look for the best place to insert save and restore
140 // instruction and update the MachineFunctionInfo with that information.
141 extern char &ShrinkWrapID;
142
143 /// LiveRangeShrink pass. Move instruction close to its definition to shrink
144 /// the definition's live range.
145 extern char &LiveRangeShrinkID;
146
147 /// Greedy register allocator.
148 extern char &RAGreedyID;
149
150 /// Basic register allocator.
151 extern char &RABasicID;
152
153 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
154 /// assigned in VirtRegMap.
155 extern char &VirtRegRewriterID;
156 FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
157
158 /// UnreachableMachineBlockElimination - This pass removes unreachable
159 /// machine basic blocks.
160 extern char &UnreachableMachineBlockElimID;
161
162 /// DeadMachineInstructionElim - This pass removes dead machine instructions.
163 extern char &DeadMachineInstructionElimID;
164
165 /// This pass adds dead/undef flags after analyzing subregister lanes.
166 extern char &DetectDeadLanesID;
167
168 /// This pass perform post-ra machine sink for COPY instructions.
169 extern char &PostRAMachineSinkingID;
170
171 /// This pass adds flow sensitive discriminators.
172 extern char &MIRAddFSDiscriminatorsID;
173
174 /// This pass reads flow sensitive profile.
175 extern char &MIRProfileLoaderPassID;
176
177 /// FastRegisterAllocation Pass - This pass register allocates as fast as
178 /// possible. It is best suited for debug code where live ranges are short.
179 ///
180 FunctionPass *createFastRegisterAllocator();
181 FunctionPass *createFastRegisterAllocator(RegClassFilterFunc F,
182 bool ClearVirtRegs);
183
184 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
185 /// register allocator using the basic regalloc framework.
186 ///
187 FunctionPass *createBasicRegisterAllocator();
188 FunctionPass *createBasicRegisterAllocator(RegClassFilterFunc F);
189
190 /// Greedy register allocation pass - This pass implements a global register
191 /// allocator for optimized builds.
192 ///
193 FunctionPass *createGreedyRegisterAllocator();
194 FunctionPass *createGreedyRegisterAllocator(RegClassFilterFunc F);
195
196 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
197 /// Quadratic Prograaming (PBQP) based register allocator.
198 ///
199 FunctionPass *createDefaultPBQPRegisterAllocator();
200
201 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
202 /// and eliminates abstract frame references.
203 extern char &PrologEpilogCodeInserterID;
204 MachineFunctionPass *createPrologEpilogInserterPass();
205
206 /// ExpandPostRAPseudos - This pass expands pseudo instructions after
207 /// register allocation.
208 extern char &ExpandPostRAPseudosID;
209
210 /// PostRAHazardRecognizer - This pass runs the post-ra hazard
211 /// recognizer.
212 extern char &PostRAHazardRecognizerID;
213
214 /// PostRAScheduler - This pass performs post register allocation
215 /// scheduling.
216 extern char &PostRASchedulerID;
217
218 /// BranchFolding - This pass performs machine code CFG based
219 /// optimizations to delete branches to branches, eliminate branches to
220 /// successor blocks (creating fall throughs), and eliminating branches over
221 /// branches.
222 extern char &BranchFolderPassID;
223
224 /// BranchRelaxation - This pass replaces branches that need to jump further
225 /// than is supported by a branch instruction.
226 extern char &BranchRelaxationPassID;
227
228 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
229 extern char &MachineFunctionPrinterPassID;
230
231 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
232 /// serialization format.
233 extern char &MIRPrintingPassID;
234
235 /// TailDuplicate - Duplicate blocks with unconditional branches
236 /// into tails of their predecessors.
237 extern char &TailDuplicateID;
238
239 /// Duplicate blocks with unconditional branches into tails of their
240 /// predecessors. Variant that works before register allocation.
241 extern char &EarlyTailDuplicateID;
242
243 /// MachineTraceMetrics - This pass computes critical path and CPU resource
244 /// usage in an ensemble of traces.
245 extern char &MachineTraceMetricsID;
246
247 /// EarlyIfConverter - This pass performs if-conversion on SSA form by
248 /// inserting cmov instructions.
249 extern char &EarlyIfConverterID;
250
251 /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
252 /// predicating if/else block and insert select at the join point.
253 extern char &EarlyIfPredicatorID;
254
255 /// This pass performs instruction combining using trace metrics to estimate
256 /// critical-path and resource depth.
257 extern char &MachineCombinerID;
258
259 /// StackSlotColoring - This pass performs stack coloring and merging.
260 /// It merges disjoint allocas to reduce the stack size.
261 extern char &StackColoringID;
262
263 /// IfConverter - This pass performs machine code if conversion.
264 extern char &IfConverterID;
265
266 FunctionPass *createIfConverter(
267 std::function<bool(const MachineFunction &)> Ftor);
268
269 /// MachineBlockPlacement - This pass places basic blocks based on branch
270 /// probabilities.
271 extern char &MachineBlockPlacementID;
272
273 /// MachineBlockPlacementStats - This pass collects statistics about the
274 /// basic block placement using branch probabilities and block frequency
275 /// information.
276 extern char &MachineBlockPlacementStatsID;
277
278 /// GCLowering Pass - Used by gc.root to perform its default lowering
279 /// operations.
280 FunctionPass *createGCLoweringPass();
281
282 /// GCLowering Pass - Used by gc.root to perform its default lowering
283 /// operations.
284 extern char &GCLoweringID;
285
286 /// ShadowStackGCLowering - Implements the custom lowering mechanism
287 /// used by the shadow stack GC. Only runs on functions which opt in to
288 /// the shadow stack collector.
289 FunctionPass *createShadowStackGCLoweringPass();
290
291 /// ShadowStackGCLowering - Implements the custom lowering mechanism
292 /// used by the shadow stack GC.
293 extern char &ShadowStackGCLoweringID;
294
295 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
296 /// in machine code. Must be added very late during code generation, just
297 /// prior to output, and importantly after all CFG transformations (such as
298 /// branch folding).
299 extern char &GCMachineCodeAnalysisID;
300
301 /// Creates a pass to print GC metadata.
302 ///
303 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
304
305 /// MachineCSE - This pass performs global CSE on machine instructions.
306 extern char &MachineCSEID;
307
308 /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
309 /// according to the semantics of the instruction as well as hoists
310 /// code.
311 extern char &MIRCanonicalizerID;
312
313 /// ImplicitNullChecks - This pass folds null pointer checks into nearby
314 /// memory operations.
315 extern char &ImplicitNullChecksID;
316
317 /// This pass performs loop invariant code motion on machine instructions.
318 extern char &MachineLICMID;
319
320 /// This pass performs loop invariant code motion on machine instructions.
321 /// This variant works before register allocation. \see MachineLICMID.
322 extern char &EarlyMachineLICMID;
323
324 /// MachineSinking - This pass performs sinking on machine instructions.
325 extern char &MachineSinkingID;
326
327 /// MachineCopyPropagation - This pass performs copy propagation on
328 /// machine instructions.
329 extern char &MachineCopyPropagationID;
330
331 MachineFunctionPass *createMachineCopyPropagationPass(bool UseCopyInstr);
332
333 /// PeepholeOptimizer - This pass performs peephole optimizations -
334 /// like extension and comparison eliminations.
335 extern char &PeepholeOptimizerID;
336
337 /// OptimizePHIs - This pass optimizes machine instruction PHIs
338 /// to take advantage of opportunities created during DAG legalization.
339 extern char &OptimizePHIsID;
340
341 /// StackSlotColoring - This pass performs stack slot coloring.
342 extern char &StackSlotColoringID;
343
344 /// This pass lays out funclets contiguously.
345 extern char &FuncletLayoutID;
346
347 /// This pass inserts the XRay instrumentation sleds if they are supported by
348 /// the target platform.
349 extern char &XRayInstrumentationID;
350
351 /// This pass inserts FEntry calls
352 extern char &FEntryInserterID;
353
354 /// This pass implements the "patchable-function" attribute.
355 extern char &PatchableFunctionID;
356
357 /// createStackProtectorPass - This pass adds stack protectors to functions.
358 ///
359 FunctionPass *createStackProtectorPass();
360
361 /// createMachineVerifierPass - This pass verifies cenerated machine code
362 /// instructions for correctness.
363 ///
364 FunctionPass *createMachineVerifierPass(const std::string& Banner);
365
366 /// createDwarfEHPass - This pass mulches exception handling code into a form
367 /// adapted to code generation. Required if using dwarf exception handling.
368 FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
369
370 /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
371 /// in addition to the Itanium LSDA based personalities.
372 FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
373
374 /// createSjLjEHPreparePass - This pass adapts exception handling code to use
375 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
376 ///
377 FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
378
379 /// createWasmEHPass - This pass adapts exception handling code to use
380 /// WebAssembly's exception handling scheme.
381 FunctionPass *createWasmEHPass();
382
383 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
384 /// slots relative to one another and allocates base registers to access them
385 /// when it is estimated by the target to be out of range of normal frame
386 /// pointer or stack pointer index addressing.
387 extern char &LocalStackSlotAllocationID;
388
389 /// This pass expands pseudo-instructions, reserves registers and adjusts
390 /// machine frame information.
391 extern char &FinalizeISelID;
392
393 /// UnpackMachineBundles - This pass unpack machine instruction bundles.
394 extern char &UnpackMachineBundlesID;
395
396 FunctionPass *
397 createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
398
399 /// FinalizeMachineBundles - This pass finalize machine instruction
400 /// bundles (created earlier, e.g. during pre-RA scheduling).
401 extern char &FinalizeMachineBundlesID;
402
403 /// StackMapLiveness - This pass analyses the register live-out set of
404 /// stackmap/patchpoint intrinsics and attaches the calculated information to
405 /// the intrinsic for later emission to the StackMap.
406 extern char &StackMapLivenessID;
407
408 /// RemoveRedundantDebugValues pass.
409 extern char &RemoveRedundantDebugValuesID;
410
411 /// LiveDebugValues pass
412 extern char &LiveDebugValuesID;
413
414 /// createJumpInstrTables - This pass creates jump-instruction tables.
415 ModulePass *createJumpInstrTablesPass();
416
417 /// InterleavedAccess Pass - This pass identifies and matches interleaved
418 /// memory accesses to target specific intrinsics.
419 ///
420 FunctionPass *createInterleavedAccessPass();
421
422 /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
423 /// combines them into wide loads detectable by InterleavedAccessPass
424 ///
425 FunctionPass *createInterleavedLoadCombinePass();
426
427 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
428 /// TLS variables for the emulated TLS model.
429 ///
430 ModulePass *createLowerEmuTLSPass();
431
432 /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
433 /// instructions. This is unsafe to do earlier because a pass may combine the
434 /// constant initializer into the load, which may result in an overflowing
435 /// evaluation.
436 ModulePass *createPreISelIntrinsicLoweringPass();
437
438 /// GlobalMerge - This pass merges internal (by default) globals into structs
439 /// to enable reuse of a base pointer by indexed addressing modes.
440 /// It can also be configured to focus on size optimizations only.
441 ///
442 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
443 bool OnlyOptimizeForSize = false,
444 bool MergeExternalByDefault = false);
445
446 /// This pass splits the stack into a safe stack and an unsafe stack to
447 /// protect against stack-based overflow vulnerabilities.
448 FunctionPass *createSafeStackPass();
449
450 /// This pass detects subregister lanes in a virtual register that are used
451 /// independently of other lanes and splits them into separate virtual
452 /// registers.
453 extern char &RenameIndependentSubregsID;
454
455 /// This pass is executed POST-RA to collect which physical registers are
456 /// preserved by given machine function.
457 FunctionPass *createRegUsageInfoCollector();
458
459 /// Return a MachineFunction pass that identifies call sites
460 /// and propagates register usage information of callee to caller
461 /// if available with PysicalRegisterUsageInfo pass.
462 FunctionPass *createRegUsageInfoPropPass();
463
464 /// This pass performs software pipelining on machine instructions.
465 extern char &MachinePipelinerID;
466
467 /// This pass frees the memory occupied by the MachineFunction.
468 FunctionPass *createFreeMachineFunctionPass();
469
470 /// This pass performs outlining on machine instructions directly before
471 /// printing assembly.
472 ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
473
474 /// This pass expands the experimental reduction intrinsics into sequences of
475 /// shuffles.
476 FunctionPass *createExpandReductionsPass();
477
478 // This pass replaces intrinsics operating on vector operands with calls to
479 // the corresponding function in a vector library (e.g., SVML, libmvec).
480 FunctionPass *createReplaceWithVeclibLegacyPass();
481
482 /// This pass expands the vector predication intrinsics into unpredicated
483 /// instructions with selects or just the explicit vector length into the
484 /// predicate mask.
485 FunctionPass *createExpandVectorPredicationPass();
486
487 // This pass expands memcmp() to load/stores.
488 FunctionPass *createExpandMemCmpPass();
489
490 /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
491 FunctionPass *createBreakFalseDeps();
492
493 // This pass expands indirectbr instructions.
494 FunctionPass *createIndirectBrExpandPass();
495
496 /// Creates CFI Fixup pass. \see CFIFixup.cpp
497 FunctionPass *createCFIFixup();
498
499 /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
500 FunctionPass *createCFIInstrInserter();
501
502 /// Creates CFGuard longjmp target identification pass.
503 /// \see CFGuardLongjmp.cpp
504 FunctionPass *createCFGuardLongjmpPass();
505
506 /// Creates EHContGuard catchret target identification pass.
507 /// \see EHContGuardCatchret.cpp
508 FunctionPass *createEHContGuardCatchretPass();
509
510 /// Create Hardware Loop pass. \see HardwareLoops.cpp
511 FunctionPass *createHardwareLoopsPass();
512
513 /// This pass inserts pseudo probe annotation for callsite profiling.
514 FunctionPass *createPseudoProbeInserter();
515
516 /// Create IR Type Promotion pass. \see TypePromotion.cpp
517 FunctionPass *createTypePromotionPass();
518
519 /// Add Flow Sensitive Discriminators. PassNum specifies the
520 /// sequence number of this pass (starting from 1).
521 FunctionPass *
522 createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P);
523
524 /// Read Flow Sensitive Profile.
525 FunctionPass *createMIRProfileLoaderPass(std::string File,
526 std::string RemappingFile,
527 sampleprof::FSDiscriminatorPass P);
528
529 /// Creates MIR Debugify pass. \see MachineDebugify.cpp
530 ModulePass *createDebugifyMachineModulePass();
531
532 /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
533 /// If OnlyDebugified is true then it will only strip debug info if it was
534 /// added by a Debugify pass. The module will be left unchanged if the debug
535 /// info was generated by another source such as clang.
536 ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
537
538 /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
539 ModulePass *createCheckDebugMachineModulePass();
540
541 /// The pass fixups statepoint machine instruction to replace usage of
542 /// caller saved registers with stack slots.
543 extern char &FixupStatepointCallerSavedID;
544
545 /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
546 /// or split the data to two <128 x i32>.
547 FunctionPass *createX86LowerAMXTypePass();
548
549 /// The pass insert tile config intrinsics for AMX fast register allocation.
550 FunctionPass *createX86PreAMXConfigPass();
551
552 /// The pass transforms amx intrinsics to scalar operation if the function has
553 /// optnone attribute or it is O0.
554 FunctionPass *createX86LowerAMXIntrinsicsPass();
555
556 /// When learning an eviction policy, extract score(reward) information,
557 /// otherwise this does nothing
558 FunctionPass *createRegAllocScoringPass();
559
560 /// JMC instrument pass.
561 ModulePass *createJMCInstrumenterPass();
562
563 /// This pass converts conditional moves to conditional jumps when profitable.
564 FunctionPass *createSelectOptimizePass();
565} // End llvm namespace
566
567#endif
568

source code of llvm/include/llvm/CodeGen/Passes.h