1 | //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file implements a target parser to recognise ARM hardware features |
10 | // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #ifndef LLVM_TARGETPARSER_ARMTARGETPARSER_H |
15 | #define LLVM_TARGETPARSER_ARMTARGETPARSER_H |
16 | |
17 | #include "llvm/ADT/StringMap.h" |
18 | #include "llvm/ADT/StringRef.h" |
19 | #include "llvm/Support/ARMBuildAttributes.h" |
20 | #include "llvm/TargetParser/ARMTargetParserCommon.h" |
21 | #include <vector> |
22 | |
23 | namespace llvm { |
24 | |
25 | class Triple; |
26 | |
27 | namespace ARM { |
28 | |
29 | // Arch extension modifiers for CPUs. |
30 | // Note that this is not the same as the AArch64 list |
31 | enum ArchExtKind : uint64_t { |
32 | AEK_INVALID = 0, |
33 | AEK_NONE = 1, |
34 | AEK_CRC = 1 << 1, |
35 | AEK_CRYPTO = 1 << 2, |
36 | AEK_FP = 1 << 3, |
37 | AEK_HWDIVTHUMB = 1 << 4, |
38 | AEK_HWDIVARM = 1 << 5, |
39 | AEK_MP = 1 << 6, |
40 | AEK_SIMD = 1 << 7, |
41 | AEK_SEC = 1 << 8, |
42 | AEK_VIRT = 1 << 9, |
43 | AEK_DSP = 1 << 10, |
44 | AEK_FP16 = 1 << 11, |
45 | AEK_RAS = 1 << 12, |
46 | AEK_DOTPROD = 1 << 13, |
47 | AEK_SHA2 = 1 << 14, |
48 | AEK_AES = 1 << 15, |
49 | AEK_FP16FML = 1 << 16, |
50 | AEK_SB = 1 << 17, |
51 | AEK_FP_DP = 1 << 18, |
52 | AEK_LOB = 1 << 19, |
53 | AEK_BF16 = 1 << 20, |
54 | AEK_I8MM = 1 << 21, |
55 | AEK_CDECP0 = 1 << 22, |
56 | AEK_CDECP1 = 1 << 23, |
57 | AEK_CDECP2 = 1 << 24, |
58 | AEK_CDECP3 = 1 << 25, |
59 | AEK_CDECP4 = 1 << 26, |
60 | AEK_CDECP5 = 1 << 27, |
61 | AEK_CDECP6 = 1 << 28, |
62 | AEK_CDECP7 = 1 << 29, |
63 | AEK_PACBTI = 1 << 30, |
64 | // Unsupported extensions. |
65 | AEK_OS = 1ULL << 59, |
66 | AEK_IWMMXT = 1ULL << 60, |
67 | AEK_IWMMXT2 = 1ULL << 61, |
68 | AEK_MAVERICK = 1ULL << 62, |
69 | AEK_XSCALE = 1ULL << 63, |
70 | }; |
71 | |
72 | // List of Arch Extension names. |
73 | struct ExtName { |
74 | StringRef Name; |
75 | uint64_t ID; |
76 | StringRef Feature; |
77 | StringRef NegFeature; |
78 | }; |
79 | |
80 | const ExtName ARCHExtNames[] = { |
81 | #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \ |
82 | {NAME, ID, FEATURE, NEGFEATURE}, |
83 | #include "ARMTargetParser.def" |
84 | }; |
85 | |
86 | // List of HWDiv names (use getHWDivSynonym) and which architectural |
87 | // features they correspond to (use getHWDivFeatures). |
88 | const struct { |
89 | StringRef Name; |
90 | uint64_t ID; |
91 | } HWDivNames[] = { |
92 | #define ARM_HW_DIV_NAME(NAME, ID) {NAME, ID}, |
93 | #include "ARMTargetParser.def" |
94 | }; |
95 | |
96 | // Arch names. |
97 | enum class ArchKind { |
98 | #define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, \ |
99 | ARCH_BASE_EXT) \ |
100 | ID, |
101 | #include "ARMTargetParser.def" |
102 | }; |
103 | |
104 | // List of CPU names and their arches. |
105 | // The same CPU can have multiple arches and can be default on multiple arches. |
106 | // When finding the Arch for a CPU, first-found prevails. Sort them accordingly. |
107 | // When this becomes table-generated, we'd probably need two tables. |
108 | struct CpuNames { |
109 | StringRef Name; |
110 | ArchKind ArchID; |
111 | bool Default; // is $Name the default CPU for $ArchID ? |
112 | uint64_t DefaultExtensions; |
113 | }; |
114 | |
115 | const CpuNames CPUNames[] = { |
116 | #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ |
117 | {NAME, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT}, |
118 | #include "ARMTargetParser.def" |
119 | }; |
120 | |
121 | // FPU names. |
122 | enum FPUKind { |
123 | #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND, |
124 | #include "ARMTargetParser.def" |
125 | FK_LAST |
126 | }; |
127 | |
128 | // FPU Version |
129 | enum class FPUVersion { |
130 | NONE, |
131 | VFPV2, |
132 | VFPV3, |
133 | VFPV3_FP16, |
134 | VFPV4, |
135 | VFPV5, |
136 | VFPV5_FULLFP16, |
137 | }; |
138 | |
139 | // An FPU name restricts the FPU in one of three ways: |
140 | enum class FPURestriction { |
141 | None = 0, ///< No restriction |
142 | D16, ///< Only 16 D registers |
143 | SP_D16 ///< Only single-precision instructions, with 16 D registers |
144 | }; |
145 | |
146 | inline bool isDoublePrecision(const FPURestriction restriction) { |
147 | return restriction != FPURestriction::SP_D16; |
148 | } |
149 | |
150 | inline bool has32Regs(const FPURestriction restriction) { |
151 | return restriction == FPURestriction::None; |
152 | } |
153 | |
154 | // An FPU name implies one of three levels of Neon support: |
155 | enum class NeonSupportLevel { |
156 | None = 0, ///< No Neon |
157 | Neon, ///< Neon |
158 | Crypto ///< Neon with Crypto |
159 | }; |
160 | |
161 | // v6/v7/v8 Profile |
162 | enum class ProfileKind { INVALID = 0, A, R, M }; |
163 | |
164 | // List of canonical FPU names (use getFPUSynonym) and which architectural |
165 | // features they correspond to (use getFPUFeatures). |
166 | // The entries must appear in the order listed in ARM::FPUKind for correct |
167 | // indexing |
168 | struct FPUName { |
169 | StringRef Name; |
170 | FPUKind ID; |
171 | FPUVersion FPUVer; |
172 | NeonSupportLevel NeonSupport; |
173 | FPURestriction Restriction; |
174 | }; |
175 | |
176 | static const FPUName FPUNames[] = { |
177 | #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \ |
178 | {NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION}, |
179 | #include "llvm/TargetParser/ARMTargetParser.def" |
180 | }; |
181 | |
182 | // List of canonical arch names (use getArchSynonym). |
183 | // This table also provides the build attribute fields for CPU arch |
184 | // and Arch ID, according to the Addenda to the ARM ABI, chapters |
185 | // 2.4 and 2.3.5.2 respectively. |
186 | // FIXME: SubArch values were simplified to fit into the expectations |
187 | // of the triples and are not conforming with their official names. |
188 | // Check to see if the expectation should be changed. |
189 | struct ArchNames { |
190 | StringRef Name; |
191 | StringRef CPUAttr; // CPU class in build attributes. |
192 | StringRef ArchFeature; |
193 | FPUKind DefaultFPU; |
194 | uint64_t ArchBaseExtensions; |
195 | ArchKind ID; |
196 | ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. |
197 | |
198 | // Return ArchFeature without the leading "+". |
199 | StringRef getSubArch() const { return ArchFeature.substr(Start: 1); } |
200 | }; |
201 | |
202 | static const ArchNames ARMArchNames[] = { |
203 | #define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, \ |
204 | ARCH_BASE_EXT) \ |
205 | {NAME, CPU_ATTR, ARCH_FEATURE, ARCH_FPU, \ |
206 | ARCH_BASE_EXT, ArchKind::ID, ARCH_ATTR}, |
207 | #include "llvm/TargetParser/ARMTargetParser.def" |
208 | }; |
209 | |
210 | inline ArchKind &operator--(ArchKind &Kind) { |
211 | assert((Kind >= ArchKind::ARMV8A && Kind <= ArchKind::ARMV9_3A) && |
212 | "We only expect operator-- to be called with ARMV8/V9" ); |
213 | if (Kind == ArchKind::INVALID || Kind == ArchKind::ARMV8A || |
214 | Kind == ArchKind::ARMV8_1A || Kind == ArchKind::ARMV9A || |
215 | Kind == ArchKind::ARMV8R) |
216 | Kind = ArchKind::INVALID; |
217 | else { |
218 | unsigned KindAsInteger = static_cast<unsigned>(Kind); |
219 | Kind = static_cast<ArchKind>(--KindAsInteger); |
220 | } |
221 | return Kind; |
222 | } |
223 | |
224 | // Information by ID |
225 | StringRef getFPUName(FPUKind FPUKind); |
226 | FPUVersion getFPUVersion(FPUKind FPUKind); |
227 | NeonSupportLevel getFPUNeonSupportLevel(FPUKind FPUKind); |
228 | FPURestriction getFPURestriction(FPUKind FPUKind); |
229 | |
230 | bool getFPUFeatures(FPUKind FPUKind, std::vector<StringRef> &Features); |
231 | bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features); |
232 | bool getExtensionFeatures(uint64_t Extensions, |
233 | std::vector<StringRef> &Features); |
234 | |
235 | StringRef getArchName(ArchKind AK); |
236 | unsigned getArchAttr(ArchKind AK); |
237 | StringRef getCPUAttr(ArchKind AK); |
238 | StringRef getSubArch(ArchKind AK); |
239 | StringRef getArchExtName(uint64_t ArchExtKind); |
240 | StringRef getArchExtFeature(StringRef ArchExt); |
241 | bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, |
242 | std::vector<StringRef> &Features, |
243 | FPUKind &ArgFPUKind); |
244 | ArchKind convertV9toV8(ArchKind AK); |
245 | |
246 | // Information by Name |
247 | FPUKind getDefaultFPU(StringRef CPU, ArchKind AK); |
248 | uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK); |
249 | StringRef getDefaultCPU(StringRef Arch); |
250 | StringRef getCanonicalArchName(StringRef Arch); |
251 | StringRef getFPUSynonym(StringRef FPU); |
252 | |
253 | // Parser |
254 | uint64_t parseHWDiv(StringRef HWDiv); |
255 | FPUKind parseFPU(StringRef FPU); |
256 | ArchKind parseArch(StringRef Arch); |
257 | uint64_t parseArchExt(StringRef ArchExt); |
258 | ArchKind parseCPUArch(StringRef CPU); |
259 | ProfileKind parseArchProfile(StringRef Arch); |
260 | unsigned parseArchVersion(StringRef Arch); |
261 | unsigned parseArchMinorVersion(StringRef Arch); |
262 | |
263 | void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values); |
264 | StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU); |
265 | |
266 | /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting. |
267 | /// |
268 | /// \param Arch the architecture name (e.g., "armv7s"). If it is an empty |
269 | /// string then the triple's arch name is used. |
270 | StringRef getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch = {}); |
271 | |
272 | void PrintSupportedExtensions(StringMap<StringRef> DescMap); |
273 | |
274 | } // namespace ARM |
275 | } // namespace llvm |
276 | |
277 | #endif |
278 | |