1 | //===- MLRegAllocEvictAdvisor.cpp - ML eviction advisor -------------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // Function declarations of utilities related to feature extraction for unit |
10 | // testing. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #ifndef LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H |
15 | #define LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H |
16 | |
17 | #include "llvm/Analysis/MLModelRunner.h" |
18 | #include "llvm/CodeGen/MachineBasicBlock.h" |
19 | #include "llvm/CodeGen/SlotIndexes.h" |
20 | |
21 | using namespace llvm; |
22 | |
23 | // LRStartEndInfo contains the start and end of a specific live range as |
24 | // slot indices as well as storing the index of the physical register it |
25 | // is assigned to (or 1 above the phys reg count if its the candidate). |
26 | // Used when extracting per-instruction features in the context of a |
27 | // specific eviction problem. |
28 | struct LRStartEndInfo { |
29 | SlotIndex Begin; |
30 | SlotIndex End; |
31 | size_t Pos = 0; |
32 | }; |
33 | |
34 | void ( |
35 | llvm::SmallVectorImpl<LRStartEndInfo> &LRPosInfo, |
36 | MLModelRunner *RegallocRunner, function_ref<int(SlotIndex)> GetOpcode, |
37 | function_ref<float(SlotIndex)> GetMBBFreq, |
38 | function_ref<MachineBasicBlock *(SlotIndex)> GetMBBReference, |
39 | const int InstructionsIndex, const int InstructionsMappingIndex, |
40 | const int MBBFreqIndex, const int MBBMappingIndex, |
41 | const SlotIndex LastIndex); |
42 | |
43 | void (const SlotIndex CurrentIndex, |
44 | const size_t CurrentInstructionIndex, |
45 | std::map<MachineBasicBlock *, size_t> &VisitedMBBs, |
46 | function_ref<float(SlotIndex)> GetMBBFreq, |
47 | MachineBasicBlock *CurrentMBBReference, |
48 | MLModelRunner *RegallocRunner, const int MBBFreqIndex, |
49 | const int MBBMappingIndex); |
50 | |
51 | // This is the maximum number of interfererring ranges. That's the number of |
52 | // distinct AllocationOrder values, which comes from MCRegisterClass::RegsSize. |
53 | // For X86, that's 32. |
54 | // TODO: find a way to get this, statically, in a programmatic way. |
55 | static const int64_t MaxInterferences = 32; |
56 | |
57 | // Logically, we can think of the feature set given to the evaluator as a 2D |
58 | // matrix. The rows are the features (see next). The columns correspond to the |
59 | // interferences. We treat the candidate virt reg as an 'interference', too, as |
60 | // its feature set is the same as that of the interferring ranges. So we'll have |
61 | // MaxInterferences + 1 columns and by convention, we will use the last column |
62 | // for the virt reg seeking allocation. |
63 | static const int64_t CandidateVirtRegPos = MaxInterferences; |
64 | static const int64_t NumberOfInterferences = CandidateVirtRegPos + 1; |
65 | |
66 | // The number of instructions that a specific live range might have is variable, |
67 | // but we're passing in a single matrix of instructions and tensorflow saved |
68 | // models only support a fixed input size, so we have to cap the number of |
69 | // instructions that can be passed along. The specific value was derived from |
70 | // experimentation such that the majority of eviction problems would be |
71 | // completely covered. |
72 | static const int ModelMaxSupportedInstructionCount = 300; |
73 | |
74 | // When extracting per-instruction features, the advisor will currently create |
75 | // a vector of size ModelMaxSupportedInstructionCount to hold the opcodes of the |
76 | // instructions relevant to the eviction problem, and a NumberOfInterferences * |
77 | // ModelMaxSupportedInstructionCount matrix that maps LRs to the instructions |
78 | // that they span. |
79 | static const std::vector<int64_t> InstructionsShape{ |
80 | 1, ModelMaxSupportedInstructionCount}; |
81 | static const std::vector<int64_t> InstructionsMappingShape{ |
82 | 1, NumberOfInterferences, ModelMaxSupportedInstructionCount}; |
83 | |
84 | // When extracting mappings between MBBs and individual instructions, we create |
85 | // a vector of MBB frequencies, currently of size 100, which was a value |
86 | // determined through experimentation to encompass the vast majority of eviction |
87 | // problems. The actual mapping is the same shape as the instruction opcodes |
88 | // vector. |
89 | static const int64_t ModelMaxSupportedMBBCount = 100; |
90 | static const std::vector<int64_t> MBBFrequencyShape{1, |
91 | ModelMaxSupportedMBBCount}; |
92 | |
93 | #endif // LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H |
94 | |